The compact thermal model of the pulse transformer

This paper proposes the form of a compact thermal model of pulse transformer. This model takes into account self-heating and mutual thermal coupling between the windings and the core of the transformer. It allows the calculation of the waveforms of the core and windings temperature at a known waveform of the power dissipated in particular components of the transformer. The proposed model has a form of a RC network, representing the transformer׳s own and mutual transient thermal impedance. This network is excited by controlled current sources, representing the power dissipated in the windings and in the core of the transformer. The form of the elaborated thermal model, the method of determining the values of its parameters and the selected results of measurements and calculations performed with the use of the model are presented and discussed.     

Physics-based compact model for ultra-scaled FinFETs

A physical and explicit compact model for lightly doped FinFETs is presented. This design-oriented model is valid for a large range of silicon Fin widths and lengths, using only a very few number of model parameters. The quantum mechanical effects (QMEs), which are very significant for thin Fins below 15 nm, are included in the model as a correction to the surface potential. A physics-based approach is also followed to model short-channel effects (roll-off), drain-induced barrier lowering (DIBL), subthreshold slope degradation, drain saturation voltage, velocity saturation, channel length modulation and carrier mobility degradation. The quasi-static model is then developed and accurately accounts for small-geometry effects as well. This compact model is accurate in all regions of operation, from weak to strong inversion and from linear to saturation regions. It has been implemented in the high-level language Verilog-A and exhibits an excellent numerical efficiency. Finally, comparisons of the model with 3D numerical simulations show a very good agreement making this model well-suited for advanced circuit simulations.     

Structure oriented compact model for advanced trench IGBTs without fitting parameters for extreme condition: Part II

Compact model for expressing turn-off waveform for advanced trench gate IGBTs is proposed even under high current density condition. The model is analytically formulated only with device structure parameters so that no fitting parameters are required. The validity of the model is confirmed with TCAD simulation for 1.2–6.5 kV class IGBTs. The proposed turn-off model is sufficiently accurate to calculate trade-off curve between turn-off loss and saturation collector voltage under extremely high current conduction, so that the model can be used for system design with the advanced trench gate IGBTs.     

Improved compact thermal model for studying 3-D interconnect structures with low-k dielectrics

Compact thermal modeling is gaining significance as interconnect feature sizes continue to shrink, requiring increased computation times for full-field multi-scale simulations. Improved and expanded uses of an existing compact thermal modeling approach found in Gurrum et al. [A compact approach to on-chip interconnect heat conduction modeling using the finite element method, ASME J. Electron. Packaging (2007), accepted], Gurrum et al. [A novel compact method for thermal modeling of on-chip interconnects based on the finite element method, ASME, EEP 3, Electron. Photon. Packing Electr. Syst. Photon. Des. Nanotechnol. (2003) 441-445] are presented here. The first improvement rectifies a singularity that occurs in the previous compact model. This change allows for greater flexibility in mesh application, and a greater number of structures that can be analyzed. This work focuses on the application of the compact thermal model to two interconnect structures. The first geometry [S. Im, N. Srivastava, K. Banerjee, K. Goodson, Scaling analysis of multilevel interconnect temperatures for high performance ICS, IEEE Trans. Electron. Dev. 52 (12) (2005) 2710-2719] is a typical interconnect structure based on the ITRS 65 nm technology node. A new transient compact model was applied to another geometry [J. Zhang, M. Bloomfield, J. Lu, R. Gutmann, T. Cale, Thermal stresses in 3D IC inter-wafer interconnects, Microelectron. Eng. 82 (3-4) (2005) 534-547], which is a more advanced technology with a through-the-die via structure. The second improvement of the compact model is extending the steady state finite element based model into a transient version. Full-field simulations have very large storage and memory requirements for transient analysis of complex structures. The advantage of this compact model is that in addition to increased efficiency, the methodology and implementation is similar to a traditional finite element analysis (FEA).     

A 2D physically based compact model for advanced power bipolar devices

A two-dimensional (2D) physical compact model for advanced power bipolar devices such as Injection Enhanced Gate Transistor (IEGT) or Trench IGBT is presented in this paper. In order to model the complex 2D nature of these devices, the ambipolar diffusion equation has been solved simultaneously for different boundary conditions associated with different areas of the device. The IEGT compact model has been incorporated into the SABER simulator and tested in standard double-pulse switching test circuit. The compact model has been established to model a 4500 V-1500 A flat pack TOSHIBA IEGT.     

Nanoscale electrothermal co-simulation: compact dynamic models of hyperbolic heat transport and self-consistent device Monte Carlo

Two problems in the self-consistent, electrothermal co-simulation of nanoscale devices, are discussed. It is shown that the construction of dynamic compact thermal models for nanoscale devices, based on solution of the hyperbolic (wavelike) heat transport equation, can follow essentially the same approach as the authors' analytical thermal impedance matrix method for the parabolic (diffusive) equation. The physicality of the hyperbolic equation is discussed in the light of calculated results. The analytical impedance matrix method for the time-independent case is employed in a thermally self-consistent device Monte Carlo simulation, illustrating the potential for detailed study of nanoscale electrothermal effects.     

Investigation of the thermal performance of micro-whisker structured silicon heat spreaders for power devices

The driving forces of developments in power electronics are the continuing miniaturization and enhancement of power densities. New packaging concepts are required allowing the dissipation of a power loss density of up to several hundred W/cm² at operation temperatures as low as possible. A promising attempt to decrease the thermal resistance to the ambient is the development of silicon substrates structured with microwhiskers perpendicular to its surface. An industrial application of this new heat spreader technology in power electronic modules makes necessary the specification of the substrate properties. In this work, a new method for determination of thermal qualities based on laser heating of the heat spreader, surface temperature measurement by thermovision, and dynamic reverse modeling is described. For numerical determination of the thermal characteristics, the measured data are evaluated with the help of a thermal model of the heat spreaders under various boundary conditions. The respective temperature distributions are calculated with a new simulation tool using an alternating-direction implicit algorithm (ADI-method). Results obtained from heat spreaders with microwhisker treatment are compared with those from reference samples with a polished surface. Based on these results a view on future applications for power electronics assemblies are derived.     

A DC behavioral electrical model for quasi-linear spin-valve devices including thermal effects for circuit simulation

An advanced model for quasi-linear spin-valve (SV) structures is presented for circuit simulation purposes. The model takes into account electrical and thermal effects in a coupled way in order to allow a coherent representation of the sensor physics for design purposes of electronics applications based on these sensor devices. The model was implemented in Verilog-A and used in a commercial circuit simulator. For testing the model, different SV structures have been specifically fabricated and measured. The characterization included DC measurements as well as steady-state and transient thermal analysis. From the experimental data, the parameters of the model have been extracted. The model reproduces correctly the experimental measurements obtained for devices with diverse sizes in different electrical and thermal operation regimes.     

精简热模型在集成电路封装中的应用研究

探讨了为一款FBGA封装产品建立DELPHI型热阻网络的新方法。首先利用恒温法为芯片封装建立星型网络,在此基础之上求解支路耦合热阻值,构成DELPHI型热阻网络。经过仿真验证显示,所建立的两种DELPHI型热阻网络模型与详细热模型(DTM)的结温误差均在10%以内,从而具备较好的边界条件独立性。     

Experimental validation of a thermal modelling method dedicated to multichip power modules in operating conditions

In this paper, we present an implementation of a thermal modelling method applied to a multichip module used as a power converter. Analytical functions of thermal impedances, with original formulations for the mutuals are defined. They are derived from 3D thermal simulations and experimental validations with direct chips temperature measurements. Finally, simulations are performed in order to improve the capability of our model to assess, with fast computation, the thermal constraints applied on the multichip module in a real operating condition.     

Dynamic thermal modelling of a power integrated circuit with the application of structure functions

This paper presents dynamic thermal analyses of a power integrated circuit with a cooling assembly. The investigations are based on the examination of the cumulative and differential structure functions obtained from the circuit cooling curves recorded during transient circuit temperature measurements. The experiments carried out and the comprehensive study of the computed structure functions rendered possible determination of the interface contact resistance and the heat transfer coefficient values necessary for numerical thermal simulations illustrating the influence of these thermal model parameters on circuit temperature.     

A compact deep-submicron MOSFET gds model including hot-electron and thermoelectric effects

A compact I_ds model with physical drain-conductance (g_ds) modeling for deep-submicron MOSFETs is formulated based on first-principle momentum-/energy-balance equations, which simultaneously includes the hot-electron and thermoelectric effects in a unified compact form with two fitting parameters and one-step extraction. The model has been verified with 0.18-μm experimental data with good g_ds prediction.     

A computationally efficient compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates

In this paper a computationally efficient surface-potential-based compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates is presented. A fully-depleted SOI MOSFET with a back-gate is essentially an independent double-gate device. To the best of our knowledge, existing surface-potential-based models for independent double-gate devices require numerical iteration to compute the surface potentials. This increases the model computational time and may cause convergence difficulties. In this work, a new approximation scheme is developed to compute the surface potentials and charge densities using explicit analytical equations. The approximation is shown to be computationally efficient and preserves important properties of fully-depleted SOI MOSFETs such as volume inversion. Drain current and charge expressions are derived without using the charge sheet approximation and agree well with TCAD simulations. Non-ideal effects are added to describe the I-V and C-V of a real device. Source-drain symmetry is preserved for both the current and the charge models. The full model is implemented in Verilog-A and its convergence is demonstrated through transient simulation of a coupled ring oscillator circuit with 2020 transistors.     

一种近似用于高发射率城市地表热红外等效发射率的方向性变异核驱动模型及其不确定性分析

地表热红外发射率(8~14 μm)的方向性变异为遥感地表温度的反演及应用引入了不确定性,这种问题在城市地表显得尤为突出。本文发展了一种近似用于高发射率城市地表热红外等效发射率的方向性变异(Urban Surface Emissivity Anisotropy, USEA)核驱动模型,并分析了具体应用时的不确定性,其中USEA用非垂直观测的发射率与垂直观测时的发射率之比定量表示。模型有两个基本假设：(1)白天,USEA具有热点效应,热点位置与太阳位置接近;(2)夜晚,USEA无明显热点效应,且主要与观测天顶角相关。该核驱动模型由各向同性核、多次散射核、以及温差核组成,其中各向同性核为常数1,多次散射核描述了USEA与观测天顶角的关系,温差核描述了USEA的热点效应。基于计算机模拟数据的模型评价结果表明,核驱动模型可以表达USEA的时空变化,但城市地表热惯量会导致模型的适用性降低。该核驱动模型在MODIS等传感器的方向性比辐射率数据上,具有一定的应用潜力。     

一种单材料双功函数栅MOSFET解析模型

An analytical surface potential model for the single material double work function gate(SMDWG) MOSFET is developed based on the exact resultant solution of the two-dimensional Poisson equation. The model includes the effects of drain biases, gate oxide thickness, different combinations of S-gate and D-gate length and values of substrate doping concentration. More attention has been paid to seeking to explain the attributes of the SMDWG MOSFET, such as suppressing drain-induced barrier lowering(DIBL), accelerating carrier drift velocity and device speed. The model is verified by comparison to the simulated results using the device simulator MEDICI. The accuracy of the results obtained using our analytical model is verified using numerical simulations. The model not only offers the physical insight into device physics but also provides the basic designing guideline for the device.     

一种基于可重用模型组件的战场目标信源建模方法

战场情报仿真缺乏典型通用目标信源建模方法,难以为后续仿真流程中新概念、新算法的演示验证提供各种规范、完备的战场目标信源建模支撑.为了构建灵活通用、要素完备的典型战场目标信源,提出了基于对象的模版化、组件化的信源建模方法.从目标静态数据模型、目标动态行为模型两个方面进行数字化建模抽象,以模型驱动仿真数据生成,实现战场情报仿真环境下各种异构信源的体系化建模.试验证明该建模方法具有良好实用性,所建立的目标信源仿真模型可灵活组装、自由编配,为情报和作战领域的信源仿真提供了一种灵活、通用的目标建模方法.     

A novel surface potential-based short channel MOSFET model for circuit simulation

In this paper a novel analytical approximation method for surface potential (ψ_s) calculation in compact MOSFET model is presented. It achieves excellent accuracy and good calculation speed over all regions from accumulation to strong inversion. With this approximation method, a surface potential-based compact model for short channel MOSFET is developed. Comparison with measured data is also presented to validate the new model.     

A unified short-channel compact model for cylindrical surrounding-gate MOSFET

For the first time, a continuous and explicit model valid in all operating regions, for undoped short-channel cylindrical gate-all-around (GAA) MOSFETs, is presented in this study. From a two-dimensional analysis, the threshold voltage roll-off, the drain-induced barrier lowering (DIBL) and the subthreshold swing are explicitly modeled. Short-channel effects are then implemented into a continuous drain-current model based on an effective surface potential approach using the gradual channel approximation. Improving the model behavior in the saturation operating region by accounting the channel pinch-off displacement, channel length modulation is studied and implemented as well. Analytical results are compared to TCAD-Atlas numerical simulations and validate the short-channel model in all operating modes making it suitable for circuit design simulations.