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1.
输入电阻是放大电路的一个重要的性能指标,一般由电路结构本身决定。但对于双端输入的差分放大电路而言,输入电阻的计算却是与输入形式密切相关的。本文论述了运算放大器差分电路输入电阻的合理计算问题,指出了差分电路接地输入和悬浮输入的本质差别,给出了两种方式下输入电阻的准确求解方法。  相似文献   

2.
通过检测矩阵变换器的瞬时输入电压并实时调节输出电压调制矢量,采用空间矢量调制策略的矩阵变换器能够在不平衡且非正弦的输入电压下得到正弦平衡的输出电压。在非平衡输入电压下,若输入功率因数角不变,矩阵变换器的输入电流将不再正弦。本文给出了输入电流与输出功率及输入功率因数角之间的关系,通过调节输入电流调制矢量的方向,可得到正弦但不平衡的输入电流。仿真证明了理论的正确性。  相似文献   

3.
This paper deals with the performance evaluation of space-vector-modulated matrix power converters under input and output unbalanced conditions. Two control strategies of the input current displacement angle are presented and compared in order to emphasize their influence on the input current harmonic content. The first is based on keeping the input current vector in phase with the input voltage vector. In the second, the input current displacement angle is dynamically modulated as a function of positive- and negative-sequence components of the input voltages. In both cases, the harmonic content and the three-phase RMS value of the input current have been evaluated analytically. The input current harmonic spectrum is quite different for the two control strategies and can be related to the input and output unbalance. It has been verified that, in the usual case of balanced output conditions, using the second method, it is possible to eliminate the harmonic components of the input current. Some numerical simulations are presented to confirm the analytical results  相似文献   

4.
Web页面的维文在线输入技术,能够在浏览器中脱离本机输入法而进行维文输入,实现维文网络在线文字交互,为网络系统提供跨平台的维文输入解决方案。阐述了Web页面维文在线输入技术的工作原理及基本设计思想,介绍了维文在线输入法的设计原则和输入法流程,对维文输入法进行了系统分析,给出实现模型,论述浏览器内嵌维文字体信息技术,实现在线、即时的维文输入。  相似文献   

5.
This paper presents a rail-to-rail constant-gm operational amplifier input stage. The proposed circuit changes the tail current of the input differential pairs dynamically for a constant-gm by using dummy input differential pairs. The problem which causes total gm variation is input pairs and dummy input pairs can not take effect at the same time with the common-mode input voltage changes, because the tail current transistor of the input pairs are in triode region when the input pairs are turned off, the dummy input pairs will enter subthreshold region from cut-off region before the input pairs when common-mode voltage changes. The effect of this problem is more obviously in low supply voltage design. To solve this problem, compensate current sources is added to the tail current transistors of each dummy input differential pairs for lower gm variation. The gm of this Op Amp’s input stage varies around ±2%.  相似文献   

6.
A family of compact CMOS rail-to-rail input stages with constant-g m is presented. To attain a constant-gm over the whole common-mode input range, an electronic zener diode is inserted between the tails of the complementary input pairs. This zener keeps the sum of the gate-source voltages of the input pairs, and therefore the g m of the rail-to-rail input stage, constant. Two possible implementations of the zener have been realized and inserted in a rail-to-rail input stage. These input stages are implemented in two two-stage compact amplifiers. Both amplifiers have been realized in a 1 μm BiCMOS process. They have a unity-gain frequency of 2-MHz, for a capacitive load of 20 pF  相似文献   

7.
Techniques for measuring the input parameters of very high input impedance dc amplifiers are described, including a method for separating out the input current and input conductance. Results obtained from a set of measurements are used to demonstrate the techniques.  相似文献   

8.
When the input voltage of an operational amplifier or comparator with a bipolar input stage exceeds the range of normal operation, the polarity of the output signal reverses and the input bias current increases to excessively large values. Saturation of the input transistors restricts the sensing of differential voltages to a common-mode (CM) range roughly between the positive and the negative supply rails. Input stage configurations that not only provide solutions to prevent the signal reversal and the excessive increase of input bias current, but also provide an extension of the CM range far beyond the supply rails, while the transconductance for differential input voltages remains constant, are described. Integrated implementations of the input stages realized a CM range reaching +15 V at a single supply voltage as low as 1 V, while the input bias current was limited to 6 μA  相似文献   

9.
This paper discusses a new method to couple into the TM010 mode of a microstrip circular-disk resonator. This method can achieve reasonably strong input coupling, which is useful for narrow-band filters with fractional bandwidths of approximately 0.5% and above. A comparison between this newly proposed input coupling structure and the conventional gap input coupling structure will be addressed. A decision threshold for using either the tap input or the conventional gap-coupled input is also explained. Experimental results of a filter fabricated using this novel input coupling structure is also presented  相似文献   

10.
介绍了跨Windows和Linux平台的藏文输入法技术及技术特征.论述了在不同操作系统环境藏文输入法的实现方法,从而设计在Windows和Linux两类OS间的输入法接口模块;讨论了使用软件移植、第三方虚拟机工具、操作系统抽象层等三种技术,设计跨多个操作系统平台的藏文输入法.  相似文献   

11.
郑华  郑永秋  安盼龙  张婷  卢晓云  薛晨阳 《红外与激光工程》2016,45(11):1122002-1122002(5)
谐振式光纤陀螺是一种基于Sagnac效应的高精度惯性传感器。作为一种互异性噪声,光纤谐振腔输入功率的波动会造成陀螺的检测误差。首先,分析了光纤谐振腔输入功率波动产生噪声的机理。通过对不同输入功率下的谐振腔传输特性和陀螺解调输出的理论及实验分析得到了谐振腔输入功率波动引起的检测误差的表达式。当输入角速度为500()/s、输入功率为0.69 mW时,0.007 5 mW的功率波动会引起5.26()/s的检测误差。其次,研究了谐振腔输入功率波动对陀螺标度因数的影响。通过计算发现随着输入功率波动的增大,解调曲线的线性区将会发生扭曲,同时陀螺的标度因数非线性度会恶化,为谐振式光纤陀螺中输入功率波动噪声的估测提供了参考。  相似文献   

12.
In general, three-phase PWM AC/DC power converters have been implemented in the synchronous frame model to eliminate steady state errors effectively and to obtain fast transient response characteristics. However, controllers designed in such way would have input current harmonics and DC-link voltage ripples under the unbalanced input voltage conditions due to the assumption of the balanced input voltage conditions. This paper describes a new control scheme to minimize harmonic distortions of the input current and DC-link voltage in the converter under the unbalanced input voltage. conditions. The synchronous frame input voltage, which is considered as the input side back-EMF component, is regulated pertinently according to the input voltage conditions. The current command is selected to eliminate the reactive power and the second order harmonic component of active power. In this case, the analysis of the input voltage is implemented in the synchronous frame without detecting the phase angle and magnitude of each phase voltage. The proposed control scheme is simple and effectively minimizing the harmonic distortions in the input and output system under the unbalanced input voltage conditions.  相似文献   

13.
An analytical expression, previously derived in a companion paper published in Volume 7, Issue No. 1 of the International Journal of Satellite Communications (pp. 3–6), was used to generate signal suppression data for 3, 5, 10, 20, 40 and 55 input signal scenarios in the presence of Gaussian noise assuming an ideal hard-limiter for a wide range of input signal ratios. Additionally, the signal suppression effect has been quantified for up to 200 input signals with input SNRs of ∞, 6 dB and 0 dB for the case in which a single higher-power input signal exists in the presence of lower, equal-powered signals. The data support the argument that the signal suppression effect is significantly reduced as the number of input signals is increased for the scenarios investigated. Also, the generated data show that the signal suppression effect decreases asymptotically to a value less than 1 dB for the case of a single higher-power signal in the presence of varying degrees of input Gaussian noise and up to 200 total signals. Finally, a Gaussian approximation of the input signal ensemble was verified for the full range of input signal sets investigated.  相似文献   

14.
为适应低压低功耗设计的应用,设计了一种超低电源电压的轨至轨CMOS运算放大器。采用N沟道差分对和共模电平偏移的P沟道差分对来实现轨至轨信号输入.。当输入信号的共模电平处于中间时,P沟道差分对的输入共模电平会由共模电平偏移电路降低,以使得P沟道差分对工作。采用对称运算放大器结构,并结合电平偏移电路来构成互补输入差分对。采用0.13μm的CMOS工艺制程,在0.6V电源电压下,HSpice模拟结果表明,带10pF电容负载时,运算放大器能实现轨至轨输入,其性能为:功耗390μw,直流增益60dB,单位增益带宽22MHz,相位裕度80°。  相似文献   

15.
1-V rail-to-rail operational amplifiers in standard CMOS technology   总被引:1,自引:0,他引:1  
The constraints on the design of CMOS operational amplifiers with rail-to-rail input range for extremely low supply voltage operation, are addressed. Two design approaches for amplifiers based on complementary input differential pairs and a single input pair, respectively, are presented. The first realizes a feedforward action to accommodate the common-mode (CM) component of the input signals to the amplifier input range. The second approach performs a negative feedback action over the input CM signal. Two operational amplifiers based on the proposed approaches have been designed for 1-V total supply operation, and fabricated in a standard 1.2-μm CMOS process. Experimental results are provided and the corresponding performances are discussed and compared  相似文献   

16.
目前有关中文BCI输入系统的研究仅有拼音输入和笔画输入两种,且都克服不了中文输入速率较低、不便携等问题.据此提出了基于P300的五笔中文输入系统.此系统通过低成本OpenBCI套件,使用Wi-Fi协议传输脑电数据,在移动设备上实现刺激界面,并使用卷积神经网络处理脑电信号.实验表明,该系统具有高中文输入速率、高准确率以及...  相似文献   

17.
It is shown that, when the input signal-to-interference ratio (SIR) is small, a biased nonlinearity that has a dead zone below some threshold value can provide a large enhancement in output SIR and signal-to-interference-plus-intermodulation ratio (SIIMR) if the threshold is set equal or close to the amplitude of the strong interference. In the absence of noise, the output SIR and SIIMIR are virtually independent of the input SIR, however low the latter may be. It Is shown that, for a dead-zone limiter, the output SIIMR in this case is -4.93 dB regardless of the input SIR. Under strong interference, any noise present in the input reduces the SIR and SIIMR improvement, but a biased nonlinearity can still provide an output SIR and SIIMR superior to the input SIR, i.e. an output SIIMR 6.35 dB below the input signal-to-noise ratio (SNR) instead of 6.02 dB below the input SIR as is the case with hard limiting  相似文献   

18.
When two or more sinusoidal signals are passed through a hard limiter, intermodulation (IM) products are developed at the limiter output. The magnitudes of the IM products are a function of the relative levels of the input signals, as well as the input noise, if present. This paper considers the case of three input sinusoids plus random noise. Quantitative values for IM-product magnitudes are presented as a function of input signal-signal-to-noise ratio for two specific cases of relative input signal levels.  相似文献   

19.
The authors explore a new concept of spectral characterization of wide-band input process in high speed networks. It helps them to localize wide-band sources in a subspace, especially in the low-frequency band, which has a dominant impact on queueing performance. They choose simple periodic-chains for the input rate process construction. Analogous to input functions in signal processing, they use elements of DC, sinusoidal, rectangular pulse, triangle pulse, and their superpositions, to represent various input correlation properties. The corresponding input power spectrum is defined in the discrete-frequency domain. In principle, a continuous spectral function of stationary random input process can be asymptotically approached by its discrete version as one sufficiently reduces the discrete-frequency intervals. An understanding of the queue response to the input spectrum will provide a great deal of knowledge to develop advanced network traffic measurement theory, and help to introduce effective network resource allocation policies. The new relation between queue length and input spectrum is a fruitful starting point for further research  相似文献   

20.
Yield and speed optimization of a latch-type voltage sense amplifier   总被引:2,自引:0,他引:2  
A quantitative yield analysis of a latch-type voltage sense amplifier with a high-impedance differential input stage is presented. It investigates the impact of supply voltage, input DC level, transistor sizing, and temperature on the input offset voltage. The input DC level turns out to be most significant. Also, an analytical expression for the sensing delay is derived which shows low sensitivity on the input DC bias voltage. A figure of merit indicates that an input dc level of 0.7 V/sub DD/ is optimal regarding speed and yield. Experimental results in 130-nm CMOS technology confirm that the yield can be significantly improved by lowering the input DC voltage to about 70% of the supply voltage. Thereby, the offset standard deviation decreases from 19 to 8.5 mV without affecting the delay.  相似文献   

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