Differential Hot Electron Injection in an Adaptive Floating Gate Comparator

We introduce differential-mode hot electron injection for adapting and storing analog nonvolatile signed state variables. This approach is compatible with modern digital CMOS technologies and is readily extended to novel circuit applications. We highlight advantages of the technique by applying it to the design of an adaptive floating gate comparator (AFGC). This is the first use of this technique for adaptation in a nonlinear circuit. The AFGC computes appropriate voltages for locally adapting the input floating gate nodes to cancel offsets. The technique is amenable to both local and nonlocal adaptation which allows greater design flexibility.The AFGC has been fabricated in a commercially available 0.35 μm CMOS process. We experimentally demonstrate more than two orders of magnitude reduction in offset voltage: the mean offset is reduced by 416X relative to chips direct from the foundry and by 202X relative to UV-irradiated chips. We consider both static and dynamic adaptation and demonstrate that the the accuracy of dynamic offset cancellation is approximately two orders of magnitude better than static adaptation. In the presence of observed 8% injection mismatch, the AFGC robustly converges to within 728 μV of the desired input offset (mean offset −109 μV, standard deviation 379 μV). Adaptation occurs within milliseconds, with charge retention for more than one month, and variation of offset error with temperature of −15 μV/^∘C.Yanyi Liu Wong received the B.S. and M.S. degrees in Electrical Engineering in 2001 and 2004, respectively, from the University of Maryland, College Park, where he is currently working toward the Ph.D. degree. From 2001 to 2003, he was a Teaching Assistant for microelectronics lectures and labs. Since 2003, he has been with The Johns Hopkins University Applied Physics Laboratory developing Radiation-Hardened-By-Design EEPROM subsystems for space based ASICs. At the same time, he has been working as a Research Assistant at the Integrated Biomorphic Information Systems Laboratory, UMCP, and has been actively designing low-power, mixed-signal, adaptive floating gate circuits and applications in commercially available CMOS processes.Marc H. Cohen received both B.Sc. and M.Sc. degrees in Electrical Engineering from the University of the Witwatersrand, Johannesburg, South Africa in 1978 and 1983 respectively. He received an M.S. in Biomedical Engineering and a Ph.D. in Electrical and Computer Engineering from The Johns Hopkins University, Baltimore, MD, USA in 1991 and 2001 respectively. He is currently an Assistant Research Scientist in the Institute for Systems Research, University of Maryland, College Park. His research interests lie in the areas of adaptive low power analog and mixed-signal integrated circuit design. Current application areas include ultrasonic echolocation, contact imagers for control of microfluidic devices, controllers for adaptive optics and integrated sensors for RFID.Pamela A. Abshire received the B.S. degree in physics with honor in 1992 from the California Institute of Technology. Between 1992 and 1995 she worked as a Research Engineer in the Bradycardia Research Department of Medtronic, Inc. She received her M.S. and Ph.D. degrees in Electrical and Computer Engineering from The Johns Hopkins University in 1997 and 2002, respectively. She is currently an assistant professor in the Department of Electrical and Computer Engineering and the Institute for Systems Research at the University of Maryland, College Park. Dr. Abshire’s research focuses on low power mixed signal integrated circuit design, adaptive integrated circuits, integrated circuits for biosensing, and understanding the tradeoffs between performance and energy in natural and engineered systems.     

Multi-Input Floating Gate Differential Amplifier and Application to Intelligent Sensors

Multi-input floating gate differential amplifier (FGDA) is proposed which can perform any convolution operation with differential structure and feedback loop. All operations are in the voltage mode. Only one terminal is required for the negative feedback which can suppress distortions due to mismatches of active elements. Possible applications include intelligent image sensor, where fully parallel DCT operation can be performed. A prototype chip is fabricated which is functional. A preliminary test result is reported.     

Characterization of Floating Gate Defects in Analog Cells

A unified approach to tackle the characterization of the floating gate defect in analog and mixed-signal circuits is introduced. An electrical level model of the defective circuit is proposed extending previous models used effectively in the digital domain. The poly-bulk, poly-well, poly-power rail and metal-poly capacitances are significant parameters in determining the behavior of the floating gate transistor. The model is used to analyze the feasibility of testing a simple analog cell with the floating gate defects through the observation of the quiescent current consumption and the dynamic behavior.     

一种基于准浮栅技术的新型低压全差分运算放大器

讨论分析了准浮栅晶体管的工作原理、电气特性及其等效电路。基于准浮栅 PMOS 晶体管,设计实现了全差分运算放大器。在 1.3V 的单电源电压下,运算放大器的最大开环增益为 63.7dB,相位裕度为 63°,单位增益带宽为26.1MHz。利用本文设计的准浮栅全差分运放,设计实现了增益可调的放大器。