Avalanche injection and second breakdown in transistors

A rapid type of second breakdown observed in silicon n⁺-p-n-n⁺transistors is shown to be due to avalanche injection at the collector n-n⁺junction. Localized thermal effects, which are usually associated With second breakdown, are shown to play a minor role in the initiation of the transition to the low voltage state. A useful tool in the analysis of avalanche injection is the n⁺-n-n⁺diode, which exhibits negative resistance at a critical voltage and current. A close correspondence between the behavior of the diode and the transistor (open base) is established both theoretically and experimentally. Qualitative agreement with the proposed model is obtained for both directions of base current flow. It is shown that transistors having thin, lightly doped collector regions are particularly susceptible to avalanche injection, which suggests that some compromise may be necessary in the design of high-frequency power transistors.     

The Safe Operating Area of GaAs-Based Heterojunction Bipolar Transistors

The safe operating area (SOA) of GaAs-based heterojunction bipolar transistors has been studied considering both the self-heating effect and the breakdown effect. The Kirk effect induced breakdown (KIB) was considered to account for the decrease of the breakdown voltage at high currents. With reasonable emitter ballastors, the KIB effect was shown to be the major cause for device failure at high currents, while the thermal effect controls the low current failure. The effect of emitter resistance and base resistance on device stability was also studied. While the emitter resistance always improves the device stability by expanding the SOAs, the base resistance degrades SOAs when the KIB dominates the failure mechanism. The effect of the base resistance on SOAs was explained by its control on the flow of the avalanche current. Since the KIB effect depends on the collector structure, it was shown that a nonuniformly doped collector can effectively improve the SOAs     

Stability of transistors in avalanche region

The stability in an avalanche transistor is shown to depend in a very simple way on emitter-base voltage and on collector current. This dependence is quite general, since it is common to transistors of various types and structures (n-p-n, p-n-p, Ge, Si, planar, micro alloy diffused, mesa and drift); moreover the stability conditions show that the punch-through hypothesis is not essential to explain recently observed spontaneous oscillations in avalanche transistors with open emitters. Furthermore, a very simple equivalent circuit is given, which proves to be useful in describing the principal characteristic of avalanche oscillation.     

Hot carrier induced bipolar transistor degradation due to basedopant compensation by hydrogen: theory and experiment

New experimental and analytical results are presented which show that extrinsic and intrinsic base dopant compensation by hydrogen is responsible for large changes in the bipolar transistor parameters of emitter-base breakdown voltage (V_ebo), forward collector current (I_c) and series base resistance (R_bx) when such transistors are operated under avalanche and inverted mode stress conditions. A new physical model has been developed to explain the observed changes in V_ebo and I_c as a function of stress time, and the analytical results are shown to be well correlated with the experimental data. Lastly, the effects of degradation on transistor voltage gain bandwidth (f_max) and emitter coupled bipolar comparator delay (τ_delay) are assessed and discussed in terms of circuit performance degradation     

Reliability and performance scaling of very high speed SiGe HBTs

We discuss the SiGe HBT structural changes required for very high performance. The increase in collector concentration, affecting current density and avalanche current, appears to be the most fundamental concern for reliability. In device design, a narrow emitter and reduced poly–single-crystal interfacial oxide are important elements in minimizing device parameter shifts. From the application point of view, avalanche hot-carriers appear to present new constraints, which may be managed through limiting voltage (to 1.5×–2× BV_CEO), or through circuit designs robust to base current parameter shifts.     

Gain of a heterojunction bipolar phototransistor

Analytical expressions have been derived for the collector current, optical gain, and quantum efficiency for a heterojunction, bi-polar phototransistor (HPT). These expressions can be utilized to optimize the current gain and quantum efficiency for HPT design. The presence of avalanche multiplication in the base-collector junction has been taken into account and shown to be a significant factor in determining the gain of an InGaAs/InP phototransistor. Experimental results of optical gain versus the collector-emitter voltage can only be explained in terms Of avalanche multiplication.     

High-temperature DC characteristics of AlxGa0.52-xIn0.48P/GaAs heterojunction bipolar transistors grownby metal organic vapor phase epitaxy

A series of Al_xGa_0.52-xIn_0.48P/GaAs heterojunction bipolar transistors (HBT's) with x=0 to x=0.52 showed ideality factors close to unity for both base current and collector current and small variation in gain with temperature up to at least T=623 K across the whole range of x composition. Hole current injection from the base into the emitter in these devices was shown to be negligible. The current gain, β, which is temperature insensitive was thought to be limited by bulk base recombination for x⩽0.3 and recombination at the graded emitter region for x>0.3. The optimum emitter composition (highest β, and good β stability with collector current and temperature) was found to be x=0.18-0.30. Useful transistor action with very high gain and output resistance is possible up to at least T=623 K, limited only by the thermal performance of the unoptimized ohmic contacts employed in the devices     

Influence of base thickness on collector breakdown in abruptAlInAs/InGaAs heterostructure bipolar transistors

The avalanche process in the collector of abrupt Al_0.48In_0.52As-In_0.53Ga_0.47 As heterostructure bipolar transistors (HBTs) is reported. It is reported that the collector multiplication constant decreases monotonically with increasing base thickness. When the base thickness is less than the mean-free path for energy relaxation in the base, the avalanche process in the collector is enhanced by high-energy injection from the emitter. On the other hand, no such dependence is observed for long-base transistors with equilibrium base transport. These effects are expected as the emitter injection energy of 0.48 eV is appreciable compared to the impact ionization threshold of 0.83 eV in the InGaAs collector     

The implementation of a reduced-field profile design forhigh-performance bipolar transistors

The first realization of a reduced-field design concept for advanced bipolar devices using the low-temperature epitaxial (LTE) technique to form the base layer is described. By inserting a lightly doped collector (LDC) spacer layer between the heavily doped base and collector regions, it is successfully demonstrated that the collector-base (CB) junction avalanche multiplication can be reduced substantially while maintaining high collector doping for current density consideration. Similar applications of the LDS technique to the emitter-base (EB) junction also results in a lower electric field, thus less EB junction reverse leakage. The feasibility of the reduced-field profile design concept is demonstrated using a LTE-base device structure     

Base current reversal phenomenon in a CMOS compatible high gainn-p-n gated lateral bipolar transistor

Base current reversal phenomenon is newly observed in a CMOS compatible high gain n-p-n gated lateral bipolar transistor. We attribute this phenomenon to avalanche generation as verified experimentally and by two-dimensional device simulation. Detailed investigation reveals that: (i) the multiplication ratio increases exponentially with the collector voltage or equivalently the peak field at the surface collector corner; and (ii) the multiplication ratio is independent of not only the low level base-emitter forward biases applied but also the base width of the transistors fabricated by the same process. Design guideline for suppression of the base current reversal has been established such as to fully realize the potential of the gated lateral bipolar transistors, i.e., a very high current gain of 11,600 can be maintained as long as the power supply voltage is less than the critical value of 1.78 V. On the other hand, new application directly employing this phenomenon has been suggested. Comparisons between the base current reversal phenomenon in the gated lateral bipolar transistor and that in the vertical bipolar transistor have also been performed and significant differences between the two have been drawn and have been adequately explained     

Avalanche behavior of low-voltage power MOSFETs

This letter addresses the behavior of low voltage power MOSFETs under avalanche, with a paralleling point of view. It is shown that during avalanche, up-to-date technology MOSFET transistors exhibit a resistance far in excess of their on-state resistance (R/sub DSon/). A novel test setup is proposed to measure "avalanche" resistance. A simple model of breakdown voltage is then proposed. It becomes possible to perform fast simulations using this model to study current balance between paralleled transistors under avalanche operation. It is shown that considering avalanche resistance reduces the influence of breakdown voltage mismatches and allows for better current sharing.     

Breakdown-speed considerations in InP/InGaAs single- anddouble-heterostructure bipolar transistors

The breakdown and speed characteristics of InP/InGaAs single and double HBTs are presented. Temperature-dependent two- and three-terminal measurements suggest that avalanche impact ionization is the dominant breakdown mechanism in InGaAs collector HBTs. Monte Carlo techniques and 1D drift-diffusion modeling are used for speed and breakdown simulation, respectively. Special doping profiles are evaluated for improving the breakdown-speed characteristics of single HBTs (SHBTs) with conventional uniformly doped InGaAs collectors. Double HBTs (DHBTs) outperform all SHBTs in terms of speed-breakdown tradeoffs as long as they use graded base-collector junctions or they operate under sufficiently high collector-emitter voltage conditions. A cutoff frequency of 200 GHz was found to be feasible with graded DHBTs, and breakdown voltages up to 4.6 V were evaluated with a 3000-Å-thick collector. Nongraded DHBTs can be optimized to perform better in terms of speed-breakdown tradeoffs provided that a high collector doping is used     

GaN HBT: toward an RF device

This paper reviews efforts to develop growth and fabrication technology for the GaN HBT. Conventional devices are grown by plasma assisted MBE on MOCVD GaN templates on sapphire. HBTs were fabricated on LEO material identifying threading dislocations as the primary source of collector-emitter leakage which was reduced by four orders of magnitude for devices on nondislocated material. Base doping studies show that the mechanism of this leakage is localized punch-through caused by compensation near the dislocation. High contact and lateral resistance in the base cause large parasitic common emitter offset voltages (from 1 to 5 V) in GaN HBTs. The effect of this voltage drop on common emitter characteristics is discussed. The combination of this voltage drop and the emitter collector leakage make Gummel and common base characteristics unreliable without verification with common emitter characteristics. The selectively regrown emitter bipolar transistor is presented with a DC current gain of 6 and early voltage greater than 400 V. The transistor operated to voltages over 70 V. This device design reduces base contact resistance, and circumvented difficulties associated with the emitter mesa etch process. The Mg memory effect in MOCVD grown GaN HBTs is discussed, and MBE grown device layers are shown to produce sharp doping profiles. The low current gain of these devices is discussed, and an HBT with a compositionally graded base is presented, as well as simulations predicting further current gain improvements with base grading     

Degradation of InGaAs/InP single heterojunction bipolar transistors under high energy electron irradiation

The d.c. characteristics of InGaAs/InP single heterojunction bipolar transistors (SHBTs) were studied for the first time under high energy (1 MeV) electron radiation of cumulative dose up to 5.4×10¹⁵ electrons/cm². No degradation was observed for electron doses below 10¹⁵/cm². For electron doses greater than 10¹⁵/cm² the following degradation effects were observed: (1) decrease in collector current; (2) decrease in current gain up to 50%; (3) an increase in collector saturation voltage by 0.2–0.8 V depending on base current; and (4) increase in output conductance. The degradation of collector current and current gain are thought to be due to increased recombination caused by radiation-induced defects in the base–emitter junction. The increase in collector saturation voltage is attributed to an increase in emitter contact resistance after irradiation. The increase in the avalanche multiplication in the reverse biased base–collector junction caused by radiation induced defects is believed to be responsible for increased output conductance after irradiation.     

Current mode second breakdown in epitaxial planar transistors

Current mode second breakdown is a type of voltage "switchback" observed in epitaxial transistors. The phenomenon is initiated when the emitter is injecting at a collector voltage in excess of the collector-emitter sustaining voltage, and is characterized by delay and voltage fall times on the order of a nanosecond. The device can be sustained in the low voltage state only as long as there is sufficient charge to produce conductivity modulation within the collector-base depletion region. When the available charge is exhausted, the collector voltage will recharge at a rate determined by the external circuit. At some critical current density, the collector-base depletion region collapses toward the high conductivity substrate. The electric field within the depletion region increases as the depletion region width narrows, until avalanche occurs. The sustaining voltage will be determined by the bulk base-to-collector avalanche voltage. A consequence of this behavior is that most epitaxial transistors cannot operate stably in the LVCERmode, and switching-off unclamped inductive circuits with the emitter-base junction terminated in some finite resistance will lead to second breakdown.     

Photo carrier generation in bipolar transistors

Anomalous substrate currents have been observed in SiGe bipolar NPN-transistors, dependent on the collector bias, at high current levels. These currents appear to originate from light that is generated in the collector base junction when it is reverse biased. This light generates electron hole pairs in the n⁺ buried layer-substrate diode, yielding a considerable substrate current. This paper will show that these substrate currents can be used as a useful monitor for the occurrence of avalanche multiplication and high-level injection (Kirk effect) in heterojunction bipolar transistors (HBTs)     

Effect of reverse base current on bipolar and BiCMOS circuits

A detailed study on the effect of reverse base current (RBC) on the switching behavior of bipolar BiCMOS circuits utilizing advanced high-performance bipolar transistors is presented. It is shown that as the collector doping N_c is increased to overcome the Kirk effect (base stretching) during the switching transient, the avalanche-generated reverse base current in the collector-base junction may cause problems for bipolar output devices switching out of saturation. A basic bipolar inverter and various BiCMOS driver circuits were simulated based on measured avalanche multiplication factors from advanced bipolar transistors with various collector doping N _c. In the case of the basic bipolar inverter, the reverse base current may prevent the switching device from being shut off completely during the on-to-off transition and a self-sustained state may result which reduces the output voltage swing. For the common-emitter (CE) BiCMOS driver, a similar self-sustained state may also occur with the added adverse effect of excessive leakage in standby. Design and scaling considerations are discussed     

由等价掺杂转换理论得到非对称线性缓变P-N结的击穿特性

基于等价掺杂转换理论的应用,得到了解析计算非对称线性缓变P-N结击穿特性.由于非对称线性缓变P-N结是单扩散P-N结的一个恰当近似,因而,研究其击穿特性可以更好地理解和设计功率器件P-N结的终端结构.运用等价掺杂转换方法的基本理论得到了不同扩散掺杂梯度和衬底浓度组合系列的击穿电压.研究了最大耗尽层宽度在扩散侧和衬底侧的扩展,给出了它们随扩散掺杂梯度和衬底浓度组合的变化而出现的不同特点.本方法预言的最大击穿电压较之单纯的突变结和对称线性缓变P-N结更接近文献报道的结果,显示了等价掺杂转换理论的理论计算非对称线性缓变P-N结击穿电压的有效性.     

由等价掺杂转换理论得到非对称线性缓变P-N结的击穿特性

基于等价掺杂转换理论的应用,得到了解析计算非对称线性缓变P-N结击穿特性.由于非对称线性缓变P-N结是单扩散P-N结的一个恰当近似,因而,研究其击穿特性可以更好地理解和设计功率器件P-N结的终端结构.运用等价掺杂转换方法的基本理论得到了不同扩散掺杂梯度和衬底浓度组合系列的击穿电压.研究了最大耗尽层宽度在扩散侧和衬底侧的扩展,给出了它们随扩散掺杂梯度和衬底浓度组合的变化而出现的不同特点.本方法预言的最大击穿电压较之单纯的突变结和对称线性缓变P-N结更接近文献报道的结果,显示了等价掺杂转换理论的理论计算非对称线性缓变P-N结击穿电压的有效性.     

Temperature-dependent study of a lattice-matched InP/InGaAlAsheterojunction bipolar transistor

In this work, we report the temperature-dependent characteristics of a new InP/InGaAlAs heterojunction bipolar transistor (HBT). In order to improve the dc performance of conventional InGaAs-based single HBTs, the quaternary In_0.53Ga_0.34Al_0.13As with a wider bandgap is employed as the material for both the base and collector layers. Experimentally, the studied device exhibits a relatively high common-emitter breakdown voltage and low output conductance even at high temperature. Based on the breakdown mechanism of avalanche multiplication, the negative temperature dependence of breakdown voltage is attributed to the positive temperature-dependent impact ionization coefficient. Furthermore, the temperature dependence of current gain is investigated and reported. It is believed that the suppression of hole injection current with decreasing temperature is responsible for the opposite variation of current gains at high current levels