Role of barrier and buffer layer defect states in AlGaN/GaN HEMT structures

We have used low energy electron-excited nanoscale luminescence spectroscopy (LEEN) to detect the defects in each layer of AlGaN/GaN HEMT device structures to correlate their effect on two-dimensional electron gas (2DEG) confinement. Also, we have used Auger electron spectroscopy (AES) to detect the chemical composition as a function of lateral position on a growth wafer and to correlate chemical effects with electronic properties. We investigated several high-quality AlGaN/GaN heterostructures of varying electrical properties using incident electron beam energies of 0.5–15 keV to probe electronic state transitions within each of the heterostructure layers. The LEEN depth profiles reveal differences between sucessful and failed structures and highlight the importance of acceptor deep defect levels in the near 2DEG region. Variations in the GaN and AlGaN band edge emissions, as well as the yellow defect emission across an AlGaN/GaN heterostructure growth wafer have been observed. AES and LEEN spectroscopy of the growth wafer suggest that variation in the cation concentration may play a role in the mechanism responsible for the deep aceceptor level emission in the AlGaN barrier layer.     

Investigation of top-emitting OLEDs using molybdenum oxide as anode buffer layer

A high-effective bottom anode is essential for high-performance top-emitting organic light-emitting devices (OLEDs). In this paper, Ag-based top-emitting OLEDs are investigated. Ag has the highest reflectivity for visible light among all metals, yet its hole-injection properties are not ideal for anodes of top-emitting OLED. The performance of the devices is significantly improved using the molybdenum oxide as anode buffer layer at the surface of Ag. By introducing the molybdenum oxide, the hole injection from Ag anodes into top-emitting OLED is largely enhanced with rather high reflectivity retained.     

基于CuBB为阴极缓冲层有机太阳能电池性能的研究

通过定向合成Cu(I)配合物,首次将 其作为阴极缓冲层引入到有机太阳能电池(OSCs)中。实验分析发现,OSCs的光电能量转换效 率(PCE)与CuBB层厚度紧密相关,在标准太阳 光照条件下,结构为ITO/CuPc (20nm)/C60(40nm)/CuBB (x m m)/Al (100nm)的器件PCE随着CuBB厚度的增加 先增大后变小,当厚为8nm 时PCE达到0.94%。器件性能提高的原因主要是CuBB具有良好 的电子迁移率,但厚度过大时则由于串联电阻增加及电子不能经阴极缓冲层传输而使性能降 低。     

Fabrication and electrical characterization of phase-change memory devices with nanoscale self-heating-channel structures

We proposed a material composition and an optimized patterning process for the phase-change memory devices with a nanoscale self-heating channel (NSC) structures. As a suitable composition, Ge₁₈Sb₃₉Te₄₃ was employed, which is the 22% Sb-excessive phase compared with the conventional Ge₂Sb₂Te₅. For fabricating the NSC memory devices, Ge₁₈Sb₃₉Te₄₃ layer was patterned into a thin channel having enlarged pad areas at both sides end by the developed two-step dry etching technique using a TiN hard mask. The NSC memory devices showed such good behaviors as lower power operations without any degradation of switching speed and better endurance for cyclic rewritings even in the scaling regime of tens-of-nanometer size. It can be concluded from the obtained results that the proposed NSC memory devices promise the feasibility for realizing both aggressive scaling with a simpler process and enhanced memory performances for the phase-change nonvolatile memory applications.     

Performance improvement mechanisms of pentacene-based organic thin-film transistors using TPD buffer layer

To improve the performances of pentacene-based organic thin-film transistors (OTFTs), a TPD buffer layer was inserted between the Au metal electrode and the pentacene channel layer. As shown by the ultraviolet photoelectron spectroscopy measurement, the Au work function was increased from 4.61 eV for Au in direct contact with pentacene to 4.74 eV and 4.78 eV for the sample inserted with 2-nm-thick and 3-nm-thick TPD buffer layers, respectively, between the Au metal electrode and the pentacene channel layer. Moreover, the contact resistance was reduced from 1 MΩ to 0.1 MΩ by inserting a 2-nm-thick TPD buffer layer. Compared with the transconductance of 2.67 × 10^?7 S, the field-effect mobility of 0.46 cm²/V s, and the substhreshold swing of 1.78 V/decade for the conventional pentacene-based OTFTs without TPD buffer layer, the transconductance, the field-effect mobility, and the subthreshold swing were improved to 9.77 × 10^?7 S, 1.68 cm²/V s, and 1.46 V/decade, respectively, for the pentacene-based OTFTs inserted with a 2-nm-thick TPD buffer layer. By considering the trade-off between the increase of Au work function and the tunneling effect, the optimal thickness of the TPD buffer layer in the pentacene-based OTFTs was 2 nm.     

Enhanced OLED performance upon photolithographic patterning by using an atomic-layer-deposited buffer layer

This study addresses the problem of patterning-induced degradations to organic light-emitting diodes (OLEDs) by using a thin (10 Å) atomic-layer-deposited (ALD) Al₂O₃ film as both an electron-injection layer and a protecting layer for the electroluminescent material, poly[1-methoxy-4-(2′-ethyl-hexyloxy)-2,5-phenylene vinylene] (MEH-PPV). With the ALD Al₂O₃ film, the OLEDs not only withstood an aggressive photolithographic patterning process without any degradation but unprecedentedly showed increased luminous efficiency (by 100%) and lowered turn-on voltage (by 19%) afterward. Although the ALD precursor, trimethylaluminum (TMA), was found to damage the MEH-PPV layer through electrophilic addition to the vinylene groups of MEH-PPV during the deposition of the Al₂O₃ film, its damaging effect was eliminated by pre-treating the MEH-PPV surface with isopropyl alcohol (IPA), whose hydroxyl groups scavenged TMA throughout the ALD process. The performance of the photo-patterned OLEDs was further improved by using a high-conductivity hole-injection layer, which increased accumulation of holes at the EL–buffer interface to enhance electron injection. The method reported herein improves the applicability of photolithography to OLED fabrication, promising to resolve the issue of patterning that has in part impeded OLED’s commercialization.     

Synthesis of low resistivity complex oxides on MgO using Pt as buffer layer

Highly crystalline SrRuO₃ (SRO) and La_0.5Sr_0.5CoO₃ (LSCO) thin films were deposited on (100) Pt/ MgO by pulsed laser deposition. The films were mainly (001) textured normal to the substrate surface with a high degree of in-plane orientation with respect to the substrate’s major axes. These films were characterized using x-ray diffraction, Rutherford backscattering, four-point probe resistivity measurement, and transmission electron microscopy. The room temperature resistivity for LSCO and SRO films on Pt/MgO was found to be ∼35 and ∼40 μΩ-cm, respectively. An ion beam minimum channeling yield of ∼43% and ∼33% was obtained for LSCO and SRO films, respectively. The interface between Pt and oxide was found to be smooth and free from any interfacial diffusion. This result showed that high-quality low resistivity oxide thin films can be deposited on Pt.     

基于MoO3和Re-Bphen修饰有机太阳能电池性能的研究

有机太阳能电池(OSCs)的性能与材料及器件结构密切相关。以MoO3为阳极缓冲层,有机金属配合物Re-Bphen为阴极缓冲层,制备了结构为ITO/MoO3/CuPc/C60/Re-Bphen/Al的OSCs。在标准太阳光照条件下,当MoO3和Re-Bphen的厚分别为5nm和8nm时实现了器件的最佳性能,能量转换效率(PCE)和器件寿命均显著提高。结合器件结构,分析了工作机制。     

Latch-up characterization using novel test structures andinstruments

A test structure for quickly determining the latch-up sensitivity of different geometries and the technological solutions in CMOS processes is presented. The structure permits the measurement of triggering and holding voltages with a simple oscilloscope and a voltage source. The device consists of an integrated astable oscillator (based on a p-n-p-n structure) that must be characterized. The good behavior of the measurement set-up is demonstrated by designing, fabricating and characterizing the latch-up of two different CMOS technologies using the test structure and instruments. Furthermore, the use of simple digitizing oscilloscopes facilitates obtaining statistical latch-up data     

Fabrication and characterization of urchin-like polyaniline microspheres using lignosulfonate as template

An urchin-like conducting microsphere was fabricated by synthesizing polyaniline, PANI, with lignosulfonate, LGS. FESEM images showed that this special PANI structure was controllably formed because the pure PANI presented only a nanofiber formed mat, and the PANI/LGS mixture with the ANI/LGS ratio (%) at 36/1 and 18/1 formed spheres while the PANI nanofibers lied on spherical surface, and only at 9/1 led the PANI nanofiber to stand on sphere surface in the urchin-like structure. Taking the pure PANI as a reference, the urchin-like PANI/LGS microsphere has been found to have enhanced conductivity and thermal stability.     

Fabrication and characterization of PZT-PMWSN thin film using pulsed laser deposition

Thin PZT films are being developed for use in sensor and actuator application in micromechanical systems. For the use as sensor and actuator, it is desirable to combine high mechanical quality factor (Q_m) with high piezoelectric constant (d) and high electro-mechanical coupling factor (k_p). We fabricated PbZr_xTi_1−xO₃-Pb(Mn,W,Sb,Nb)O₃ (PZT-PMWSN) targets with variations in the Zr/Ti ratio. The dielectric and piezoelectric properties of PZT-PMWSN ceramics were investigated as a function of Zr/Ti ratio. At the Zr/Ti ratio of 0.52/0.48, the electrical coupling factor (k_p) and the mechanical quality factor (Q_m) showed a maximum value of 0.56 and 2344, respectively. The PZT-PMWSN thin film has been prepared on a Pt/Ti/SiO₂/Si substrate using pulsed laser deposition method. The structural property was characterized with XRD, SEM and ferroelectric hysteresis loop measurement were used to characterize the electrical properties of PZT-PMWSN thin film.     

Fabrication of vertical optical interconnecting structure using photoresist reflowed mold structures

This paper demonstrates a simple fabrication process of an optical via structure which includes curved optical reflector. The fabrication process consists of two separate processes. Initially, the device master structure, for subsequent embossing processes, is fabricated using conventional photolithography process and thermal reflow process. The second process fabricates a PDMS mould using the master structure, and embosses the master structure shape on a glass substrate using a UV embossing process. Demonstration is performed using the replica and a green laser source. The replicated device showed successful vertical redirection of the inserted light, and proved its usability as an optical via structure.     

Nylon-jacketed optical fibre with silicone buffer layer

We have developed an optical fibre having a silicone buffer layer which is stable against various environmental attacks. The transmission loss of the fibre after cabling was only 2.3 dB/km at 0.85 ?m.     

Modeling buffer layer IGBTs for circuit simulation

The dynamic behavior of commercially available buffer layer IGBTs is described. It is shown that buffer layer IGBTs become much faster at high voltages than nonbuffer layer IGBTs with similar low voltage characteristics. Because the fall times specified in manufacturers' data sheets do not reflect the voltage dependence of switching speed, a new method of selecting devices for different circuit applications is suggested. A buffer layer IGBT model is developed and implemented into the Saber circuit simulator, and a procedure is developed to extract the model parameters for buffer layer IGBTs. It is shown that the new buffer layer IGBT model can be used to describe the dynamic behavior and power dissipation of buffer layer IGBTs in user-defined application circuits. The results of the buffer layer IGBT model are verified using commercially available IGBTs     

An integratable dual metal gate CMOS process using an ultrathin aluminum nitride buffer layer

We propose and demonstrate a novel approach for dual metal gate CMOS process integration through the use of a very thin aluminum nitride (AlN/sub x/) buffer layer between metal and gate oxide. This buffer layer prevents the gate oxide from being exposed to a metal etching process which potentially causes oxide thinning and damage. Subsequent annealing consumes the very thin AlN/sub x/ layer and converts it into a new metal alloy film by reacting with gate metals, resulting in no increase in EOT due to this buffer layer. The work function of the original gate metal is also modified as a result of its reaction with AlN/sub x/, making this approach extremely attractive for engineering the work function for dual metal gate CMOS applications.     

Fabrication and characterization of NEMS

We proposed a called“nano-fabrication based on MEMS technology”approach to realize the typical nano-electro- mechanical structures,such as integrated nano probe,ultrathin cantilever,silicon nano wire,and doubly clamped nano beam, to demonstrate the feasibility and advantages.We also introduced the characterization of nano structures based on laser vibrometer and piezoresistive effect,the latter method was first time applied to investigate a doubly daped nanobeam with a thickness of about 200 nm.     

Evaluation of LiNbO/sub 3/ intensity modulator using electrodes buried in buffer layer

For highly efficient operation, a new type LiNbO/sub 3/ Mach-Zehnder intensity modulator using electrodes buried in the buffer layer was designed and fabricated. The modulator was designed considering velocity matching between light and microwave, microwave propagation loss and characteristic impedance Z/sub 0/ of 50 Omega . This modulator for a 1.5 mu m wavelength operates with a V/sub pi / of 3.2 V, a 3 dB down bandwidth of 14 GHz and a temperature dependence of 17 mV/ degrees C.<>     

Sputtered growth of high mobility InN thin films on different substrates using Cu-ZnO buffer layer

This work reports the growth of c-plane textured InN thin films on Cu-ZnO buffered silicon, c-sapphire, bulk GaN and quartz substrates. A Cu-ZnO buffer layer was deposited on all the substrates before the growth of InN film. A highly c textured film was obtained on sapphire and quartz substrates. Structural properties were calculated using XRD and Raman analysis. It was observed that, induction of Cu-ZnO buffer layer reduced the lattice mismatch between Si/GaN substrates and InN film. The bandgap of the films was obtained using UV visible reflectance spectroscopy. Hall measurements show high mobility films in the range of 119–223 cm²/Vs and an electron concentration of 10¹⁹. These results are in good agreement with previous results but are first time recorded using RF magnetron sputtering. Surface topography of the films showed smooth surfaces, which are due to reduced lattice mismatch between film and the substrate.     

Investigations on electrical characteristics and reliability properties of MOS capacitors using HfAlOx on n-GaAs substrates

Radio frequency sputtering system is employed to fabricate metal oxide semiconductor (MOS) capacitors using an ultra-thin layer of HfAlO_x dielectric deposited on n-GaAs substrates with and without a Si interface control layer incorporated in between the dielectric and the semiconductor. Measurements are performed to obtain capacitance voltage (C–V) and current voltage (I–V) characteristics for GaAs/Si/HfAlO_x and GaAs/HfAlO_x capacitors under different constant voltage and constant current stress conditions. The variation of different electrical parameters such as change in interface trap density, hysteresis voltage with various values of constant voltage stress and the dependence of flat band voltage, fractional change in gate leakage current density, etc. with stress time are extracted from the C–V and I–V data for capacitors with and without a Si interlayer. Further the trap charge density and the movement of trap centroid are investigated for various injected influences. The dielectric breakdown and reliability properties of the dielectric films are studied using constant voltage stressing. A high time-dependent dielectric breakdown (TDDB, t_bd ? 1350 s) is observed for HfAlO_x gate dielectric with a silicon inter-layer under the high constant voltage stress at 8 V. Compared to capacitors without a Si interlayer, MOS capacitors with a Si interlayer exhibit improved electrical and breakdown characteristics, and excellent interface and reliability properties.     

基于聚焦离子束注入的微纳加工技术研究

提出了聚焦离子束注入（focused ion beam implantation,FIBI）和聚焦离子束XeF2气体辅助刻蚀（gas assisted etching,GAE）相结合的微纳加工技术。通过扫描电镜观察FIBI横截面研究了聚焦离子束加工参数与离子注入深度的关系。当镓离子剂量大于1.4×1017ion/cm2时,聚焦离子束注入层中观察到均匀分布、直径10～15nm的纳米颗粒层。以此作为XeF2气体反应的掩膜,利用聚焦离子束XeF2气体辅助刻蚀（FIB-GAE）技术实现了多种微纳米级结构和器件加工,如纳米光栅、纳米电极和微正弦结构等。结果表明该方法灵活高效,很有发展前途。