Design and simulation of integrated inductors on porous silicon in CMOS-compatible processes

We present a comprehensive approach of designing on-chip inductors using a CMOS-compatible technology on a porous silicon substrate. On-chip inductors realized on standard CMOS technology on bulk silicon suffer from mediocre Q-factor values partly because of the loss created by the Si substrate at higher frequencies, in addition to the metal losses. We examine the alternative of using porous Si as a thick layer isolating the Si substrate from the metallization in an otherwise standard CMOS technology. We present theoretical designs produced with full-wave Method-of-Moments simulations, verified by measurements in standard 0.18 μm CMOS technology using Al metallization. When porous Si is introduced in that technology, the same inductor metallization produced Q-factor enhancements of the order of 50%, compared to the same inductor on bulk crystalline silicon. We also produce optimized single-ended inductor designs using Cu on porous Si, in a 0.13 μm-compatible CMOS technology. The resulting Q-factors are enhanced by a factor of 2 and reach values of 30 or more in the 2–3 GHz frequency range. Even higher quality factors can be obtained in this technology when differential designs are used.     

Carrier transport in porous silicon

Carrier transport in porous silicon layers has been studied by the time-of-flight method in the strong injection mode at temperatures T=290–350 K and electric field strengths F=(1.5–7)×10⁴ V cm^?1. The electron and hole drift mobilities μ_e≈2×10^?3 cm² V^?1 s^?1 and μ_h≈6×10^?4 cm² V^?1 s^?1 were obtained at T=292 K and F=4×10⁴ V cm^?1. An exponential temperature dependence of drift mobility with activation energy of ～0.38 and ～0.41 eV for, respectively, electrons and holes was established. It is shown that the type of time dependences of the photocurrent associated with carrier drift and the superlinear dependence of the transit time on the reciprocal of the voltage applied to a sample allow use of the concept of space-charge-limited currents under the conditions of anomalous dispersive transport. The experimental data are accounted for in terms of the model of transport controlled by carrier trapping into localized states with energy distribution near the conduction and valence band edges described by an exponential function with a characteristic energy of ～0.03 eV.     

Microlens fabricated in silicon on insulator using porous silicon

In order to realize the planar gradient refractive index (GRIN) microlens which is based upon porous silicon (PSi) and fabricated on silicon on insulator (SOI), a novel anodization method is used by applying lateral electric field. The microlens with smooth variation of the effective optical thickness is achieved. The lens is transparent in the infrared region, including the optical communication window (1.3 μm<λ<1.6 μm). This approach also allows the fabrication of an array of such lenses on SOI, and the GRIN microlens can be used as potential components in future silicon-based integrated optical circuits.     

NH3／H2O2溶液腐蚀下多孔硅光致荧光

用光致荧光谱、傅里叶变换红外光谱（ＦＴＩＲ）和扫描电子显微镜（ＳＥＭ）对用阳极氧化法制成的多孔硅层在１％ＮＨ３／Ｈ２Ｏ２溶液中的腐蚀现象进行了研究。红外分析表明，Ｓｉ－Ｏ键和Ｈ－Ｏ键的强度随ＮＨ３／Ｈ２Ｏ２溶液的腐蚀时间的增加而增加，Ｓｉ－Ｈ键强主匠随腐蚀时间增加而减少。光致荧光谱的峰值在腐蚀开始时先下降后上升，半高宽变窄，谱峰的以边明显蓝移。分析研究表明，１％ＮＨ３／Ｈ２Ｏ２溶液对多孔硅层有腐蚀     

多孔硅的孔隙对硫化锌/多孔硅光电性质的影响

为了研究衬底多孔硅(PS)的孔隙对硫化锌/多孔硅(ZnS/PS)复合体系的光学性能和电学性质的影响,采用脉冲激光沉积方法在不同孔隙度的PS衬底上沉积了硫化锌薄膜。利用X射线衍射仪、扫描电子显微镜、荧光分光光度计和Ⅰ-Ⅴ特性曲线分别研究了PS衬底上ZnS薄膜的晶体结构、表面形貌和ZnS/PS复合体系的光学和电学性质。结果表明,沉积的ZnS薄膜呈立方相晶体结构,沿β-ZnS(111)晶向择优取向生长。随着衬底PS孔隙的增多,ZnS薄膜衍射峰的强度减小,且薄膜表面出现一些空洞和裂缝;在ZnS/PS复合体系的光致发光谱中,PS的发光相对于未沉积ZnS薄膜的PS有所蓝移,随着PS孔隙的增多,该蓝移量增大,而且在光谱中间550nm左右出现了一个新的绿光发射,归因于ZnS的缺陷中心发光。ZnS的蓝、绿光与PS的红光相叠加,整个ZnS/PS复合体系呈现出较强的白光发射。ZnS/PS异质结的Ⅰ-Ⅴ特性曲线呈现出与普通二极管相似的整流特性,在正向偏置下,电流密度较大,电压降较低;在反向偏置下,电流密度接近于0。随着衬底PS孔隙的增多,正向电流增大。该项研究结果为固态白光发射器件的实现奠定了基础。     

Radiation hardness of porous silicon

The effect of irradiation by 300-keV Ar⁺ ions on the properties of electrochemically produced porous silicon is studied at doses of 5×10¹⁴–1×10¹⁶ cm⁻². Raman scattering and photoluminescence data are used to show that the radiation hardness of porous silicon layers is substantially greater than that of single crystal silicon. Fiz. Tekh. Poluprovodn. 31, 1126–1129 (September 1997)     

Changes in properties of a 〈porous silicon〉/silicon system during gradual etching off of the porous silicon layer

Scanning electron microscopy has shown etching of a porous silicon layer in an HF solution to be irregular. The intensity of porous silicon photoluminescence significantly decreases during gradual etching off, and its peak initially shifts to shorter and then to longer wavelengths. Under red-light pulse excitation, photo-voltage measurements have shown that the boundary potential ?_s of the p-Si substrate is positive, and ?_s grows with the etching time and as the temperature decreases from 300 to 200 K. At T<230 K, the photomemory of ?_s caused by nonequilibrium electron capture by p-Si boundary traps is observed. The concentration of shallow traps and boundary electron states in p-Si increases as porous silicon is etched. At T<180 K, the system of boundary electron states is rearranged. Photovoltage measurements with white-light pulses have revealed electron capture at oxide traps of aged porous silicon.     

Isolation of silicon film grown on porous silicon layer

We have investigated a new technology for dielectric isolation of a Si film grown epitaxially on a porous silicon layer. After oxidation of the porous silicon layer, a Si on Ohcidized Porous Silicon(SOPS) structure can be obtained. It is proposed that micropores pinch off quickly in the interfacial region between the porous silicon layer and the epitaxial film. A minimum yield calculated from Rutherford backscattering spectra of the epitaxial silicon film is 5.3%, and an electron Hall mobility of 600cm²/V.s is obtained in the film with a carrier concentration of 1 x 10¹⁷ /cm³. MOSFETs were fabricated on the SOPS structure.     

Bending properties in oxidized porous silicon waveguides

The greatest limit in high-speed communications between different circuit blocks is due to the delays introduced by metal interconnections. Knock-down wire communication bottleneck is, therefore, one of the best goals that current research could reach in the field of fast electronics. A possible solution is to build fast optical links and even better if the technology is based on silicon. To attain these ends, we have made studies into possibility to fabricate optical waveguide based on oxidized porous silicon. In the last few years, such a device was realized and characterized. Waveguiding in the visible and in the near infrared was demonstrated, with propagation losses of about 3–5 dB/cm for a light with a wavelength of 632.8 nm. Moreover, a design feature of an integrated waveguide based on oxidized porous silicon is that it offers a spontaneous bending of the waveguiding layer at its ends. The edge bending is provided by a convex camber of a leading edge of forming porous silicon. This bending can be exploited to promote a vertical light output with no use of any additional devices. The paper discusses the properties of edge bending, evaluation of the light losses depending on the radius of curvature, and analysis of possibilities to reduce these losses.     

Transient photocurrent and photoluminescence in porous silicon

Transient photocurrent in porous silicon samples subjected to prolonged storage in air has been studied using the time-of-flight technique at temperatures in the range 300–350 K and electric field strengths of 10⁴–10⁵ V/cm. Photoluminescence has been studied in the same samples at T=300 K using time-resolved spectroscopy. A conclusion is made on the basis of comparison of the data obtained that localized states play important part in both the processes at characteristic times of these processes falling within the microsecond range.     

Carrier drift mobility in porous silicon carbide

The time-of-flight technique was used to determine the drift mobilities of electrons and holes in porous silicon carbide produced by surface anodization of n-type 4H-SiC wafers. The electron and hole mobilities at 300 K in an electric field of 10⁴ V/cm were μ_e=6×10^?3 and μ_h=3×10^?3 cm² V^?1 s^?1, respectively. The low values of the mobilities are accounted for by carrier capture in localized states.     

Kinetics of crack formation in porous silicon

Crack formation in electrochemical porous silicon has been experimentally and theoretically studied. It is established that the kinetics of porous silicon cracking can be described by the S-shaped Weibull distribution. This feature appears to be of general character; it may be observed during crack formation in other porous solid materials.     

Optoelectronic study in porous silicon thin films

A photoconductivity (PC) study in as deposited porous silicon (PS) thin films is presented in this work. PS thin films were produced by the electrochemical anodizing method at different anodizing times. The films surfaces were characterized by SEM and porosity was determined by gravimetric methods. Photoluminescence and PC measurements were taken at room temperature. The maximum of the photoluminescence spectra are located around 650 nm, whereas those of PC are placed around 400 nm. The maximum of the photoluminescence signal shifts toward short wavelengths as the quantum dimension of the material skeleton diminishes, while any spectral displacement of the photocurrent signal as the porosity of the material increases is not observed. The spectral position of the PC signal does not change because it is strongly affected by the large quantity of defects present in the sample surface which diminishes the mean free path of the carriers to reach the electrodes. In all the samples photocurrent is small around 10^?1 μA and the intensity of the signal goes down as the porosity increases. Two mechanisms exist that compete with one another, the carrier generation and recombination through light emission centers which diminish the photocurrent.     

Drift mobility of carriers in porous silicon

The drift mobility of carriers in porous silicon has been studied in a wide temperature range (190–360 K) at electric field strengths of 2×10³–3×10⁴ V/cm. An exponential temperature dependence of the hole drift mobility with an activation energy of d ～ 0.14 eV was established. The density of localized states controlling the transport is evaluated.     

Study of the processes of carbonization and oxidation of porous silicon by Raman and IR spectroscopy

Porous silicon layers were produced by electrochemical etching of single-crystal silicon wafers with the resistivity 10 Ω cm in the aqueous-alcohol solution of hydrofluoric acid. Raman spectroscopy and infrared absorption spectroscopy are used to study the processes of interaction of porous silicon with undiluted acetylene at low temperatures and the processes of oxidation of carbonized porous silicon by water vapors. It is established that, even at the temperature 550°C, the silicon-carbon bonds are formed at the pore surface and the graphite-like carbon condensate emerges. It is shown that the carbon condensate inhibits oxidation of porous silicon by water vapors and contributes to quenching of white photoluminescence in the oxidized carbonized porous silicon nanocomposite layer.     

High-performance inductors integrated on porous silicon

To study the substrate effect on inductor performance, several types of spiral inductors were fabricated on porous silicon (PS), p/sup -/ and p/sup +/ silicon substrate. /spl pi/-network analysis results show that the use of PS effectively reduces the shunt conductance and capacitance. The analysis further shows that the use of PS significantly reduces the eddy current portion of series resistance of inductor, leading to slower increase of the apparent series resistance with increasing frequency. Higher Q-factor and resonant frequency (f/sub r/) result from the reduced shunt conductance, shunt capacitance, and frequency dependence of series resistance. Inductors fabricated on PS regions are subjected to a much less stringent set of constraints than those on bulk Si substrate, allowing for much higher inductance to be achieved without severe sacrifice in Q-factor and f/sub r/. Similarly, much higher Q-factor can be obtained for reasonable inductance and f/sub r/.     

Surface chemistry of porous silicon carbide

The anodization reaction of SiC using HF solution makes a porous silicon carbide (PSC) layer develop. The luminescence behavior of PSC, however, is somewhat different from that of porous Si in that the so-called blue shift is not observed. Though the quantum confinement effect is said to be responsible for light emission in porous SiC, the surface state of PSC plays an important role. The effects of thermal annealing under various atmospheres on the luminescence properties were studied. Some spectroscopic analyses were adopted to elucidate the surface chemistry of PSC. The surface of PSC, which seems to be an origin of the luminescence, had C-H termination but Si-H or Si-O bonds were not detected. X-ray photoelectron spectroscopy analysis also showed that the Si-O bond that usually exists on the surface of bulk SiC was depressed and a strong peak assigned to -CH- appeared. The oxidation treatment reconstructed the Si-O bonds on the PSC surface, and this surface depressed the luminescence. Two other thermal treatments also depressed the PL spectra from the higher energy region, which is due to alternation from C-H to C-C on the surface.     

多层多孔硅的SPM研究

多层我孔硅是采用交替变化脉冲腐蚀电流密度的方法制成的多孔度周期性变化的多孔硅结构,我们用ＡＦＭ对多层多孔硅结构的侧向解理的截面进行观测,得到了不同多孔度层及其界面处的图像。发现不同周期中相同条件下腐蚀得到的多孔硅层,其层厚随周期的不同而不同,从而限制了多孔硅发光峰半宽的缩小,对多层我孔硅的电化学同理作了初步的探讨。     

Free-standing luminescent layers of porous silicon

Free-standing layers of porous silicon with a thickness ranging from 50 to 200 μm have been fabricated using an electrolyte composed of HF and acetic acid. Chemical aspects of the etching process associated with the evolution of gases that favor detachment of layers from substrates are considered. The layers exhibit stable photoluminescence in the visible spectral region observed from both of their sides.     

Negative differential resistance of porous silicon

A porous silicon Al Schottky barrier diode shows differential negative resistance. The thin wires in porous silicon have much lower electron mobility than that of thick wires, due to electron surface scattering from space confinement. The energy of carriers in thick wires increases with applied bias. Some carriers can overcome the conduction-band discontinuity and flow into the thin wires. The negative differential resistance comes from the mobility difference between thick wires and thin wires in porous silicon.