共享存储器在通信卡中的应用

介绍了共享存储器模式的高速远程通信卡。为了做到与底层8031和8098控制监测模块高速远程通信，该卡采用了以8031单片机为核心，以共享存储器的方式与主CPU交换数据的设计，这样设计的优点是波特率的误差小，通信可靠性高，数据通信不需占用CPU的时间。     

公路运输监控仪中多机并行工作的实现

介绍一个基于单片机的多机并行工作的公路运输监控仪的结构及其微机间的通信设计;详细叙述微机间PIO通信及共享存储器通信方式的结构、通信协议以及通信过程.     

一个分散型控制系统中的网络通信

叙述了一个分散型控制系统中的网络通信，介绍了系统对网络通信的需求。在此基础上，重点介绍了应用层通信的两种方式：点对点通信和数据库刷新，以及网络通信的功能模块的划分、协议的工作过程和共享存储器接口的实现     

小型分布式控制系统中共享存储器的使用

介绍在小型分布式控制系统中,使用共享存储器作为主机和通信处理器的接口,以提高系统的实时响应能力。叙述了主机和通信处理器在访问共享存储器时可能发生的冲突的解决方法,以及主机和通信处理器接口协议及其实现方法。     

用GAL实现双8031并行通信控制逻辑

本文介绍了基于共享存储器的双机并行通信的设计方法，重点论述了ＧＡＬ在公用ＲＡＭ控制逻辑设计中的应用及编程方法。     

单片机与微机间基于存储器共享式的多路远程通信

该文分析了目前单片机与微机间通信的几种常用方法,在此基础上,提出了一种采用RS-422A标准,基于单片机与微机共享存储器的多路、远程通信方法,具有结构简单,通信可靠的特点,可以灵活方便地实现任意两点间的通信。     

一个分散型控制系统中通信协议的实现

本文叙述一个分散型控制系统中的网络通信,介绍了系统对网络通信的需求,在此基础上,叙述应用层通信的两种方式：点对点通信和数据库刷新。阐述了网络通信的功能模块的划分,协议的工作过程,以及共享存储器接口的实现。     

单片机与微机间基于存储器共享式的多种远程通信

该文分析了目前单片机与微机间通信的几种常用方法，在此基础上，提出了一种采用ＲＳ－４２２Ａ标准，基于单片机与微机共享存储器多种，远程通信方法，具有结构简单，通信可靠的特点，可以灵活方便地实现任意两点间的通信。     

并发式多 CPU监测和控制系统

本文介绍了并发式多ＣＰＵ监测和控制系统的系统结构，主要技术措施，主ＣＰＵ模块和从ＣＰＵ模块之间的相互关系，通信模式，各模块的管理，共享存储器的访问以及系统与计算机之间的通信。     

并发式多CPU监测和控制系统

本文介绍了并发式多ＣＰＵ监测和控制系统的系统结构，主要技术措施，主ＣＰＵ模块和从ＣＰＵ模块之间的相互关系，通信模式，各模块的管理，共享存储器的访问以及系统与计算机之间的通信。     

Super－Object模型：在分布存储器多计算机上实现共享存储器程序设计模式

Ｓｕｐｅｒ－Ｏｂｊｅｃｔ模型提出了一种新的方法，在分布存储器多计算机上实现语言级虚拟共享存储器以支持共享存储器通信模式．Ｓｕｐｅｒ－Ｏｂｊｅｃｔ模型引入新的概念ｓｕｐｅｒ－ｏｂｊｅｃｔ，不同于其它模型，基于ｓｕｐｅｒ－ｏｂｊｅｃｔ，它提出了新的共享数据定位方法，全局地址标识（ｎａｍｅ，ｏｆｆ－ｓｅｔ）．Ｓｕｐｅｒ－Ｏｂｊｅｃｔ模型与Ｆｏｒｔｒａｎ７７结合，我们实现了一个运行时间系统和库调用，支持程序员使用Ｆｏｒｔｒａｎ语言编写并行程序，最后介绍了系统的实现和取得的性能．     

基于Linux的软件DSM实现

分布式共享存储系统在分布式存储器的基础上构造逻辑上的共享存储模型。提出了在操作系统层实现分布式共享存储的系统框架，并以Linux操作系统为平台介绍了其实现。该系统提供简单的调用接口，并与Linux内存管理框架紧密结合。通过采用合适的DSM一致性协议提高了整体性能。     

多核处理器中混合分布式共享存储空间的实时划分技术

在多核处理器芯片中,分布式共享存储DSM虽然提供了统一的全局寻址的存储空间,但却引入了虚地址向实地址转换的开销,这对性能产生了负面的影响。我们注意到,在并行程序的执行过程中,被处理的数据属性(私有或共享)并不是一成不变的。并行程序中不同的数据具有不同的属性,即使同一数据在程序的不同执行阶段也可能具有不同的属性。本文首先详细地阐述了一种混合式的分布式共享存储空间,支持对共享数据采用全局寻址的虚地址访问而对私有数据采用快速寻址的实地址访问;进而提出了一种针对混合式的分布式共享存储空间的实时划分技术。该技术根据并行程序中数据的属性,在程序运行时,实时地调整和划分分布式共享存储空间。当数据为私有时,通过实地址访问加快数据的访问速度,当数据为共享时则维持虚地址访问,从而减少整个并行程序运行过程中的地址转换开销,提高系统的性能。实际应用程序的实验结果表明,与传统的分布式共享存储空间相比,实时划分的混合式的分布式共享存储空间具有性能优势,性能的提升比例与具体的网络规模、计算规模、并行程序映射方式等有关。在我们的实验中,性能的提升比例最高为13.14%,最低为6.98%。     

A cost-effective heuristic to schedule local and remote memory in cluster computers

Cluster computers represent a cost-effective alternative solution to supercomputers. In these systems, it is common to constrain the memory address space of a given processor to the local motherboard. Constraining the system in this way is much cheaper than using a full-fledged shared memory implementation among motherboards. However, memory usage among motherboards can be unfairly balanced.     

Porting industrial codes and developing sparse linear solvers on parallel computers

We address the main issues when porting existing codes from serial to parallel computers and when developing portable parallel software on MIMD multiprocessors (shared memory, virtual shared memory, and distributed memory multiprocessors, and networks of computers). We discuss the use of numerical libraries as a way of developing portable and efficient parallel code. We illustrate this by using examples from our experience in porting industrial codes and in designing parallel numerical libraries. We report in some detail on the parallelization of scientific applications coming from Centre National d'Etudes Spatiales and from Aérospatiale, and we illustrate how it is possible to develop portable and efficient numerical software by considering the parallel solution of sparse linear systems of equations.     

一个求图的连通分支的并行算法

已知一个无向图G(V,E),|V|=n,|E|=m,本文基于SIMD共享存贮模型,运用数据在图中快速传播原理,建议了一个新的求图的连通分支算法,具体来讲,在SIMD—CREW共享存贮模型上,求图的连通分支需O(log²n)时间、O(n²/logn)处理器;而在SIMD—CRCW共享存贮模型上需O(logn)时间、O(n²)处理器,建议的算法同著名的Hirschberg算法相比,其主要差别表现在:1)采用的求解方法不同;2)建议的算法简单易懂     

基于OpenMP的事务存储同步语义研究

多核处理器环境下必须解决多核处理器的并行编程问题,才能够充分发挥多核处理器的性能.事务存储(Transactional Memory)机制提供了一种在多核环境下程序并行执行和同步的方法.已有的工作已将事务存储扩展到了OpenMP,为程序员提供满足事务原子性、一致性和隔离性的共享存储访问.但当前事务存储的语义并不完善,事务间不能交换中间结果,不能实现锁的部分语义.提出并实现了一种基于开放嵌套的事务存储的同步语义,从而解决了事务间不能交换中间结果的问题,增强了扩展事务存储后OpenMP的并行编程能力.     

Design and Implementation of an Extended Collectives Library for Unified Parallel C

Unified Parallel C(UPC) is a parallel extension of ANSI C based on the Partitioned Global Address Space(PGAS) programming model,which provides a shared memory view that simplifies code development while it can take advantage of the scalability of distributed memory architectures.Therefore,UPC allows programmers to write parallel applications on hybrid shared/distributed memory architectures,such as multi-core clusters,in a more productive way,accessing remote memory by means of different high-level language constructs,such as assignments to shared variables or collective primitives.However,the standard UPC collectives library includes a reduced set of eight basic primitives with quite limited functionality.This work presents the design and implementation of extended UPC collective functions that overcome the limitations of the standard collectives library,allowing,for example,the use of a specific source and destination thread or defining the amount of data transferred by each particular thread.This library fulfills the demands made by the UPC developers community and implements portable algorithms,independent of the specific UPC compiler/runtime being used.The use of a representative set of these extended collectives has been evaluated using two applications and four kernels as case studies.The results obtained confirm the suitability of the new library to provide easier programming without trading off performance,thus achieving high productivity in parallel programming to harness the performance of hybrid shared/distributed memory architectures in high performance computing.     

Time-predictable synchronization support with a shared scratchpad memory

Multicore processors need to communicate when working on shared tasks. In classical systems, this is performed via shared objects protected by locks, which are implemented with atomic operations on the main memory. However, access to shared main memory is already a bottleneck for multicore processors. Furthermore, the access time to a shared memory is often hard to predict and therefore problematic for real-time systems.This paper presents a shared on-chip memory that is used for communication and supports atomic operations to implement locks. Access to the shared memory is arbitrated with time division multiplexing, providing time-predictable access. The shared memory supports extended time slots so that a processor can execute more than one memory operation atomically. This allows for the implementation of locking and other synchronization primitives.We evaluate this shared scratchpad memory with synchronization support on a 9-core version of the T-CREST multicore platform. Worst-case access latency to the shared scratchpad is 13 clock cycles. Access to the atomic section under full contention, when every processor core wants access to acquire a lock, is 135 clock cycles.     

Shared memory consistency models: a tutorial

The memory consistency model of a system affects performance, programmability, and portability. We aim to describe memory consistency models in a way that most computer professionals would understand. This is important if the performance-enhancing features being incorporated by system designers are to be correctly and widely used by programmers. Our focus is consistency models proposed for hardware-based shared memory systems. Most of these models emphasize the system optimizations they support, and we retain this system-centric emphasis. We also describe an alternative, programmer-centric view of relaxed consistency models that describes them in terms of program behavior, not system optimizations