Uniplanar techniques for monolithic microwave integrated circuits

`Uniplanar' techniques have recently been introduced for the design of monolithic microwave integrated circuits (MMICs). The aim of these techniques is to achieve a higher level of integration of circuitry and to overcome the need for through-substrate via holes and the related back-face processing steps. This is achieved by using coplanar waveguide (CPW), slotline, and miniature `thin-film microstrip' transmission-line media as opposed to conventional microstrip. The design and performance of a number of uniplanar MMIC couplers, amplifiers, and other test circuits fabricated using the GEC-Marconi (Caswell) foundry are described     

Optimization of diode structures for monolithic integrated microwave circuits

Device requirements of a medium power Ku-band reflective phase shifter are reviewed indicating a requirement for a diode with a 4-Terrahertz cut-off frequency. Various structures are examined to test their suitability for integration and feasibility for meeting specifications. A "pocket version" of a surface oriented device design is chosen and described. It is shown to meet or exceed all electrical requirements while providing for compatibility with final integration into the circuit.     

Approach for heat sinks in monolithic microwave integrated circuits

A planar electrode, placed at the symmetry plane of the odd mode of coupled microstrip, is proposed as a means for heat-sinking active devices in monolithic microwave integrated circuits.     

High-purity semi-insulating GaAs material for monolithic microwave integrated circuits

Liquid-Encapsulated Czochralski (LEC) growth of large-diameter bulk GaAs crystals from pyrolytic boron nitride (PBN) crucibles has been shown to yield high crystal purity, stable high resistivities, and predictable direct ion-implantation characteristics. Undoped (≲low 10¹⁴cm^-3chromium) and lightly Cr-doped (low 10¹⁵cm^-3range) -GaAs crystals, synthesized and pulled from PBN crucibles contain residual shallow donor impurities typically in the mid 10¹⁴cm^-3, exhibit bulk resistivities above 10⁷Ω . cm, and maintain the high sheet resistances required for IC fabrication (>10⁶Ω/□) after implantation anneal. Direct²⁹Si channel implants exhibit uniform (± 5 percent) and predictable LSS profiles, high donor activation (75 percent), and 4800- to 5000-cm²/V . s mobility at the (1 to 1.5) × 10¹⁷cm^-3peak doping utilized for power FET's. It has also been established that LEC crystals can provide the large-area, round     

Low-noise high electron mobility transistors for monolithic microwave integrated circuits

High electron mobility transistors (HEMT's) for monolithic microwave integrated circuits have been fabricated that have demonstrated excellent performance. External transconductance of 300 mS/mm is observed and noise figures of 1 and 1.8 dB with associated gains of 16.1 and 11.3 dB at 8 and 18 GHz, respectively, have been measured. These are comparable to the best reported noise figures for either HEMT's or MESFET's and are the highest associated gains reported for such low-noise figures. Analysis of these devices indicates that further improvements in these results is possible through optimization of HEMT layers and fabrication technology to reduce gate-source parasitic resistance.     

Periodic slow-wave low-loss structures for monolithic GaAs microwave integrated circuits

Slow-wave structures on GaAs semi-insulating substrate, obtained by periodically loading a coplanar line with high-Q overlap capacitors, are described. They operate up to X-band, reducing significantly the signal phase velocity by a factor nearly independent of the frequency. Owing to their low transmission losses, they are particularly suitable for monolithic GaAs f.e.t. circuits.     

Shielded passive devices for silicon-based monolithic microwave and millimeter-wave integrated circuits

This paper introduces floating shields for on-chip transmission lines, inductors, and transformers implemented in production silicon CMOS or BiCMOS technologies. The shield minimizes losses without requiring an explicit on-chip ground connection. Experimental measurements demonstrate Q-factor ranging from 25 to 35 between 15 and 40 GHz for shielded coplanar waveguide fabricated on 10 /spl Omega//spl middot/cm silicon. This is more than a factor of 2 improvement over conventional on-chip transmission lines (e.g., microstrip, CPW). A floating-shielded, differentially driven 7.4-nH inductor demonstrates a peak Q of 32, which is 35% higher than an unshielded example. Similar results are realizable for on-chip transformers. Floating-shielded bond-pads with 15% less parasitic capacitance and over 60% higher shunt equivalent resistance compared to conventional shielded bondpads are also described. Implementation of floating shields is compatible with current and projected design constraints for production deep-submicron silicon technologies without process modifications. Application examples of floating-shielded passives implemented in a 0.18-/spl mu/m SiGe-BiCMOS are presented, including a 21-26-GHz power amplifier with 23-dBm output at 20% PAE (at 22 GHz), and a 17-GHz WLAN image-reject receiver MMIC which dissipates less than 65 mW from a 2-V supply.     

CAD techniques for the electromagnetic design of monolithic millimetre-wave integrated circuits

It is well known that mm-waves have an important role to play in the rapid expansion of mobile and personal communications, mmic technology is an important factor since it can provide a means of mass producing the user terminal rf subsystems. Millimetre-wave integrated circuits do not yet however offer the high packing density and functionality which is now possible for lower frequency applications where lumped elements are used. This problem is influenced most of all by the extreme modelling difficulties encountered at frequencies above 30 GHz. This paper reviews the current state-of-the-art for cad techniques used in mmic design. It describes some limitations of the standard Smarttm library approach and looks at the application of commercial electromagnetic simulators in the design of both microstrip and cpw circuits.     

P-I-N isolation for monolithic integrated circuits

A new isolation scheme is described in which the device is fabricated in an intrinsic region isolated from other regions and from theP^{+}substrate by aP-I-Nstructure. Thus the component-to-substrate capacitance and the substrate resistance are reduced by one order of magnitude or more, and the coupling or crosstalk is consequently reduced by several orders of magnitude. The fabrication process involves only conventional epitaxy and diffusion techniques. The intrinsic regions are obtained through gold compensation. Compared toP-N-junction-isolated gold-doped integrated devices, theP-I-N-isolated circuits require only one additional step-a second epitaxial deposition. Preliminary experimental data giveP-I-Ncapacitance of about 0.013 pF/mil²and breakdown voltage of 200 volts.     

Pseudomorphic high electron mobility transistor monolithic microwave integrated circuits reliability study

Accelerated high temperature RF life testing was used to investigate the reliability of two-stage GaAs monolithic microwave integrated circuit (MMIC) power amplifiers based on 0.25 μm pseudomorphic high electron mobility transistor technology. Life testing was performed at elevated baseplate temperatures with MMICs operating at typical d.c. bias conditions and large signal RF drive levels of two dB compression. The resulting failure distribution was log normal and the estimated median life time extrapolated to a channel temperature of 140°C was 2.3×10⁶ h with an activation energy of 1.1 eV.     

Proton implantation isolation for microwave monolithic circuits

We show that proton implantation isolation effectively reduces RF losses for microwave monolithic integrated circuits and that the degree of effectiveness is a function of the induced damage depth. RF losses are mostly due to the current conduction in semiconducting active or buffer layer.     

Large-value monolithic resistors for micropower integrated circuits

The minimum power dissipation of micropower integrated circuits is often limited by the availability of large-value monolithic resistors. Two major types of field-effect resistor structures are examined and an analysis of the primary factors that determine sheet resistance and parasitic capacitance is presented. Resistor tolerance, linearity, and temperature coefficient are briefly discussed. It is shown that resistors with sheet resistances greater than 50 k/spl Omega///spl square/ and parasitic capacitances less than 0.002 pF/k/spl Omega/ can be readily fabricated in a monolithic structure.     

CAD techniques for microwave circuits

In little more than 10 years computer-aided design (CAD) of microwave circuits has moved from dumb terminals on mainframe computers to PCs, and now to powerful RISC workstations. Commercial CAD software now integrates the various stages of microwave circuit design: schematic capture, simulation and layout. This paper reviews the different CAD packages that are available for microwave circuit design. The basic principles employed in the modelling of microstrip circuits are introduced and the reasons for the extensive use of frequency-domain simulations are explored. The developments in nonlinear, electromagnetic and system-level simulation methods are described     

Tantalum oxide capacitors for GaAs monolithic integrated circuits

The performance of a high-yield tantalum oxide capacitor for use in GaAs monolithic microwave integrated circuits is described. The integral metal-insulator-metal sandwich structure is reactively sputter-deposited at low temperatures, compatible with a photoresist lift-off process, on semi-insulating GaAs substrate. Dielectric constants of 20-25 were achieved in the capacitors fabricated. An initial application of this process as an interstage coupling capacitor for a two-stage preamplifier is given.     

GaAs HBT's for microwave integrated circuits

The status of the microwave GaAs heterojunction bipolar transistor (HBT) technology is reviewed. Microwave circuits for advanced military and commercial systems continue to increase their dependence on the performance, functionality, and cost of active components fabricated using solid-state technology. The performance advantages provided by GaAs HBT's, for several critical circuit applications, have stimulated a worldwide development activity. Progress in HBT device technology and microwave circuit applications has been extremely rapid because of the broad availability of III-V compound semiconductor epitaxial materials and prior experience with GaAs field-effect transistors (FET's) and monolithic microwave integrated circuits (MMIC's). The great flexibility of HBT's in microwave circuits makes them prime candidates for applications in complex multifunctional microwave/digital IC's in next-generation systems     

GaAs integrated microwave circuits

GaAs has many desirable features that make it most useful for microwave and millimeter-wave integrated circuits. The process of selective epitaxial depositions of high purity single-crystal GaAs with various doping concentrations into semi-insulating GaAs substrates has been developed. These high-resistivity substrates (>10⁶ohm.cm) provide the electrical isolation between devices, eliminating the difficulties and deficiencies normally encountered in trying to obtain isolation with dielectrics, back-etching, p-n junctions, etc. This monolithic approach to integrated-circuits thus allows for improved microwave pedormance from the devices since parasitics are reduced to a minimum. Planar Gunn oscillators and Schottky barrier diodes have been fabricated for use in a completely monolithic integrated millimeter wave (94 GHz) receiving front end. The Gunn oscillators are made in a sandwich-type structure of three selective deposits whose carrier concentrations are approximately 10¹⁸-10¹⁵-10¹⁸cm^-3. The Schottky diodes consist of two deposits with concentrations of 10¹⁸and 10¹⁷cm^-3. The Schottky contact is formed by evaporating Mo-Au onto the 10¹⁷cm^-3deposits; all ohmic contacts are on the surface and are alloyed to the N⁺regions.     

Cost-size optima of monolithic integrated circuits

A generalized cost-size relationship is derived for a monolithic circuit consisting of N identical components, taking into account variations in component density, yield, and assembly costs with N. It is intended to reveal cost trends rather than give accurate results for specific cases and deals only with fabrication costs. A yield-area relationship is used which takes into account chip-to-chip variations in defect density. It is found that the ratio (circuit cost per component/cost of discrete transistor) is a minimum at a chip size which is determined primarily by the spot defect density on the device. This optimum chip size lies between approximately 20 and approximately 60 mils square for a wide range of parameter values. State-of-the-art parameter values indicate a potential order of magnitude cost saving in integrated circuits compared with discrete transistors. The minimum value for the cost ratio is in general inversely proportional to the maximum packing density of components on a semiconductor slice and has a limiting value approximately 1/8N, N0being the number of components which can be packed on the chip size normally used for transistors. Arrays of identical logic gates fit the circuit model used quite closely, and the curves indicate that the cost per gate in reasonably densely packed arrays can be less than the cost of a discrete transistor. The results also indicate that when systems requirements make it desirable to include larger numbers of components in one package than the optimum for one monolith, wired-chip schemes are preferable to single monoliths, the optimum chip size being smaller than that for a simple monolith.     

A new air-isolation process for monolithic integrated circuits

A new air-isolation process is described which overcomes many of the problems of existing isolation technologies. The process consists of standard integrated circuit processing except for the p-n junction isolation process which is omitted. After metal mask, the device wafer is glass bonded face down to a supporting silicon wafer. Subsequent backlapping, masking, and mesa etching steps yield an air-isolated integrated circuit. As one application of this technology, the fabrication of a radiation-hardened operational amplifier is described.     

The evolution of packages for monolithic microwave andmillimeter-wave circuits

The maturing of monolithic microwave integrated circuit (MMIC) technology has spawned a variety of new military and commercial applications. As-a result, there is an increased emphasis on the packaging of MMIC chips and MMIC-based components. Currently, the industry is applying a number of new assembly and packaging technologies to RF components and subsystems driven by the forces of performance, size and weight, and cost. This paper outlines the current evolution in microwave and millimeter-wave packaging using examples drawn from the area of active array antennas     

Quantitative high frequency-electric force microscope testing of monolithic microwave integrated circuits at 20 GHz

Recently, a High Frequency-Electric Force Microscope (HF-EFM) test system has been successfully used for contactless testing of internal electric signals in Monolithic Microwave Integrated Circuits (MMIC). Measurements up to operating frequencies of 110 GHz have been demonstrated. The underlying measurement principle is the heterodyne mixing technique which transforms HF-signals in a lower frequency range, where the detected signal can be easily processed further on. Different ways exist to realize the heterodyne mixing technique in an EFM. The normally used way, the so-called conventional mixing technique (CMT), generates the low frequency signal by mixing the to be measured MMIC internal test point signal with a second HF-signal of a slightly different frequency which is applied to the probe. However, this way of generating the low frequency signal excludes up to now a quantitative measurement of a high frequency test point signal. In this paper an alternative mixing technique, the so-called amplitude modulation technique (AMT), is introduced in order to overcome the disadvantages of the CMT and, additionally, simplify the experimental set up. Quantitative high frequency measurements at 20 GHz demonstrate the efficiency of this new technique.