A fully integrated V-band PLL MMIC using 0.15-/spl mu/m GaAs pHEMT technology

A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs. For V-band frequency division,a wideband divide-by-3 frequency divider is proposed using cascode FET-based harmonic injection locking. The fourth subharmonic mixer using anti-parallel diode pair is employed as a high-frequency phase detector. In this way, the required frequency of the reference oscillator is lowered to one twelfth of V-band output signal. An RC low-pass filter and DC amplifier are also integrated to effectively suppress the spurious and harmonic signals, and to increase the loop gain. To reduce the circuit interactions and frequency pulling effect, buffer amplifiers are used at the output of VCO and frequency divider. The fabricated V-band PLL MMIC shows the locking range of 840 MHz around 60.1GHz under a very low power dissipation of 370 mW. Good phase noise of -95.5 dBc/Hz is measured at 100 kHz offset. The chip size is as small as 2.35/spl times/1.80 mm/sup 2/. To the best of our knowledge, the PLL MMIC of this work is one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.     

A compact 43-GHz monolithic differential VCO in 0.5-/spl mu/m InP DHBT technology

A compact monolithic integrated differential voltage controlled oscillator (VCO) using 0.5-/spl mu/m emitter width InP/InGaAs double-heterostructure bipolar transistors with a total chip size of 0.42 mm /spl times/ 0.46 mm is realized by using cross-coupled configuration for extremely high frequency satellite communications system applications. The device performance of F/sub max/ greater than 320 GHz at a current density of 5 mA//spl mu/m/sup 2/ and 5-V BVceo allows us to achieve a low phase noise 42.5-GHz fundamental VCO with -0.67-dBm output power. The VCO exhibits the phase noise of -106.8 dBc/Hz at 1-MHz offset and -122.3 dBc/Hz at 10-MHz offset from the carrier frequency.     

Simple K-band MMIC VCO utilizing a miniaturized hairpin resonator and a three-terminal p-HEMT varactor with low phase noise and high output power properties

Presents a fully monolithic K-band MMIC voltage-controlled oscillator (VCO) implemented by using a 0.25 /spl mu/m AlGaAs/InGaAs pseudomorphic HEMT (p-HEMT) technology. The use of a half-wavelength miniaturized hairpin-shaped resonator and a three-terminal p-HEMT varactor was effective in reducing the chip size and simplifying fabrication processes of the microwave MMIC VCO without impairing the performance of the circuit. The VCO provides a typical output power of 11.5 dBm at 20.8 GHz and a free-running phase noise of -82 dBc/Hz at 100 kHz offset and -95 dBc/Hz at 1 MHz offset. It also shows a tuning range of 70 MHz with little reduction in output power and high yield properties. The chip size of the MMIC VCO is 1.5 /spl times/ 2.0 mm/sup 2/.     

Signal generation, control, and frequency conversion AlGaN/GaN HEMT MMICs

We review the design and experimental results of three new AlGaN/GaN high electron-mobility transistor monolithic microwave integrated circuits: a voltage-controlled oscillator (VCO), a single-pole-double-throw switch (SPDT), and a resistive field-effect transistor mixer. The VCO exhibits frequency range between 8.5-9.5 GHz with maximum output power of 35 dBm (at V/sub ds/=30 V) across a 50-/spl Omega/ load. The L/S band SPDT switch at 0.9, 1.8, and 2.1 GHz was measured to have 0.87-, 0.96-, 1-dB insertion loss and 46-, 42-, and 41-dB isolation, respectively. The switch also shows linear performance for the power levels up to 1 W in the insertion mode. A singly ended X-band resistive mixer has exhibited very low intermodulation, less than -60 dBc for the second and third harmonics of the IF at the RF power level of 10 dBm, and high power handling, P/sub 1 dB/ is estimated to be at least 1 W, with the conversion loss of 17 dB.     

紧凑型Ka波段PHEMT微波单片集成VCO

设计并流片制作了基于GaAs PHEMT工艺的Ka波段微波单片集成压控振荡器(MMIC VCO).该VCO具有紧凑、宽电调谐带宽及高输出功率的特点.提出了缩小芯片面积及增大调谐带宽的方法,同时还给出了设计MMIC VCO的基本步骤.该方法设计并流片制做的MMIC VCO的测量结果为:振荡频率为36±1.2GHz,输出功率为10士1dBm,芯片面积为1.3mm×1.0mm.     

Integrated VCO With Up/Down Converter for Si-Based 60 GHz WPAN Applications

This letter presents the design and implementation of the largest reported bandwidth of a 60 GHz up/down converter with an integrated voltage controlled oscillator (VCO) in a low-cost 0.18 mum silicon-germanium process. The up/down conversion is achieved using the 2X sub-harmonic passive mixing with anti-parallel diode pairs. A 30 GHz cross-coupled VCO is designed, optimized and integrated with the sub-harmonic mixer through a cascode amplifier to meet the local oscillator power requirements. The fully integrated chip takes only 1.5 mm² of silicon die area and consumes only 40 mW of dc power for a measured conversion loss of 12 dB at 61.5 GHz. The integrated up/down converter is measured to have greater than 9 GHz double-sided 3-dB RF bandwidth suitable for wideband high data-rate WPAN transceiver requirements. The VCO and VCO-amplifier test structures are separately fabricated and measured to have a phase noise as low as -105 dBc/Hz at 1 MHz offset with a tuning range of 2.3 GHz.     

A 2 V 1.8 GHz fully integrated CMOS dual-loop frequency synthesizer

A 2 V 1.8 GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a standard 0.5 /spl mu/m digital CMOS process for wireless communication. The voltage-controlled oscillator (VCO) required for the low-frequency loop is designed using a ring-type VCO and achieves a tuning range of 89% from 356 to 931 MHz and a phase noise of -109.2 dBc/Hz at 600 kHz offset from 856 MHz. With an active chip area of 2000/spl times/1000 /spl mu/m/sup 2/ and at a 2 V supply voltage, the whole synthesizer achieves a tuning range from 1.8492 to 1.8698 GHz in 200 kHz steps with a measured phase noise of -112 dBc/Hz at 600 kHz offset from 1.86 GHz. The measured settling time is 128 /spl mu/s and the total power consumption is 95 mW.     

GaAs Monolithic MIC's for Direct Broadcast Satellite Receivers

A 12-GHz low-noise amplifier (LNA), a 1-GHz IF amplifier (IFA), and an 11-GHz dielectric resonator oscillator (DRO) have been developed for DBS home receiver applications by using GaAs monolithic microwave integrated circuit (MMIC) technology. Each MMIC chip contains FET's as active elements and self-biasing source resistors and bypass capacitors for a single power supply operation. It also contairns dc-block and RF-bypass capacitors. The three-stage LNA exhibits a 3.4-dB noise figure and a 19.5-dB gain over 11.7-12.2 GHz. The negative-feedback-type three-stage IFA shows a 3.9-dB noise figure and a 23-dB gain over 0.5-1.5 GHz. The DRO gives 10.mW output power at 10.67 GHz, with a frequency stability of 1.5 MHz over a temperature range from -40-80°C. A direct broadcast satellite (DBS) receiver incorporating these MMIC's exhibits an overafl noise figure of /spl les/ 4.0 dB for frequencies from 11.7-12.2 GHz.     

Highly integrated 60 GHz transmitter and receiver MMICs in a GaAs pHEMT technology

Highly integrated transmitter and receiver MMICs have been designed in a commercial 0.15 /spl mu/m, 88 GHz f/sub T//183 GHz f/sub MAX/ GaAs pHEMT MMIC process and characterized on both chip and system level. These chips show the highest level of integration yet presented in the 60 GHz band and are true multipurpose front-end designs. The system operates with an LO signal in the range 7-8 GHz. This LO signal is multiplied in an integrated multiply-by-eight (X8) LO chain, resulting in an IF center frequency of 2.5 GHz. Although the chips are inherently multipurpose designs, they are especially suitable for high-speed wireless data transmission due to their very broadband IF characteristics. The single-chip transmitter MMIC consists of a balanced resistive mixer with an integrated ultra-wideband IF balun, a three-stage power amplifier, and the X8 LO chain. The X8 is a multifunction design by itself consisting of a quadrupler, a feedback amplifier, a doubler, and a buffer amplifier. The transmitter chip delivers 3.7/spl plusmn/1.5 dBm over the RF frequency range of 54-61 GHz with a peak output power of 5.2 dBm at 57 GHz. The single-chip receiver MMIC contains a three-stage low-noise amplifier, an image reject mixer with an integrated ultra-wideband IF hybrid and the same X8 as used in the transmitter chip. The receiver chip has 7.1/spl plusmn/1.5 dB gain between 55 and 63 GHz, more than 20 dB of image rejection ratio between 59.5 and 64.5 GHz, 10.5 dB of noise figure, and -11 dBm of input-referred third-order intercept point (IIP3).     

A K-band InGaP/GaAs HBT balanced MMIC VCO

A fully integrated K-band balanced voltage controlled oscillator (VCO) is presented. The VCO is realized using a commercially available InGaP/GaAs heterojunction bipolar transistor (HBT) technology with an f/sub T/ of 60 GHz and an f/sub MAX/ of 110 GHz. To generate negative resistance at mm-wave frequencies, common base inductive feedback topology is used. The VCO provides an oscillation frequency from 21.90 GHz to 22.33 GHz. The frequency tuning range is about 430 MHz. The peak output power is -0.3 dBm. The phase noise is -108.2 dBc/Hz at 1 MHz offset at an operating frequency of 22.33 GHz. The chip area is 0.84/spl times/1.00 mm/sup 2/.     

A Single-Ended Fully Integrated SiGe 77/79 GHz Receiver for Automotive Radar

A single-ended 77/79 GHz monolithic microwave integrated circuit (MMIC) receiver has been developed in SiGe HBT technology for frequency-modulated continuous-wave (FMCW) automotive radars. The single-ended receiver chip consists of the first reported SiGe 77/79 GHz single-ended cascode low noise amplifier (LNA), the improved single-ended RF double-balanced down-conversion 77/79 GHz micromixer, and the modified differential Colpitts 77/79 GHz voltage controlled oscillator (VCO). The LNA presents 20/21.7 dB gain and mixer has 13.4/7 dB gain at 77/79 GHz, and the VCO oscillates from 79 to 82 GHz before it is tuned by cutting the transmission line ladder, and it centres around 77 GHz with a tuning range of 3.8 GHz for the whole ambient temperature variation range from $- hbox{40},^{circ}{hbox{C}}$ to $+ hbox{125},^{circ}{hbox{C}}$ after we cut the lines by tungsten-carbide needles. Phase noise is $-$90 dBc/Hz@1 MHz offset. Differential output power delivered by the VCO is 5 dBm, which is an optimum level to drive the mixer. The receiver occupies 0.5 ${hbox{mm}}^{2}$ without pads and 1.26 ${hbox{mm}}^{2}$ with pads, and consumes 595 mW. The measurement of the whole receiver at 79 GHz shows 20–26 dB gain in the linear region with stable IF output signal. The input ${rm P}_{rm 1dB}$ of the receiver is $-$35 dBm.      

A novel self-oscillating HEMT-HBT cascode VCO-mixer using an activetunable inductor

Here we describe a unique Ka-band self-oscillating HEMT-HBT cascode mixer design which integrates an active tunable resonator circuit. The VCO-mixer MMIC integrates GaAs HEMT's and HBT's using selective molecular beam epitaxy (MBE) technology. The HEMT-HBT cascode active mixer operates similarly to a dual-gate mixer. The HBT of the cascode is used to construct a VCO by presenting the base with an HEMT tunable active inductor. The VCO can be tuned from 28.5 to 29.3 GHz while providing ≈0 dBm of output power. Operated as an upconverter, the MMIC achieves 6-9 dB conversion loss over a 31-39 GHz output frequency band. Using these active approaches, both VCO and mixer functions were integrated into a compact 1.44×0.76 mm² chip area. The active RF integrated circuit (IC) techniques presented here have direct implications to future high complexity millimeter-wave monolithic integrated circuits (MIMICs) for ultrahigh-speed clock recovery and digital radio applications     

A low-power oscillator mixer in 0.18-/spl mu/m CMOS technology

A downconversion double-balanced oscillator mixer using 0.18-/spl mu/m CMOS technology is proposed in this paper. This oscillator mixer consists of an individual mixer stacked on a voltage-controlled oscillator (VCO). The stacked structure allows entire mixer current to be reused by the VCO cross-coupled pair to reduce the total current consumption of the individual VCO and mixer. Using individual supply voltages and eliminating the tail current source, the stacked topology requires 1.0-V low supply voltage. The oscillator mixer achieves a voltage conversion gain of 10.9 dB at 4.2-GHz RF frequency. The oscillator mixer exhibits a tuning range of 11.5% and a single-sideband noise figure of 14.5 dB. The dc power consumption is 0.2 mW for the mixer and 2.94 mW for the VCO. This oscillator mixer requires a lower supply voltage and achieves a higher operating frequency among recently reported Si-based self-oscillating mixers and mixer oscillators. The mixer in this oscillator mixer also achieves a low power consumption compared with recently reported low-power mixers.     

A 25-GHz ultra-low phase noise InGaP/GaAs HBT VCO

A 25-GHz monolithic voltage controlled oscillator (VCO) has been designed and fabricated in a commercial InGaP/GaAs heterojunction bipolar transistor (HBT) process. This balanced VCO has a novel topology using a feedback /spl pi/-network and a common-emitter transistor configuration. Ultra-low phase noise is achieved: -106 dBc/Hz and -130 dBc/Hz at 100kHz and 1-MHz offset frequency, respectively. To the authors' knowledge, this is the lowest phase noise achieved in a monolithic microwave integrated circuit (MMIC) VCO at such high frequency. The single-ended output power is -1 dBm. It can be tuned between 25.33GHz and 25.75GHz using the base-collector junction capacitor of the HBT as a varactor. The dc power consumption is 90mW for a 9-V supply. An excellent figure-of-merit of -195 dBc/Hz is obtained.     

（英）一种基于透镜天线的宽带太赫兹准光检波器

设计了一种能够工作在140~325 GHz频带的宽带准光检波器,由一颗高阻硅透镜和单片集成检波芯片组成.设计并加工出双缝天线,在天线馈电端集成了肖特基二极管,该紧凑结构使其能够接收空间中的太赫兹辐射并转换为基带信号.为增强片上天线的方向性,利用MLFMM算法进行了扩展半球硅透镜的设计和优化,实现了良好的辐射特性.通过测试,天线在220 GHz和324 GHz处的辐射增益分别为26 dB和28 dB.在140~325 GHz,检波器测试得到的响应率可达到1 000~4 000 V/W,对应的等效噪声功率(NEP)估算为0.68~273 pW/Hz.     

Global quasi-optical Simulations of millimeter-wave receivers

This letter extends the finite difference time domain method to analyze millimeter-wave receivers. The full-wave active antenna modeling technique is designed to be applied to a quasi-optical receiver whereby the radio frequency and local oscillator power are fed in quasi-optically and received by the device functioning simultaneously as an antenna and a mixer. The millimeter-wave receiver being studied consists of an integrated annular slot element with a single planar Schottky barrier diode. Matching circuits and filters in coplanar waveguide line are connected to the annular slot design to create a low-profile receiver.     

A merged CMOS LNA and mixer for a WCDMA receiver

A low-noise amplifier (LNA) and mixer circuit in 0.35-/spl mu/m CMOS operates at 2.1 GHz. Merging the LNA and mixer lowers the number of transistors in the signal path and thereby also the nonlinearity and power consumption. The circuit meets the specifications for a direct conversion wide-band code-division multiple access (WCDMA) receiver. Its noise figure is 3.4 dB (5kHz to 5MHz), the total conversion gain is 23 dB, the third-order input-referred intercept point is -1.5 dBm, and the local oscillator leakage to the antenna is less than -71 dBm. The fully differential circuit takes 8 mA from a 2.7-V supply.     

A 108-GHz InP-HBT monolithic push-push VCO with low phase noise andwide tuning bandwidth

This paper reports on what is believed to be the highest frequency bipolar voltage-controlled oscillator (VCO) monolithic microwave integrated circuit (MMIC) so far reported. The W-band VCO is based on a push-push oscillator topology, which employs InP HBT technology with peak f_T's and f_max's of 75 and 200 GHz, respectively. The W-band VCO produces a maximum oscillating frequency of 108 GHz and delivers an output power of +0.92 dBm into 50 Ω. The VCO also obtains a tuning bandwidth of 2.73 GHz or 2.6% using a monolithic varactor. A phase noise of -88 dBc/Hz and -109 dBc/Hz is achieved at 1- and 10-MHz offsets, respectively, and is believed to be the lowest phase noise reported for a monolithic W-band VCO. The push-push VCO design approach demonstrated in this work enables higher VCO frequency operation, lower noise performance, and smaller size, which is attractive for millimeter-wave frequency source applications     

A 2.5-GHz InGaP/GaAs differential cross-coupled self-oscillating mixer (SOM) IC

This letter presents a monolithic differential cross-coupled self-oscillating mixer (SOM). The SOM chip is fabricated using an InGaP/GaAs heterojunction bipolar transistor (HBT) foundry process and operates at 2.5 GHz. The chip provides voltage controlled oscillator (VCO) operation, up- and down-conversion mixing, and injection locking functionalities. The voltage down-conversion gain and the power up-conversion gain of up to 15 and 11.5 dB, respectively, are measured for the circuit. There is a compromise between obtaining a high conversion gain, and the oscillator power (-0.3 dBm for a 5-V supply) and phase noise (-84 dBc/Hz at 100 kHz). However, phase noise improvement of 32dB is observed by injection of a -30-dBm stable reference.     

A 24-GHz Transmitter With On-Chip Dipole Antenna in 0.13-$mu$m CMOS

A fully integrated dual-conversion transmitter chain with an on-chip dipole antenna and an integer-N synthesizer operating in the 24-GHz Instrument, Scientific and Medical (ISM) band was fabricated in 0.13-mum CMOS. The choice of 24-GHz operation enables the integration of a 4-mm long antenna on chip. The transmitter chain can support data rate of 100 Mb/s. It provides 6-dBm output power to a 100-Omega load at 22.4 GHz with 152-mW power dissipation including that of a frequency synthesizer. At this output power level, the dual conversion architecture can mitigate the VCO pulling even when an antenna and a power amplifier are integrated on the same substrate as the VCO. The out-of-band emissions due to the modulation side lobes and image have been sufficiently suppressed. The stray emissions of local oscillator can also be reduced using circuit techniques. The signal from the transmitter has been picked up 95 meters away with a horn antenna, which suggests that wireless communications between a single chip radio and a base station 100 meters away is possible.