Characteristics of ion-implanted hybrid voltage-variable capacitors

Hybrid voltage-variable capacitors were fabricated with hyperabrupt ion-implanted doping profiles. The capacitance uniformity was within 2% over the operating voltage range. Losses in the low-bias-voltage range were reduced by a factor of 3 by a 475°C anneal in N2?H2. A small bias-temperature instability was observed.     

活性炭-聚吡咯混合电容器的电化学性能

低温下(0℃)化学氧化合成了盐酸掺杂聚吡咯。分别以聚吡咯和活性炭为电极材料组装成电化学电容器。采用扫描电镜、恒流充放电、循环伏安和交流阻抗测试仪研究了混合电容器的电化学性能。结果表明:低温下合成的聚吡咯呈颗粒状堆积,粒径为100～300nm;电流密度为6×10–3A/cm2时,混合电容器在1mol/LNa2SO4电解液中比电容高达178.6F/g,100次循环后比电容为初始容量的88.4%,漏电流仅为0.16×10–3A/cm2。     

Ring-hybrid microwave voltage-variable attenuator using HFET transistors

In this paper, a voltage-variable microwave attenuator circuit is presented. The input signal first enters a rat-race power splitter where a 0/spl deg/ and a 180/spl deg/ pair of signals is generated. The 0/spl deg/ signal passes through a common-gate field-effect transistor (FET) that is fully turned on, with its gate voltage set to 0 V. The 180/spl deg/ signal enters another common-gate transistor biased in the triode region. By changing the gate voltage of the second FET, the amplitude of the 180/spl deg/ signal is varied. The in-phase and out-of-phase signals are summed at the output and variable attenuation is achieved. The concept was demonstrated experimentally from 3.0 to 3.4 GHz and a variable attenuation from 6 to 30 dB was achieved. The phase response is linear over the frequency band and exhibits a group delay of 0.71 ns. The input 1-dB compression point of the attenuator is 0 dBm and the second harmonic suppression is 18.5 dB at 0-dBm input power.     

Influence of carbonaceous electrodes on capacitance and breakdown voltage for hybrid capacitor

This paper presents a new type of capacitor and deals with a hybrid approach where the advantages of two systems, dielectric capacitors and the ultracapacitor are combined. The objective is to increase the capacitance and the energy storage capability, while or at least preserving or decreasing the volume of the passive components. In this aim, the surface area and structural properties of ultracapacitor electrodes and the high dielectric strength of a polymer material are associated. The surface roughness of the carbonbased electrodes, namely (activated carbon—AC, and carbon nanotubes—CNTs), has a good impact on the capacitance. However, the surface roughness also depends on the composition of carbonaceous materials and so does the capacitance. Moreover, the choice of the dielectric material is the key parameter. The better the impregnation of the roughness is, the better is the increase of the capacitance.Since the final objective is to improve the electrical energy stored by the capacitor, the effect of surface roughness on the breakdown voltage is also evaluated.     

Development of large-area 200-volt planar voltage-variable capacitance diodes

A research and development program resulted in fabrication of high-capacitance voltage-variable capacitance diodes for electronic tuning. Devices were fabricated by epitaxial and planar technology, with the diode prepared by diffusion into n-type silicon to approximate an abrupt junction. Objective specifications required devices with capacitance of 250 pF and 1000 pF (-8V), breakdown voltageV_{(BR)} > 200V, capacitance change ratio of > 5.6 (-4 to -200 V), and quality factorQ > 200(10 MHz). The principal problem was theV_{(BR)}limitation of planar diodes, which results in part from the tendency of thermally oxidized n-type Si to form an accumulation layer in the Si at the Si-SiO2interface. The planar process was refined to achieve large-area 200-V planar diodes, while maintaining the other essential diode characteristics, by the introduction of modifications to lower the electrical field of the p-n junction at the surface. Both structural modifications and processing changes were found to result in an increase in the level ofV_{(BR)}of planar diodes.     

A multiplexed switched capacitor filter bank

A technique is introduced which allows several integrator capacitors to be multiplexed onto a single operational amplifier. As a result, the op amp can be shared by several switched capacitor filter channels, drastically reducing the number of op amps required for filter banks. Twenty second-order filters have been implemented in a circuit using only two op amps and 2.5 mm/SUP 2/. The design of this system is presented and its performance is discussed. Some loss of signal energy is shown to occur during the multiplexing operations, which reduces filter Q. Causes of this charge loss are described, and its effects on performance are modeled. The design of the op amp used is presented, which incorporates a new system of input stage biasing and differential to single-ended conversion, as well as other features.     

A study of trenched capacitor structures

Trenched structures have been fabricated using a highly anisotropic low ion energy bombardment etching technique and evaluated using their CV characteristics. It is shown that the structure can be modeled by two capacitors in parallel, one for the bottom and the other for the sidewall. Obtained results indicate that the crystal orientation of the side and bottom surfaces of the trench determine the value of Nf, fixed charge, and oxide thickness, especially in the thin range. Orientation-dependent oxidation rates account for the different oxide thicknesses on the sides and bottoms of the trenches. Both the value of Nfand the oxide thickness on each wall determine the flat-band voltage Vfbof the corresponding capacitors so that the overall capacitance behavior is given by the relative importance of the side and bottom components. A lower value of Nfthan previously reported is found with the etching technique used. It is also shown that an improvement of Nfcan be obtained by aligning the trench sidewall along 〈100〉 plane.     

A capacitor cross-coupled common-gate low-noise amplifier

The conventional common-gate low-noise amplifier (CGLNA) exhibits a relatively high noise figure (NF) at low operating frequencies relative to the MOSFET f/sub T/, which has limited its adoption notwithstanding its superior linearity, input matching, and stability compared to the inductively degenerated common-source LNA (CSLNA). A capacitor cross-coupled g/sub m/-boosting scheme is described that improves the NF and retains the advantages of the CGLNA topology. The technique also enables a significant reduction in current consumption. A fully integrated capacitor cross-coupled CGLNA implemented in 180-nm CMOS validates the g/sub m/-boosting technique. It achieves a measured NF of 3.0 dB at 6.0 GHz and consumes only 3.6 mA from 1.8 V; the measured input-referred third-order intercept ( IIP3) value is 11.4 dBm. The capacitor cross-coupled g/sub m/-boosted CGLNA is attractive for low-power fully integrated applications in fine-line CMOS technologies.     

A capacitor scaling and capacitor sharing technique for reducing power dissipation in algorithmic ADCs

A capacitor scaling and capacitor sharing technique is proposed for reducing the power of algorithmic analog-to-digital converters. It is expected that a 70% reduction in power can be achieved.     

A novel linearly tunable butterfly-shape MEMS capacitor

A new MEMS tunable capacitor with linear capacitance–voltage (C–V) response is introduced. The design is developed based on a parallel-plate configuration and uses the structural lumped flexibility and geometry optimization to obtain a linear response. The moving electrode is divided into two segments connected to one another by a torsional spring. There are extra beams located between the two plates, which constrain the displacement of the moving plate. The resulting nonlinear structural rigidity provides the design with higher tunability than the parallel-plate ones. Furthermore, because the plate's displacement is controlled, the shape of C–V curve changes in such a way that high linearity is achieved. The proposed design can be fabricated by a three-structural-layer process such as PolyMUMPs. The results of analytical solution and experimental measurements verify that the new capacitor can produce tunability of over 100% with high linearity. The introduced design methodology can further be extended to flexible plates and beams to obtain smooth C–V curves.     

A switched capacitor circuit simulator: AWEswit

This paper describes the modeling and simulation of switched capacitor circuits in AWEswit. AWEswit is a mixed signal simulator for switched capacitor circuits. It allows for portions of the circuit to be modeled with digital blocks controlled by an event queue. The remainder of the circuit is modeled in the analog domain. The paper describes the circuit formulations employed by AWEswit, and how they are exploited in modeling the nonidealities associated with switched capacitor circuits. AWEswit employs asymptotic waveform evaluation (AWE) as its core simulation engine. It combines circuit formulations in the charge-voltage and current-voltage regimes. This flexibility in the circuit formulations means that if the circuit is modeled entirely with ideal switches (i.e. no resistors), then it is automatically solved in the charge-voltage regime (like SWITCAP2). However, if portions of the circuit need to be solved in the current-voltage regime, then AWEswit automatically partitions the circuit and solves the different partitions in whichever regime is appropriate, i.e., in the current-voltage regime (using AWE to evaluate circuit response) or in the charge-voltage regime. AWEswit naturally handles the bandwidth limitations associated with switched capacitor circuits. In addition, it models the clock feedthrough and signal-dependent charge dump that characterize MOSFET switches. The simulator is illustrated by example     

A differential narrow-band switched capacitor filtering technique

A new resonator loss cancellation technique is described using NMOS technology. It allows the implementation of high Q switched capacitor band-pass filters using single-stage low-gain amplifiers. The approach exchanges the amplifier high DC-gain requirement by a gain matching between amplifiers of the same resonator. A prototype sixth-order bandpass filter with center frequency of 100 kHz and a 5 kHz bandwidth was built to demonstrate the feasibility of the technique. Unloaded resonator quality factors of the order of 400 were achieved using amplifiers with a DC gain of 50.     

A corrugated capacitor cell (CCC)

A new MOS dynamic random access memory (dRAM) cell named "CCC" has been successfully developed based on a one-device cell concept. This CCC is characterized by an etched-moat storage-capacitor extended into the substrate, resulting in almost independent increase in storage capacitance CSof its cell size. A typical CSvalue of 60 fF has been obtained with 3 × 7 µm²CCC having a 4-µm deep moat and a capacitor insulator equivalent to 15 nm SiO2in thickness. The CCC is discussed in terms of its capacitance characteristics, dRAM operation with unit 32-Kbit array, some limiting factor to its closer packing, and future considerations.     

A quasi-static model for the ring capacitor applicator

The electromagnetic heat dissipation in a radially layered biological tissue inside a ring capacitor (RC) applicator has been investigated. A quasi-static model is introduced to compute the relevant electromagnetic field quantities. The method of computation employs the spatial Fourier transform of all field quantities with respect to the axial coordinate. After an iterative solution of a dual boundary value problem for the electric potential and the current density at the electrodes, an inverse Fourier transform is carried out to compute the quantities that are of interest to the deep-body system at hand. Comparison of numerical results with phantom measurements shows excellent agreement.     

A novel cross-coupled inter-poly-oxide capacitor for mixed-modeCMOS processes

The inter-poly-oxide (IPO) capacitor is one of the main elements in present mixed-mode CMOS process technologies. However, the phenomenon of poly depletion causes a significant change in the measured capacitance with applied voltage. This effect, expressed in terms of the voltage coefficient of capacitance (VCC), can seriously deteriorate analog precision. In this letter, a novel cross-coupled scheme is proposed for the IPO capacitors. The resulting VCC has a very low measured value of 2 ppm/V in a 0.35-μm standard mixed-mode CMOS process, achieved without any unconventional approaches     

A unique fault-tolerant design for flying capacitor multilevel inverter

This paper presents a unique design for flying capacitor type multilevel inverters with fault-tolerant features. When a single-switch fault per phase occurs, the new design can still provide the same number of converting levels by shorting the fault power semiconductors and reconfiguring the gate controls. The most attractive point of the proposed design is that it can undertake the single-switch fault per phase without sacrificing power converting quality. Future more, if multiple faults occur in different phases and each phase have only one fault switch, the proposed design can still conditionally provide consistent voltage converting levels. This paper will also discuss the capacitor balancing approach under fault-conditions, which is an essential part of controlling flying capacitor type multilevel inverters. Suggested fault diagnosing methods are also discussed in this paper. Computer simulation and lab results validate the proposed controls.     

基于BST可变电容的电调微带天线研究

采用BaxSr1–xTiO3(BST)可变电容作为调谐元件研制了一种工作频率可调的电调谐微带天线。该天线通过利用单片机控制电源单元输出不同的偏置电压来改变BST可变电容的电容大小,进而实现工作频点的调整。结果表明,当电源输出偏压在0-52 V变化时,该微带天线的工作频点可在1.47-1.61 GHz调节,回波损耗低于–15 dB。     

A capacitor charging power supply utilizing a Ward converter

A prototype capacitor-charging power supply (CCPS) that utilizes a Ward converter is presented. This converter is a member of the family of resonant converters and is capable of zero-current switching. It is applicable to capacitor charging because of its inherent short-circuit protection and its insensitivity to the value of the load capacitance. The converter is controlled using a constant on-time constant frequency scheme that allows the utilization of zero-current switching techniques. The prototype CCPS is capable of charging various values of load capacitors up to 1000 V DC. Waveforms that show single- and repetitive-charge operation of the CCPS are presented     

A study on electrochemical effects in external capacitor packages

Exposing semiconductor devices with external capacitors to harsh environmental conditions may lead to electrical failures with the formation of conductive paths. This paper presents examples of the analysis of modules with the purpose to understand the respective failure modes. Appropriate sample preparation, sensitive analytical methods like micro-X-ray fluorescence spectroscopy (μXRF), ToF-SIMS, SEM/EDX, X-ray-microscopy as well as micro computed X-ray-tomography (μCT) have been applied to identify the root causes of the electrical failures.As a main conclusion of these investigations, we found that electrolytes can easily penetrate thermoplastic overmold materials which are typically used by module manufacturers. This can lead to either reversible electrical failures which can be eliminated by drying or irreversible electrical failures because of material migration. The effective failure mode depends on mechanical and climate conditions inside the module which could not be simulated up to now under laboratory but only under application conditions.     

Novel capacitor floatation scheme

An earlier suggested ideal floating inductor realisation circuit is extended to a capacitor floatation scheme with the addition of only one operational amplifier. Appropriate comments regarding practical realisability of both floating capacitor and inductor are appended.