A novel TFEL device using a high-dielectric-constant multilayer ceramic substrate

A novel composite-structure ac EL device using thin films and a ceramic substrate has been developed. A light-emitting thin film (ZnS:Mn) and ITO electrodes are deposited on a multilayer ceramic substrate consisting of a very high-dielectric ceramic insulating layer (εs∼ 10⁴), internal printed electrodes, and a ceramic base plate. This device features low operating voltage (40-80 V), breakdown-failure-free operation, and high legibility.     

Computation of electron and hole quasi-Fermi levels in polycrystalline silicon films under uniform illumination and zero bias

Numerical computation of quasi-Fermi levels (QFL) is carried out in a polycrystalline silicon film under uniform illumination and zero bias. This analysis is based on a single trap level at the grain boundary (GB) and Shockley-Read-Hall recombination kinetics. Mobility values, approximately one tenth those of the bulk values, are used, and they are assumed to be constant throughout the entire grain-GB region. Results show that considerable bending of the QFL occurs in the vicinity of the GB, and this bending δ is dependent both upon illumination levels as well as on grain size. The maximum bending, δp∼ 2.5 kT/q for majority-carrier QFL and δn∼ - 10 kT/q for minority-carrier QFL, is found for a grain size of ∼-0.33 µm and a doping of 2.9 × 10¹⁶cm^-3. The GB diffusion potential Vbdecreases by as much as 14 kT/q with illumination for large grains; but, for grains smaller than ∼0.2 µm, vbis insensitive to illumination up to 5 suns.     

Elimination of the guard ring in uniform avalanche photodiodes

A conventionalp^{+}-n(orn^{+}-p) planar avalanche photodiode with a 10^-4cm²active area has ∼2.5 × 10^-4cm²total area because of its protecting guard ring and has a series resistance of ∼50 to 100 ohms. For narrow-band applications, multiplications greater than 10 are necessary to equal the available output power of a conventional nonavalanchingp-i-nphotodiode. In broad-band applications, significant multiplications are necessary to compete favorably with thep-i-nwhen the active area is less than 10^-4cm²or when the signal frequency is > 1 GHz. Ap-n^{+}planar structure is discussed that eliminates the need for a guard ring because positive junction curvature occurs on the high-resistivity side. Thep-n^{+}diodes can be designed to have resistances (Rs∼2 ohms), capacitances (C < 1 pf), and RC cutoff frequencies (fco>100 GHz) equivalent to those of thep-i-nand to have uniform multiplication as well. Closer array spacings can be achieved than with the guard ring structure, as well as higher effective quantum efficiencies in the avalanche mode. Practical realization of thep-n^{+}structure has been achieved in silicon by a combination of epitaxial and doped-oxide processing. Seven-mil-diameter junctions with high breakdown voltage (110 V) and uniform avalanche properties have been constructed.     

Electron mobility in short-channel MOSFET's with series resistances

Electron mobilities have been measured in transistors with channel lengths from 5.0 to 0.5 µm. The originally high low-field mobility µ0≈ 700 cm²/V . s seems to be greatly decreased by parasitic series resitances, to a minor degree also by surface scattering.     

A linear-sweep MOS-C technique for determining minority carrier lifetimes

A nonpulse MOS-C τ0measurement procedure, based upon the capacitance-voltage characteristics derived in response to a linear voltage sweep initiated and maintained under inversion biases, is described, analyzed, and illustrated. The most significant advantages of the procedure are interpretational and instrumentational simplicity. For typical dopings and oxide thicknesses, the conveniently measured lifetime range covers 0.1 µs ≲ τ0≲ 10 µs. About a decade improvement in the limits on the conveniently measured lifetime range can be achieved by employing relatively thin (0.1 µ) or relatively thick (1 µ) oxides.     

A useful modification of the technique for measuring capacitance as a function of voltage

Measurements of small signal capacitance as a function of applied bias voltage are widely used for the determination of information about metal-insulator-semiconductor (MIS) capacitors. The information that can be derived from the measurements includes interface-state density and flat-band charge density at the insulator-semiconductor (IS) interface, semiconductor doping, and charge stability under bias-temperature stress. A limitation on the use of this measurement method which has until now prevented its even more general application is the requirement that in order to determine Cs, the semiconductor space-charge capacitance, with reasonable accuracy the ratio of Csto CI, the insulating layer capacitance, must be ∼ 10. In the present work it is shown that a modification of the usual method can significantly relax this restriction and allow the accurate determination of Cswhen the ratio Cs/Cris as large as 100 or more, In fact, the inherent limit is no longer directly dependent on this ratio but on the noise level in the capacitance measurement. In some cases Cs/CI≥ 1 due to a thick insulating layer, A very large bias voltage is then required to span the capacitance range of interest; commercially available capacitance meters which typically have applied bias capabilities of ±600 V or less may be inadequate. A simple circuit modification has been employed to allow much larger bias voltages (up to ± 7 kV in the present Work) to be applied to the sample without alteration of or damage to the capacitance meter.     

High-speed current limiters

Current limiters based on the high-field saturation of electron-drift velocity in germanium have been fabricated by making two closely spaced ohmic contacts to a surface n-layer diffused into Ge. In operation, current flows from contact to contact through the n-layer. Current saturation begins at a voltageV_{s} = E_{s} d, where d is the contact spacing and Esis the field for saturation of electron drift velocity. Generally, in order to work at reasonable signal levels (volts and milliamperes) a structure small in all dimensions is required. A diffused-layer structure provides a convenient way of meeting this requirement and, at the same time, has, first, a high surface-to-volume ratio which facilitates heat removal and, second, a p-n junction which minimizes conductivity modulation by removing avalanche-generated holes. Limiters withd cong 2µ, and 10 µ × 10 µ contacts, were fabricated on Sb-diffused layers of 10³-Ω sheet resistance and ∼10¹⁷cm^-3surface concentration. Limiting current was ∼2.5 mA and limiting extended from ∼2 to 16 V. The conductance in the limiting range was ∼40 µmho and a contact-to-contact capacitance was ∼0.1 pF.     

Single-atom detection by SONRES

The new method of atomic fluorescence detection, called saturated optical nonresonant emission spectroscopy (SONRES), has been modeled for a three-level atom, and experiments on sodium have been conducted that support the model. A rate equation analysis yielded expressions for excited-state atomic populations and saturation intensity. The detection of sodium in buffer gases that promote collisional transfer of excitation between 3²P1/2→ 3²p3/2both without quenching the fluorescence emission and with quenching was considered. Experimental results are presented for sodium in argon. At -25°C, approximately 180 atoms/cm³were monitored with a S/N of ∼ 15 representing detection at the level of one part in 10¹⁷. The signal at this temperature was generated by less than a single atom in the laser beam.     

Arithmetic-geometric means for electrical energies

The paper indicates an important arithmetic-geometric relation for the behavior of linear passive reciprocal n-ports. The active energies dissipated in the unit time interval in any linear passive time invariant reciprocal resistive system satisfy the inequalities P1+ P2≥ 2P0√P1P2≥ P0where P1= (V1, I1), P2= (V2, I2), P0= (V1, I2) = (V2, I1). A generalization of the above leads to Re(ZI1,I1) ċ Re(ZI2,I2) > |((Re Z) I2, I1)|². On account of the reciprocity, one can assess the resulting fluctuations of the active energy dissipated by a linear system when the input vector is perturbed.     

Ultrasmall superconducting tunnel junctions

Extremely small-area superconducting Josephson junctions have been fabricated using a newly developed electron-beam lithography technique. The junctions are composed of Pb-In base electrodes and Pb counter electrodes. Areas of the junctions range from 1 to 3 × 10^-10cm². The estimated capacitance is ∼10^-15F. Junctions have been produced with resistances of ∼100 Ω which have ∼20-percent hysteresis in the critical current at a temperature of 4 K.     

Reflection of a transient plane wave obliquely incident on compressible plasma half-space

The expression for the reflected transient pulses from the sharp surface of a compressible plasma half-space are obtained in a series form with the first perturbation order explicitely evaluated and valid for small to moderate compressibility (α = u/C0≤ 0.3, u is the electron acoustic velocity and C0is the velocity of light in free space). The reflected waveform are close to the waveform of cold plasma (α = 0) with noticeable change of amplitude and time delay of the first maxima.     

Sintered ohmic contacts to n-and p-type GaAs

Previously, all known ohmic contacts to n-GaAs have involved a so-called "alloying" procedure which consists of melting a Au-Ge eutectic or Sn-based alloy films on GaAs. We describe here a new contact metallization scheme consisting of Pd/Ge/n-GaAs which requires sintering rather than melting in order to produce ohmic contacts. The sintering is done at temperatures ranging from 350°C, 15 min to 500°C, 2 h depending on the doping level of n-GaAs (10¹⁸-10¹⁶cm^-3. For n-10¹⁶cm^-3GaAs, a specific contact resistance of 3 × 10^-4Ω.cm²was achieved. Sintering leads to the formation of some PdGe and intermetallics associated with the Pd/GaAs interaction, namely, PdAs2and PdGa. Ohmic behavior is attributed to a combination of the doping action of Ge (as donor) and fast in-diffusion kinetics of Pd. Sintered contacts to n⁺and p⁺GaAs (ND.A∼ 10¹⁸cm^-8) made by Au, Pt, and Ti Were also investigated for ohmic behavior. Each of these three metals was at least partially effective in forming ohmic contacts to p⁺GaAs; the degree of effectiveness increases on going from Ti to Au to Pt. It is proposed that a reasonable guideline to follow When searching for ohmic contacts is Xm≳ Xdwhere Xmis the width of the metallurgical junction and Xdis the ideal depletion layer width. This condition should favor ohmic contacts by promoting a micro 3-dimensional current flow at the conductor-semiconductor interface and thereby maximizing field-emission probability.     

Gate noise in field effect transistors at moderately high frequencies

At higher frequencies the gate noise of a field effect transistor increases rapidly with increasing frequency. This effect is here attributed to the thermal noise of the conducting channel and is caused by the capacitive coupling between the channel and the gate. The noise is represented by gate and drain noise current generators igand id, respectively; an approximation method is developed that allows calculation of ig², id²and ig× idfor moderately high frequencies. The correlation coefficient of igand idis imaginary and amounts to about 0.40j under saturated conditions, ig²can be expressed in terms of the noise resistance Rn, and the gate-source capacitance Cgs.It is shown that the correlation has only a slight influence on the noise figure F and that (Fmin- 1) varies as ωCgsRnover a wide frequency range.     

Analysis and performance of a light-sensitive capacitor

A comprehensive study has been made of a duo-dielectric capacitor in which one of the dielectrics is photoconducting and the other inert. Under dark conditions, device capacitance per unit area is set by the respective dielectric coefficients, conductivities, and thicknesses. Illumination causes device capacitance to change, and decreases the interfacial polarization relaxation time. Analysis reveals the means to optimize device performance, and the existence of a light-dark capacitance ratio-cutoff frequency limitation. A fabricated unit, utilizing CdS with BaTiO3, exhibited a capacitance change of 2500 times and a frequency span extending to 0.22 Mc/s. A CdS:silicone plastic unit showed a maximum capacitance change of 20 times and a frequency span of ∼10 Mc/s, but had degraded dark performance attributed to electron traps, and an interesting piezo-electric resonance that affected both capacitance and dissipation factor at 0.315 Mc/s. Applications of this type of a light-sensitive capacitor are limited to specialized situations where a maximizing dissipation factor and a varying frequency bandwidth can be tolerated.     

Intermodulation analysis of crystal mixer

An expression for the amplitude of the intermodulation products and harmonics produced in a crystal mixer is derived using the coefficients of the power series expansion of the device. Using this expression and an exponential approximation of the current through a diode [i = i0(ε^αv- 1)], the amplitude of intermodulation produced in a crystal mixer is found to be 2i0ε^αV0R0Is(αV1)Ib(αV2). In(x) is an nth order modified Bessel function of the first kind. The quantities s and b are the signal harmonic and the oscillator harmonic, R0is the output resistance, and V0, V1, and V2are the bias, signal, and oscillator voltages, respectively. The quantities i0, α, R0, and V2are found from the dc E-I diode characteristics, the mixer bias current, and the loss in the desired signal. Experimental tests on a mixer operating from 450 Mc to 850 Mc show that the signal input power necessary to produce a given intermodulation output power can be predicted within 6 db.     

Electrical properties of tellurium thin films

Semiconducting properties of evaporated tellurium thin films, in the thickness range of 100 to 400 Å, are studied and correlated with observed structural properties. It is found that less-than-monolayer gold films can act as nucleation sites and stimulate the growth of large crystallites in deposited Te films. The Au-nucleated Te films are preferentially oriented with the c axis in the substrate plane and have crystallite diameters ranging from 2 to 5 µm. Hall mobilities as high as 250 cm²/V ċ s are observed in 400-Å Au-nucleated films with 5-µm crystallites. These large-grain films exhibit a temperature dependence for mobility of the form µ ∼ T^3/2between 85°K and 250°K, while the carrier concentrations in the films do not change appreciably with temperature. Transconductances greater than 1000 µmhos are achieved for Au-nucleated Te thin-film transistors with 3-mil channels (operating with a saturated drain current of 1 mA). Several devices exhibit field-effect mobilities greater than 100 cm²/V ċ s, a value consistent with the observed Hall mobilities for similar films. Transconductance measurements indicate that Te thin-film transistor (TFT) instabilities result primarily from hole trapping at the Te-insulator interface. It is possible to alter the threshold voltage of Te TFTs by applying a gate bias at room temperature. Improved stability (changes in V0less than 50 mV in 1 h) is observed at 77°K. From the observed changes in threshold, a lower limit of the trapping-state density at the surface is inferred to be 5×10¹²traps/cm². The surface-state density at the Te-SiO interface is estimated to be less than 6×10¹²surface states/cm²ċ eV as determined from capacitance and conductance measurements.     

Noise in Gunn oscillators

We estimate the ultimate noise of Gunn oscillators in the absence of 1/fnoise. The basic noise source considered is thermal or Johnson noise augmented by intervalley noise of carriers hopping between the high and low mobility bands. For example, for Qext= 10²and Pout=10^-1W we estimate δfrms≈ 1-2 Hz, and AM noise relative to the carrier of -156 dD, both measured in 1-kHz bandwidths.     

Electronic properties of the silicon-thermally grown tantalum oxide interface

MOS capacitance measurements showed that the Si-Ta2O5interface prepared by thermal oxidation at ∼530°C of vacuum deposited Ta film followed by a heat treatment at 350°C in N2-H2is characterized by a negative "oxide" charge (6 × 10¹¹e/cm^-2at flat-band) and by an interface state density of ∼ 1 × 10¹²cm^-2(eV)^-1. The room temperature instability is small. The breakdown strength is >8 × 10⁶V/cm.     

Quadruple-well CMOS for VLSI technology

A novel process has been developed to fabricate high-density CMOS with four wells. These wells are self aligned to increase packing density. Two of them are relatively deep wells used to optimize both n- and p-channel active devices. The other two are shallow wells under field oxide to form channel stops for both device types. The channel stops provide rigorous isolation among similar devices and between the devices of the opposite polarity. Subthreshold leakage currents in isolation regions are <0.05 pA/µm when devices are biased at <16.5 V. The channel stops also suppress lateral parasitic bipolar action. To reduce the vertical bipolar gain, a new process technique employing a double-retrograde well and transient annealing has been established. For the CMOS structure with 2-µm p⁺-to-p-well spacing, we have eliminated latchup by suppressing the beta product to below unity. Moreover, the quadruple-well approach has produced active n- and p-channel FET's with excellent characteristics such as low threshold voltage (∼±0.5 V), low subthreshold slope (≲95 mV/dec), low contact resistivity (∼10^-7Ω-cm²), and high channel mobility (620 and 210 cm²/V . s).     

The inner formulation for the total square integral (SUM)

In this letter the value of the complex integrals InΔ 1/2πj ∫-j∞^j∞G(s)G(-s)ds and In=1/2πj ∮unit circleF(z)F(z^-1)z^-1dz which arise in obtaining the total square integral for the continuous case and the total square sum for discrete case are obtained in a unified approach based in the "Inners." In both cases it is shown that Inis obtained as the ratio of two Inner determinants. The denominator determinants are related to the stability conditions. The computational algorithm recently obtained for the Inners determinants can be readily used for the evaluation of In.