Flexible Oxide-Based Thin-Film Transistors on Plastic Substrates for Logic Applications

Phosphorus doped(P-doped) nanogranular SiO2 films have been deposited by plasma-enhanced chemical vapor deposition. A high proton conductivity of ~3.2x10-4S/cm and a large electric double layer(EDL) capacitance of ~3.2μF/cm2 have been obtained. Flexible coplanar-gate EDL thin film transistors(TFTs) gated by P-doped nanogranular SiO2 films are self-assembled on plastic substrates at room temperature. Due to the big EDL capacitance,such TFTs show ultra-low voltage operation of 1 V,a large field-effect mobility of 18.9 cm2/Vs,a small subthreshold swing of 85 m V/decade and a high current on/off ratio of 107. Furthermore,the EDL TFT could work in dual coplanar gate mode. AND logic operation is realized. Our results demonstrate that such TFTs gated by P-doped nanogranular SiO2 films have potential applications in low-power flexible electronics.     

A Device-Level Vacuum-Packaging Scheme for Microbolometers on Rigid and Flexible Substrates

This paper reports on the design, fabrication, and characterization of device-level vacuum-packaged microbolometers on rigid Si wafers and flexible polyimide substrates. Semiconducting yttrium barium copper oxide (commonly referred to as YBCO) serves as the bolometric material. Operating micromachined bolometers in vacuum reduces the thermal conductance G_th from the detector to the substrate. If flexibility of the substrate is not to be sacrificed, then the vacuum packaging needs to be done at the device level. Here, the microbolometers are fabricated on a silicon nitride support membrane, isolated from the substrate using surface micromachining. Suitable materials as well as various dimensions in the vacuum cavity are determined using finite-element method (FEM)-based CoventorWARE. A vacuum cavity made of Al₂O₃ has been designed. The thermal conductance G_th of bolometers with the geometry implemented in this work is the same for devices on rigid and flexible substrates. The theoretical value of G_th was calculated to be 4.0 x 10^-6 W/K for devices operating in vacuum and 1.4 x 10^-4 W/K for devices operating at atmospheric pressure. Device-level vacuum-packaged microbolometers on both rigid Si and flexible polyimide substrates have been fabricated and characterized for optical and electrical properties. A low thermal conductance of 1.1 X 10^-6 W/K has been measured six months after fabrication, which implies an intact vacuum cavity.     

硅基沉积氮化镓,碳化硅,III –V 族及其合金材料研究进展

硅基沉积氮化镓, 碳化硅, III-V 族及其合金材料是近年来的研究热点. 氮化镓, 碳化硅及其III-V 材料在光电子和电子元件领域有着广泛的应用.例如大功率, 高速器件, 大型激光器, 紫外探测器等等. 尽管硅基片具有低成本, 大的尺寸,和极好的电热导性能等优点, 硅基片仍没有成为氮化镓, 碳化硅及III – V 的主要沉积基片, 其原因在于硅基片与氮化镓, 碳化硅及III-V 材料之间的热膨胀系数和晶格常数之间的失配. 自从1998年, IBM 的课题组用分子外延方法在硅基片上沉积氮化镓, 并且成功地制备了氮化镓激光器之后, 硅基氮化镓的研究开始备受关注. 近年来的研究发现, 使用氧化铝和氮化铝镓作为过渡层. 硅基氮化镓的热应力及与硅基片之间的晶格失配可以明显降低.在 6英寸的(111) 取向的硅基片上用化学气相方法可以成功地沉积超过一个微米厚的无裂纹的单晶氮化镓. 德国的AZZURRO 公司成功地制备硅基片氮化镓的大功率的蓝色激光器. 美国的NITRINEX公司也生产了硅基氮化镓大功率电子元件. 超大功率的硅基氮化镓电子元件仍在研究中. 在2007年, 英国政府设立了一个固体照明器件的研究项目. 主要着手研究6英寸的硅基氮化镓激光器. 另一方面, 在过去的40年, 超大规模硅基CMOS 技术已有了长足的发展, 下一代低功耗高速逻辑电路要求低的驱动电流, 小的活门尺寸低于 30 nm 和快速反应性能. 这就要求器件通道材料具有很高的电子(或空穴)迁移率. III-V 材料, 例如InSb, InAs, 和InGaAs 具有电子迁移率高达 80000 cm2/VS. 它们将是下一代低于 30 nm 硅基CMOS 器件最好的候选材料. 在 2007 年美国DARPA/MTO 设立了一个研究项目来发展硅基 III-V材料器件, 着重于发展高速硅基III-V材料CMOS 器件. 第一届”硅基氮化镓,碳化硅,III-V及其合金材料研究进展 ”国际会议也将于3月 24日-28日在旧金山MRS 2008年初春季会议上召开.     

Fully-Solution-Processed Enhancement-Mode Complementary Metal-Oxide-Semiconductor Carbon Nanotube Thin Film Transistors Based on BiI3-Doped Crosslinked Poly(4-Vinylphenol) Dielectrics for Ultralow-Power Flexible Electronics

The threshold voltage (V_th) adjustment of complementary metal-oxide-semiconductor (CMOS) thin film transistors (TFTs) is one of the research hotspots due to its key role in energy consumption control of CMOS circuits. Here, ultralow-power flexible CMOS circuits based on well-matched enhancement-mode (E-mode) CMOS single-walled carbon nanotube (SWCNT) TFTs are successfully achieved through tuning the work function of gate electrodes, electron doping, and printing techniques. E-mode P-type CMOS SWCNT TFTs with the full-solution procedure are first obtained through decreasing the work function of Ag gate electrodes directly caused by the deposition of bismuth iodide (BiI₃)-doped solid-state electrolyte dielectrics. After synthetic optimization of dielectric compositions and semiconductor printing process, the flexible printed E-mode SWCNT TFTs show the high I_on/I_off ratios of ≈10⁶, small subthreshold swing (SS) of 70–85 mV dec⁻¹, low operating voltages of ≈0.5 to −1.5 V, good stability and excellent mechanical flexibility during 10 000 bending cycles. E-mode N-type SWCNT TFTs are then selectively achieved via printing the polarity conversion ink (2-Amino-2-methyl-1-propanol (AMP)  as electron  doping agent) in P- type TFT channels. Last, printed SWCNT CMOS inverters are successfully constructed with full rail-to-rail output characteristics and the record unit static power consumption of 6.75 fW µm⁻¹ at V_DD of 0.2 V.     

高频微晶玻璃介质材料的晶化研究

利用堇青石为主晶相的微晶玻璃,高频损耗小,成功地研制了一种介电常数ε＝7．2±0．2,介电损耗tgδ＜1．5×10^－4（制试频率＞1GHz）的微波材料.采用X射线衍射分析、扫描电镜、物理性能和电性能测试等技术,研究了该种玻璃晶化过程中的密度变化、晶相转变、以及电性能与晶相组成和结构的关系．     

Fabrication of Transistors on Flexible Substrates: from Mass‐Printing to High‐Resolution Alternative Lithography Strategies

In this report, the development of conventional, mass‐printing strategies into high‐resolution, alternative patterning techniques is reviewed with the focus on large‐area patterning of flexible thin‐film transistors (TFTs) for display applications. In the first part, conventional and digital printing techniques are introduced and categorized as far as their development is relevant for this application area. The limitations of conventional printing guides the reader to the second part of the progress report: alternative‐lithographic patterning on low‐cost flexible foils for the fabrication of flexible TFTs. Soft and nanoimprint lithography‐based patterning techniques and their limitations are surveyed with respect to patterning on low‐cost flexible foils. These show a shift from fabricating simple microlense structures to more complicated, high‐resolution electronic devices. The development of alternative, low‐temperature processable materials and the introduction of high‐resolution patterning strategies will lead to the low‐cost, self‐aligned fabrication of flexible displays and solar cells from cheaper but better performing organic materials.     

Meniscus-Guided Deposition of Organic Semiconductor Thin Films: Materials,Mechanism, and Application in Organic Field-Effect Transistors

Solution-processable organic semiconductors are one of the promising materials for the next generation of organic electronic products, which call for high-performance materials and mature processing technologies. Among many solution processing methods, meniscus-guided coating (MGC) techniques have the advantages of large-area, low-cost, adjustable film aggregation, and good compatibility with the roll-to-roll process, showing good research results in the preparation of high-performance organic field-effect transistors. In this review, the types of MGC techniques are first listed and the relevant mechanisms (wetting mechanism, fluid mechanism, and deposition mechanism) are introduced. The MGC processes are focused and the effect of the key coating parameters on the thin film morphology and performance with examples is illustrated. Then, the performance of transistors based on small molecule semiconductors and polymer semiconductor thin films prepared by various MGC techniques is summarized. In the third section, various recent thin film morphology control strategies combined with the MGCs are introduced. Finally, the advanced progress of large-area transistor arrays and the challenges for roll-to-roll processes are presented using MGCs. Nowadays, the application of MGCs is still in the exploration stage, its mechanism is still unclear, and the precise control of film deposition still needs experience accumulation.     

Cover Picture: High‐Performance Organic Single‐Crystal Transistors on Flexible Substrates (Adv. Mater. 17/2006)

The cover shows a comparison of thin and thick rubrene single crystals where the flexibility of the thin rubrene crystals is clearly illustrated. On p. 2320, Yang, Bao, and co‐workers report that high performance flexible transistors on plastic substrates fabricated by using these rubrene “thin‐film” single‐crystals demonstrate mobility as high as 4.6 cm² Vs^–1 and ON/OFF ratios of approximately 10⁶.     

柔性衬底ITO薄膜的制备及其光电性能研究

在室温下,采用直流反应磁控溅射法,在聚酯薄膜（PEP）衬底上镀制了高性能的ITO薄膜。为了提高薄膜与基底的结合力,溅射前采用多弧离子源对PEP表面进行了等离子体清洗。研究了溅射工艺参数对ITO薄膜的光电性能和红外发射率的影响规律,探讨了ITO膜的透光和导电机理,并分析了方块电阻与红外发射率的相互关系。实验结果表明,通过等离子体清洗,ITO薄膜的结合力和光电性能都得到了改善。ITO薄膜的红外发射率和方块电阻受制备条件的影响规律具有相似之处,红外发射率随薄膜方块电阻的增大而呈增加的趋势。