A Novel Artificial Intelligence Based Timing Synchronization Scheme for Smart Grid Applications

The smart grid control applications necessitate real-time communication systems with time efficiency for real-time monitoring, measurement, and control. Time-efficient communication systems should have the ability to function in severe propagation conditions in smart grid applications. The data/packet communications need to be maintained by synchronized timing and reliability through equally considering the signal deterioration occurrences, which are propagation delay, phase errors and channel conditions. Phase synchronization plays a vital part in the digital smart grid to get precise and real-time control measurement information. IEEE C37.118 and IEC 61850 had implemented for the synchronization communication to measure as well as control the smart grid applications. Both IEEE C37.118 and IEC 61850 experienced a huge propagation and packet delays due to synchronization precision issues. Because of these delays and errors, measurement and monitoring of the smart grid application in real-time is not accurate. Therefore, it has been investigated that the time synchronization in real-time is a critical challenge in smart grid applications, and for this issue, other errors raised consequently. The existing communication systems are designed with the phasor measurement unit (PMU) along with communication protocol IEEE C37.118 and uses the GPS timestamps as the reference clock stamps. The absence of GPS increases the clock offsets, which surely can hamper the synchronization process and the full control measurement system that can be imprecise. Therefore, to reduce this clock offsets, a new algorithm is needed which may consider any alternative reference timestamps rather than GPS. The revolutionary Artificial Intelligence (AI) enables the industrial revolution to provide a significant performance to engineering solutions. Therefore, this article proposed the AI-based Synchronization scheme to mitigate smart grid timing issues. The backpropagation neural network is applied as the AI method that employs the timing estimations and error corrections for the precise performances. The novel AIFS scheme is considered the radio communication functionalities in order to connect the external timing server. The performance of the proposed AIFS scheme is evaluated using a MATLAB-based simulation approach. Simulation results show that the proposed scheme performs better than the existing system.

     

Pausible clocking-based heterogeneous systems

This paper describes a novel communication scheme, which is guaranteed to be free of synchronization failures, amongst multiple synchronous and asynchronous modules operating independently. In this scheme, communication between every pair of modules is done through an asynchronous first-in first-out (FIFO) channel; communication between a module and the FIFO is done using a request/acknowledge handshaking. Synchronization of handshake signals to the local module clock is done in an unconventional way-the local clock built out of a ring oscillator is paused or stretched, if necessary, to ensure that the handshake signal satisfies setup and hold time constraints with respect to the local clock. In order to validate this scheme, we implemented a test chip in 0.5-μm CMOS. This chip is designed as a ring, composed of two synchronous modules, an asynchronous module, and two asynchronous FIFOs. Each module functions as a receiver to one module and a sender to another module. Test results show that the chip functions reliably up to 456 MHz     

A Multichannel Event Timer for Real-Time Laboratory Computer Systems

In this paper we describe an event timer which was designed to be used in a neurophysiological laboratory. The timer is used with an LSI 11/03 computer and interfaces with the computer through a standard Digital Equipment Corporation DRV 11 interface board. The time of occurrence of pulses on up to 15 different input lines can be recorded with an accuracy determined by the time base of the timer, which can be varied from 1 to 5000 gs. In order to record events that occur simultaneously on different channels or in very rapid succession, we employ a first-in, first-out (FIFO) register as a buffer. An input scanner allows one timer to be used for timing events that occur on several input channels. This device may be useful in other applicatoins in which the time of occurrence of multiple events needs to be accurately timed.     

Low-complexity iterative decoding with decision-aided equalizationfor magnetic recording channels

Turbo codes are applied to magnetic recoding channels by treating the channel as a rate-one convolutional code that requires a soft a posteriori probability (APP) detector for channel inputs. The complexity of conventional APP detectors, such as the BCJR algorithm or the soft-output Viterbi algorithm (SOVA), grows exponentially with the channel memory length. This paper derives a new APP module for binary intersymbol interference (ISI) channels based on minimum mean squared error (MMSE) decision-aided equalization (DAE), whose complexity grows linearly with the channel memory length, and it shows that the MMSE DAE is also optimal by the maximum a posteriori probability (MAP) criterion. The performance of the DAE is analyzed, and an implementable turbo-DAE structure is proposed. The reduction of channel APP detection complexity reaches 95% for a five-tap ISI channel when the DAE is applied. Simulations performed on partial response channels show close to optimum performance for this turbo-DAE structure. Error propagation of the DAE is also studied, and two fixed-delay solutions are proposed based on combining the DAE with the BCJR algorithm     

一种FIFO器件的失效模式分析

异步FIFO常应用于在异步时钟域之间进行数据传输。本文根据应用过程中数据帧头重复首字节的异常现象,对FIFO器件M67024的一种失效模式进行分析和说明。进而分析FIFO因设计原理而存在的共性使用要求,并提出针对该类型FIFO失效模式,电路设计人员应当注意的设计规则。     

异步FIFO在FPGA与DSP通信中的运用

利用异步FIFO实现FPGA与DSP进行数据通信的方案.FPGA在写时钟的控制下将数据写入FIFO,再与DSP进行握手后,DSP通过EMIFA接口将数据读入.文中给出了异步FIFO的实现代码和FPGA与DSP的硬件连接电路.经验证,利用异步FIFO的方法,在FPGA与DSP通信中的应用,具有传输速度快、稳定可靠、实现方...     

基于双DSP的雷场侦察图像实时压缩及存储方法研究

以2个TMS320C62xx为核心处理器,实现大面积雷场图像的实时压缩和传输.使用双口RAM实现2个DSP之间的高速通信,利用EMIF、EXBUS及McBSP实现与外围设备的通信,通过FIFO进行数据的输入/输出缓冲,并以CPLD来控制系统的逻辑时序.     

A Linear Prediction Based Estimation of Signal‐to‐Noise Ratio in AWGN Channel

Most signal‐to‐noise ratio (SNR) estimation techniques in digital communication channels derive the SNR estimates solely from samples of the received signal after the matched filter. They are based on symbol SNR and assume perfect synchronization and intersymbol interference (ISI)‐free symbols. In severe channel distortion where ISI is significant, the performance of these estimators badly deteriorates. We propose an SNR estimator which can operate on data samples collected at the front‐end of a receiver or at the input to the decision device. This will relax the restrictions over channel distortions and help extend the application of SNR estimators beyond system monitoring. The proposed estimator uses the characteristics of the second order moments of the additive white Gaussian noise digital communication channel and a linear predictor based on the modified‐covariance algorithm in estimating the SNR value. The performance of the proposed technique is investigated and compared with other in‐service SNR estimators in digital communication channels. The simulated performance is also compared to the Cramér‐Rao bound as derived at the input of the decision circuit.     

Preventing internal and external conflicts in an input buffering reverse baseline ATM switch

When two or more packets that are destined to the same output of an ATM switch arrive at different inputs, buffers at inputs or outputs are used to queue all but one of these packets so that external conflict is prevented. Although input buffering ATM switches are more economical and simpler than output buffering ATM switches, significant loss of throughput can occur in input buffering ATM switches due to head‐of‐line (HOL) blocking when first‐in–first‐out (FIFO) queueing is employed. In order to avoid both external conflict and alleviate HOL blocking in non‐blocking ATM switches, some window‐based contention resolution algorithms were proposed in the literature. In this paper, we propose a window‐based contention resolution algorithm for a blocking ATM switch based on reverse baseline network with content addressable FIFO (CAFIFO) input buffers. The proposed algorithm prevents not only external conflicts but also internal conflicts, in addition to alleviating HOL blocking. This algorithm was obtained by adapting the ring reservation algorithm used on non‐blocking ATM switches to a reverse baseline network. The fact that a non‐blocking network is replaced by a log₂ N‐stage reverse baseline network yields a significant economy in implementation. We have conducted extensive simulations to evaluate the performance of reverse baseline network using the proposed window‐based contention resolution algorithm. Simulation results show that the throughput of reverse baseline network can be as good as the throughput of non‐blocking switches if the window depth of input buffers is made sufficiently large. Copyright © 2000 John Wiley & Sons, Ltd.     

Efficient Handover with Load Balancing: A Quality Perspective Approach

The heterogeneous wireless networking environment determined by the latest developments in wireless access technologies promises a high level of communication resources for mobile computational devices. Although the communication resources provided, especially referring to bandwidth, enable multimedia streaming to mobile users, maintaining a high user perceived quality is still a challenging task. The main factors which affect quality in multimedia streaming over wireless networks are mainly the error-prone nature of the wireless channels and the user mobility. These factors determine a high level of dynamics of wireless communication resources, namely variations in throughput and packet loss as well as network availability and delays in delivering the data packets. Under these conditions maintaining a high level of quality, as perceived by the user, requires a quality oriented mobility management scheme. Consequently a proposed smooth adaptive soft-handover algorithm, a novel quality oriented handover management scheme which unlike other similar solutions, smoothly transfer the data traffic from one network to another using multiple simultaneous connections.     

A high-speed-retry banyan switch architecture for giga-bit-rate BISDN networks

This paper proposes a high-speed ATM switch architecture for handling cell rates of several Gb/s in a broadband communication switching system or cross-connect system. The proposed switch architecture, named the high-speed-retry banyan switch, employs a bufferless banyan network between input and output buffers; a cell is repeatedly transmitted from an input buffer until it can be successfully transmitted to the desired output buffer. A simple cell-retransmission algorithm, is employed as is a ring-arbitration algorithm for cell conflict. They are suitable for FIFO type buffers and bufferless highspeed devices. Good traffic characteristics which are independent of switch size are achieved for an internal speed ratio of only four times the input line speed. A prototype system with the internal speed of 1·2 Gb/s is constructed in order to confirm the basic operation of the high-speed-retry banyan switch. The prototype system, even in its present state, could be used to realize a giga-bit-rate BISDN switching system.     

The Design and Application of an FM/AM Temperature Telemetering System for Intact, Unrestrained Ruminants

The system contains up to 11 channels, each consisting of a transmitter and receiver. An input scanner is used to time share a counter and printer among the channels. Any two channels may be selected for analog recording. All of the data acquisition equipment is commercially available.     

Deadlock detection in communicating finite state machines by even reachability analysis

A network of communicating finite state machines (CFSM) consists of a set of finite state machines which communicate asynchronously with each other over (potentially) unbounded FIFO channels by sending and receiving typed messages. As a concurrency model, CFSMs has been widely used to specify and validate communications protocols. CFSMs is also powerful and suitable for modeling mobile communication systems – a CFSM can naturally model a mobile station in a wireless communication system. The unbounded FIFO channels are ideal for modeling the communication behavior among mobile stations. Fair reachability is a very useful technique in detecting errors of deadlocks and unspecified receptions in networks of (CFSMs) consisting of two machines. The paper extends the classical fair reachability technique, which is only applicable to the class of two-machine CFSMs, to the general class of CFSMs. For bounded CFSMs, the extended fair reachability technique reduces by more than one half the total number of reachable global states that have to be searched in verifying freedom from deadlocks. The usefulness of the new reachability technique, called even reachability, is demonstrated through two examples. This revised version was published online in June 2006 with corrections to the Cover Date.     

水声多径信道中的标识延迟空时扩展发射分集

水声信道存在严重的传播时延和多径时延,该文提出了一种带有信道标识的延迟空时扩展(LDSTS)发射分集方案,通过信道探测、延时发射和Rake接收来消除传播时延和多径时延的影响,且顺序延时发射保证了方案的实用性。文中给出了采用频移键控和相移键控调制的LDSTS方案的信号模型、误码率分析和比特误码率的仿真。仿真表明,在多径水声信道中,LDSTS可以更好地实现完全发射分集。     

Joint end-to-end loss-delay hidden Markov model for periodic UDP traffic over the Internet

Performance of real-time applications on network communication channels is strongly related to losses and temporal delays. Several studies showed that these network features may be correlated and exhibit a certain degree of memory such as bursty losses and delays. The memory and the statistical dependence between losses and temporal delays suggest that the channel may be well modeled by a hidden Markov model (HMM) with appropriate hidden variables that capture the current state of the network. In this paper, an HMM is proposed that shows excellent performance in modeling typical channel behaviors in a set of real packet links. The system is trained with a modified version of the Expectation-Maximization (EM) algorithm. Hidden-state analysis shows how the state variables characterize channel dynamics. State-sequence estimation is obtained by the use of Viterbi algorithm. Real-time modeling of the channel is the first step to implement adaptive communication strategies.     

Distributed Simulation of Differential Algebraic Systems Using Optimal Sliding-Mode Control

In this paper, the optimal solution of differential algebraic equation (DAE) systems over a network of processors is investigated. A sliding-mode control (SMC) approach is used to enforce the algebraic constraints of the DAEs. Time delays associated with network communication give rise to a sliding-control problem with sensor time delays. A new approach is presented that decouples this problem into two independent problems. Using this property, a mixed H_infin optimization approach is applied to minimize errors. The results are applied to solve the problem of the optimal bandwidth allocation between the processors under the constraint of limited communication bandwidth. Experimental results for a distributed simulation application on a TDMA network demonstrate the validity of the approach     

Energy efficient collaborative communications in AWGN and Rayleigh fading channel in wireless sensor networks

Collaborative communication produces high power gain and significantly reduces bit error rate (BER) if both frequency and phase synchronization are achieved. In this paper, a novel collaborative communication system with imperfect phase and frequency synchronization that includes the influence of noise and fading is proposed, modeled, theoretically analyzed, and simulated. Mathematical expressions are derived for the received power as a function of number of collaborative nodes and BER as a function of signal to noise ratio (E_b ∕ N₀). To analyze the energy efficiency of our proposed collaborative communication system, energy consumption of the system is modeled, simulated, and analyzed by considering the parameters of the off‐the‐shelf products. Analytical and simulation results showed that the proposed system produces significant power gain and reduction in BER in the presence of phase errors, frequency errors, additive white Gaussian noise, and Rayleigh fading. A detailed theoretical analysis and Monte Carlo simulation revealed that the proposed collaborative communication system is an energy efficient communication system that can be implemented in sensor networks, as approximately N (number of collaborative nodes) times less total transmitted power is required than for the single input single output communication for a specifies transmission range. Copyright © 2012 John Wiley & Sons, Ltd.     

Feedback Communications over Fading Channels

A communication system using noiseless feedback for Rayleigh fading channels is proposed. Pilot tone signaling is used to provide channel amplitude and phase information for the detection of antipodal signals. Channel estimates generated in the receiver are fed back to control the transmitter power and rate. Power division and rate control rules are derived, and it is shown that definite performance improvement over diversity systems is obtained. Because of the requirement of small loop propagation delays, the technique is mainly applicable to low data rate multitone modems for short range HF channels.     

The convex geometry of subchannel attenuation coefficients inlinearly precoded OFDM systems

Channels with spectral nulls are sometimes dubbed bad channels because they can cause poor performance in communication systems. This article investigates the validity of this intuition by studying the geometry of an orthogonal frequency-division multiplex (OFDM) system. It is shown that the subchannel attenuation coefficients form a natural coordinate system for describing finite-impulse response (FIR) channels in an OFDM framework. It is also shown that channels with spectral nulls are geometrically significant; they form the faces of the convex set of all subchannel attenuation coefficients. This novel perspective makes it immediately clear why the worst performance of a linearly precoded OFDM system is achieved over a channel having the greatest number of spectral nulls. The practical implications of these results are discussed     

定标器的设计与实现

定标器(Scaler)是广泛应用于平板显示器系统中的图像缩放引擎,它将不同分辨率的输入图像经缩放后以固定的分辨率输出到平板显示器上.本文首先在分析定标器系统结构的基础上提出了三个时序约束条件,并推导了相应的公式,当满足这三个约束条件时,定标器中的FIFO和行缓冲区不会上溢或下溢,显示帧与输入帧同步,很好地解决了定标器的时序问题.随后介绍了基于双线性插值算法的图像缩放引擎设计,然后用FPGA实现该缩放引擎,并构建测试环境对整个定标器进行逻辑功能验证,最后给出验证的结果.