硅基GaAs／GaAlAs平面光波导的研究

分析了金属有机化合物化学气相淀积（ＭＯＣＶＤ）ＧａＡｓ／ＧａＡｓＡｌ／ＧａＡｓ／Ｓｉ材料结构的性能，用ＭＯＣＶＤ法地硅衬底上生长了ＧａＡｓ／ＧａＡｓＡｌ／ＧａＡｓ材料，并用这种材料制备了平面光波导样品，测定了１．３μｍ，单模激光的传输损耗小于０．６５ｄＢ／ｃｍ。     

CoSi_2可望成为GaAs MESFET自对准工艺中的栅极材料

本文选用了Ｃｏ／Ｓｉ／ＧａＡｓ结构作为研究对象，经６００℃恒温退火及８００℃快速退火处理后，分别在ＧａＡｓ衬底上形成Ｃｏｓｉ２／ＧａＡｓＳｃｈｏｔｔｋｙ接触．采用多种薄膜和界面的测试技术，对ＣｏＳｉ２：／ＧａＡｓ的薄膜及界面特性进行了细致的研究．结果表明：热退大处理后，Ｃｏ／Ｓｉ经化学反应形成了较均匀的ＣｏＳｉ２单相，其薄膜电阻率约为３０μΩｃｍ．即使经９００℃的快速返火处理后，ＧａＡｓ界面仍保持相当的完整性，同时薄膜形貌也很理想．此外，采用Ｉ－Ｖ电学测试法对经７５０℃恒温退火处理后形成的ＣｏＳｉ２／Ｇａ     

AlN 和 SiO_xN_y 薄膜与其 GaAs 衬底间界面应力的喇曼光谱研究

本文用喇曼散射方法研究了在ＧａＡｓ衬底上用Ｓ－枪磁控反应溅射的ＡｌＮ和ＰＥＣＶＤ淀积的ＳｉＯｘＮｙ薄膜的界面应力，并研究了这两种薄膜在Ｎ２和Ａｒ气氛下的高温热处理对界面应力的影响．结果表明，与ＳｉＯｘＮｙ薄膜不同，在ＧａＡｓ衬底上制备的ＡｌＮ薄膜，其界面应力很小，而且经Ｎ２和Ａｒ气氛下的高温快速热退火，仍具有较好的稳定性，从而表明ＡｌＮ是ＧａＡｓ集成电路技术中一种较好的绝缘介质、钝化层和保护材料．     

AIN和SiOxNy薄膜与其GaAs衬底间界面应力的喇曼光谱研究

本文用喇曼放射方法研究了在ＧａＡｓ衬底上用Ｓ－枪磁控反应溅射的ＡＩＮ和ＰＥＣＶＤ淀积的ＳｉＯｘＮｙ薄膜界面应力，并研究了这两种薄膜在Ｎ２和Ａｒ气氛下的高温热处理对界面应力的影响。结果表明，与ＳｉＯｘＮｙ薄膜不同，在ＧａＡｓ衬底上制备的ＡＩＮ薄膜，其界面应力很不，而且经Ｎ２和Ａｒ气氛下的高温快速热退火，仍具有较好的稳定性，从而表明ＡＩＮ是ＧａＡｓ集成电路技术中一种较好的绝缘介质、钝化层和保护材料。     

SiGe／Si HBT及其单片微波集成电路的研究

ＳｉＧｅ／Ｓｉ ＨＢＴ作为单片微波集成电路中的有源元件，在截止频率，增益，噪声等方面相对于ＧａＡｓ器件有很大的优势。本文结合本单位在ＳｉＧｅ材料和器件、电路等方面做过的工作，对实现ＳｉＧｅ单片微波集成电路的一些理论和技术要点作了阐述。     

钨硅／砷化镓肖特基接触的热稳定性分析

研究了以ＷＳｉ０．６复合材料作为靶源，采用直流空溅射工艺成膜，不同退火温度下ＧａＡｓ衬底材料上ＷＳｉ０．６膜层的特性。包括ＷＳｉ０．６／ＧａＡｓ系统断面ＳＥＭ分析，ＡＥＳ界面机构分析、表面形貌分析及金属－半导体肖特基势垒特性分析，实验结果表明，在氩气压力为１３３Ｐdisplay status     

同质及异质外延生长InSb中可控的p型和n型掺杂

本文对在ＩｎＳｂ及ＧａＡｓ衬底上用分子束外延生长的ＩｎＳｂ分别以Ｂｅ和Ｓｉ作ｐ型和ｎ型的掺杂作了研究。当衬底温度超过３４０℃时，利用二次离子质谱技术，在ＩｎＳｂ衬底上生长时，发现Ｂｅ向表面有反常迁移现象。而在ＧａＡｓ衬底上生长的掺Ｂｅ的ＩｎＳｂ薄膜中未发现这种迁移。在掺Ｓｉ的ＩｎＳｂ膜中也未发现掺杂剂的再分布现象。ＩｎＳｂ中Ｂｅ的掺杂效率约是ＧａＡｓ中的一半，若想使Ｓｉ在ＩｎＳｂ中的掺杂效率达到其在ＧａＡｓ中的掺杂效率，在整个生长过程中，需将衬底温度维持在＜３４０℃。利用低温生长技术，可生长出呈现二维电子气体特性的Ｓｉ△－掺杂结构。     

利用CBE技术在Si衬底上生长GaAs薄膜

采用化学束外延（ＣＢＥ）技术，以三乙基镓（ＴＥＧ）和砷烷（ＡｓＨ３）为源，在Ｓｉ（００１）衬底上生长ＧａＡｓ薄膜．利用Ｈａｌｌ效应、卢瑟福背散射（ＲＢＳ）和高分辨率透射电子显微镜（ＨＲＴＥＭ）检测了外延层的质量．结果表明，ＧａＡｓ薄膜具有ｎ型导电性，载流子浓度为１．３×１０１５ｃｍ－３，其杂质估计是Ｓｉ，它来自衬底的自扩散．外延层的质量随着膜厚的增加而得到明显的改善．在ＧａＡｓ／Ｓｉ界面及其附近，存在高密度的结构缺陷，包括失配位错、堆垛层错和孪晶．这些缺陷完全缓解了ＧａＡｓ外延层和Ｓｉ衬底之间因晶格失配引     

硅基异质结光电探测器用材料的应用研究进展

综述当前ＧｅＳｉ／Ｓｉ、ＧａＡｓ／ＧａＡｌＡｓ、ＨｇＣｄＴｅ、ＰｔＳｉ和ＧａＮ光电探测器用材料的工作原理、特点、研究现状及发展趋势。以新型薄膜外延技术－分子束外延制备的ＧｅＳｉ／Ｓｉ等人工超晶格材料倍受关注,硅基异质子阱材料成为新一代光电探测材料的发展方向。     

离子注入半绝缘GaAs电激活效率与电激活均匀性的研究

研究了Ｓｉ＾＋和Ｓｉ＾＋／Ａｓ＾＋注入到Ｈｏｒｉｚｏｎｔａｌ Ｂｒｉｄｇｍａｎ（ＨＢ）和Ｌｉｑｕｉｄ Ｅｎｃａｐｓｕｌａｔｅｄ Ｃｚｏｃｈｒａｌｓｋｉ（ＬＥＣ）方法制备的半绝缘ＧａＡｓ衬底电激活效率与均匀性。结果发现：在相同条件下（注入与退火）,不同生长方法的半绝缘ＧａＡｓ衬底电激活不同,通常电激活ＨＢ〉ＬＥＣ,ＨＢ ＳＩ－－ＧａＡｓ（Ｃｒ）（１００）Ａ面〉（１００）Ｂ面,Ｓｉ＾＋／Ａｓ＾＋双离子     

The prospects for ultrahigh-speed VLSI GaAs digital logic

Recent advances in the state of GaAs integrated circuit fabrication technology have made possible the demonstration of ultrahigh performance (tau_{d} sim 100ps) GaAs digital IC's with up to 64 gate MSI circuit complexities and with gate areas and power dissipations sufficiently low to make VLSI circuits achievable. It is the purpose of this paper to evaluate, based on the current state of GaAs IC technology and the fundamental device physics involved, the prospects of achieving an ultrahigh-speed VLSI GaAs IC technology. The paper includes a performance comparison analysis of Si and GaAs FET's and switching circuits which indicates that, for equivalent speed-power product operation, GaAs IC's should be about six times faster than Si IC's. The state of the art in GaAs IC fabrication and logic circuit approaches is reviewed, with particular emphasis on those approaches which are LSI/VLSI compatible in power and density. The experimental performance results are compared for the leading GaAs logic circuit approaches, both for simple ring oscillators and for more complex sequential logic circuits (which have demonstrated equivalent gate delays as low astau_{d} = 110ps).     

A monolithic GaAs-on-Si receiver front end for optical interconnectsystems

The authors describe a monolithic technology for integrating GaAs with Si bipolar devices and demonstrate that such integration can provide improved system performance without degrading individual devices. The technology has been used to implement a 1-GHz GaAs/Si optical receiver with an equivalent input noise current density of less than 3 pA/√Hz for midband operation, and less than 4.5 pA/√Hz at 1 GHz. In this receiver an interdigitated GaAs metal-semiconductor-metal (MSM) photodetector is combined with a transimpedance preamplifier fabricated in silicon bipolar technology. The measured dark current of the GaAs/Si photodetector is 7 nA. The measured pulse response of an experimental integrated receiver is less than 550 ps FWHM. The integrated front end provides a wideband, low-noise optical receiver for use in local optical interconnections and demonstrates the successful application of integrated GaAs-on-Si technology to optoelectronics     

Monolithic integration of GaAs/AlGaAs LED and Si driver circuit

A GaAs/AlGaAs LED has been monolithically integrated with a Si driver circuit composed of ten MOSFETs. The LED replaces the output pad of a 2- μm design rule, standard Si output buffer circuit, so that the overall area remains the same. By applying a stream of voltage pulses to the input of the driver circuit, the LED output has been modulated at rates exceeding 100 MHz     

Simulation of double junction In0.46Ga0.54N/Si tandem solar cell

A comprehensive study of high efficiency In_0.46Ga_0.54N/Si tandem solar cell is presented. A tunnel junction (TJ) was needed to interconnect the top and bottom sub-cells. Two TJ designs, integrated within this tandem: GaAs(n⁺)/GaAs(p⁺) and In_0.5Ga_0.5N(n⁺)/Si(p⁺) were considered. Simulations of GaAs(n⁺)/GaAs(p⁺) and In_0.5Ga_0.5N (n⁺)/Si(p⁺) TJ I-V characteristics were studied for integration into the proposed tandem solar cell. A comparison of the simulated solar cell I-V characteristics under 1 sun AM1.5 spectrum was discussed in terms of short circuit current density (J_sc), open circuit voltage (V_OC), fill factor (FF) and efficiency (η) for both tunnel junction designs. Using GaAs(n⁺)/GaAs(p⁺) tunnel junction, the obtained values of J_sc = 21.74 mA/cm², V_OC= 1.81 V, FF = 0.87 and η = 34.28%, whereas the solar cell with the In_0.5Ga_0.5N/Si tunnel junction reported values of J_sc = 21.92 mA/cm², V_OC = 1.81 V, FF = 0.88 and η = 35.01%. The results found that required thicknesses for GaAs(n⁺)/GaAs(p⁺) and In_0.5Ga_0.5N (n⁺)/Si(p⁺) tunnel junctions are around 20 nm, the total thickness of the top InGaN can be very small due to its high optical absorption coefficient and the use of a relatively thick bottom cell is necessary to increase the conversion efficiency.     

High-Speed Digital IC Performance Outlook

This paper, which is a tutorial on high-speed GaAs digital IC's, was given as one of the 1984-1985 MTT-S Distinguished Microwave Lectures. It reviews GaAs FET technology and issues related to device/ circuit design and fabrication of digital circnits of MSI/LSI complexity operating at gigahertz clock frequencies; discusses limitations of the technology; compares GaAs technology with competing Si bipolar transistors, GaAIAs HEMT, and GaAIAs HBT technologies and projects performance of GaAs digital IC technology in applications where it will have a significant impact on microwave systems.     

The prospects for ultrahigh-speed VLSI GaAs digital logic

Recent advances of GaAs integrated circuit fabrication technology have made possible the demonstration of ultrahigh performance GaAs digital ICs with up to 64 gate MSI circuit complexities and with gate areas and power dissipations sufficiently low to make VLSI circuits achievable. The authors evaluate, based on the current state of GaAs IC technology and the fundamental device physics involved, the prospects of achieving an ultrahigh-speed VLSI GaAs IC technology. GaAs IC fabrication and logic circuit approaches is reviewed. The experimental performance results are compared for the leading GaAs logic circuit approaches, both for simple ring oscillators and for more complex sequential logic circuits.     

Application of low temperature GaAs to GaAs/Si

Low Temperature grown GaAs (LT-GaAs) was incorporated as a buffer layer for GaAs on Si (GaAs/Si) and striking advantages of this structure were confirmed. The LT-GaAs layer showed high resistivity of 1.7 × 10⁷ ω-cm even on a highly defective GaAs/Si. GaAs/Si with the LT-GaAs buffer layers had smoother surfaces and showed much higher photoluminescence intensities than those without LT-GaAs. Schottky diodes fabricated on GaAs/Si with LT-GaAs showed a drastically reduced leakage current and an improved ideality factor. These results indicate that the LT-GaAs buffer layer is promising for future integrated circuits which utilize GaAs/Si substrates.     

Si:SiGe MODFET current mirror

Measurements of the DC characteristics of a negative inverting, voltage-following current mirror are presented. The circuit design uses prototype n-depletion mode, modulation doped field effect transistors employing Si:SiGe heterojunction technology and is based on recently established circuit design techniques for GaAs MESFET technology. The results show a quasi-linear response with gate voltage swings (V_gs ) of ±0.5 V. Increases in the achievable range of V_gs are anticipated through changes in material growth and device processing, and also through enhancement of the circuit design     

LSI processing technology for planar GaAs integrated circuits

A planar GaAs integrated circuit (IC) fabrication technology capable of LSI complexity has been developed. The circuit and fabrication approaches were chosen to satisfy LSI requirements for high yield, high density, and low power. This technology utilizes Schottky-diode FET logic (SDFL) incorporating both high-speed switching diodes and 1-µ m GaAs MESFET's. Circuits are fabricated directly on semi-insulating GaAs using multiple localized implantations. Rapid progress in the development of this technology has already led to the successful demonstration of high-speed (tau_{d} sim 100ps) low-power (∼500 µW/gate) GaAs MSI (∼60-100 gates) circuits. Extension of the current MSI technology to the LSI/VLSI domain will depend critically on device yield which will be dictated by the GaAs material properties and by the fabrication processes used. The purpose of this paper is to describe a GaAs IC process technology which combines advanced planar device and multilevel interconnect structures with several LSI compatible processes including multiple localized ion implantations, reduction photolithography, plasma etching, reactive ion etching, and ion milling.     

A dc and microwave comparison of GaAs MESFET's on GaAs and Si substrates

In order to assess GaAs on Si technology, we have made a performance comparison of GaAs MESFET's grown and fabricated on Si and GaAs substrates under identical conditions and report the first microwave results. The GaAs MESFET's on Si with 1.2-µm gate length (290-µm width) exhibited transconductances (gm) of 180 mS/mm with good saturation and pinchoff whereas their counterparts on GaAs substrates exhibited gmof 170 mS/mm. A current gain cut-off frequency of 13.5 GHz was obtained, which compares with 12.9 GHz observed in similar-geometry GaAs MESFET's on GaAs substrates. The other circuit parameters determined from S-parameter measurements up to 18 GHz showed that whether the substrate is Si or GaAs does not seem to make a difference. Additionally, the microwave performance of these devices was about the same as that obtained in devices with identical geometry fabricated at Tektronix on GaAs substrates. The side-gating effect has also been measured in both types of devices with less than 10-percent decrease in drain current when 5 V is applied to a pad situated 5 µm away from the source. The magnitude of the sidegating effect was identical to within experimental determination for all side-gate biases in the studied range of 0 to -5 V. The light sensitivity of this effect was also very small with a change in drain current of less that 1 percent between dark and light conditions for a side gate bias of -5 V and a spacing of 5 µm. Carrier saturation velocity depth profiles showed that for both MESFET's on GaAs and Si substrates, the velocity was constant at 1.5 × 10⁷cm/s to within 100-150 Å of the active layer-buffer layer interface.