High-performance current control techniques for application tomultilevel high-power voltage source inverters

Several high-performance current control techniques are developed for applications to multilevel high-power voltage source inverters (VSIs). The logical sequence of the design choices is described, resulting in a very robust and reliable control system that allows an adequate switching optimization, excellent dynamic responses, and high accuracy in steady-state operation. The advantages of using various accessible DC potentials are fully exploited. The validity of the proposed schemes has been confirmed by digital simulations involving the generation of five-level voltage waveforms; however, the current control strategies developed can easily be extended to any multilevel inverter structure, even in the case of n-level voltage waveforms and three-phase systems     

A new single-phase five-level PWM inverter employing a deadbeat control scheme

A single-phase five-level PWM inverter is presented to alleviate harmonic components of the output voltage and the load current. Operational principles with switching functions are analyzed. To keep the output voltage sinusoidal and to have the high dynamic performances even in the cases of load variations and the partial magnetization in filter inductor, the deadbeat controller is designed and implemented on a prototype. The validity of the proposed inverter is verified through simulation and experiments. To assess the proposed inverter, it is compared with the conventional single-phase three-level PWM inverter under the conditions of identical supply DC voltage and switching frequency. In addition, it is compared with the five-level cascaded PWM inverter.     

Five-Level Diode Clamped Inverter to EliminateCommon Mode Voltage and Reduce $dv/dt$ inMedium Voltage Rating Induction Motor Drives

The High power induction machines are designed at medium voltage (MV) rating for better performance. The multilevel inverters (MLI) are able to provide medium voltage with high quality output at low switching frequency as compared to conventional two-level inverter. In addition to this, MLI reduces $dv/dt$, switching losses and leakage current. In this paper, approaches to reduce and eliminate the common mode voltage (CMV) using five-level diode clamped multilevel inverter (DCMLI) are presented. The CMV spikes are also eliminated by shifting dead-time across the phase pole. A novel technique for the selection of switching states to synthesize the desire vector is proposed. This paper realizes the implementation of five-level diode clamped MLI for three phase induction motor. Experimental results demonstrate the feasibility of the proposed solution.      

A new n-level high voltage inversion system

This paper deals with a new multilevel high-voltage source inverter with gate-turn-off (GTO) thyristors. Recently, a multilevel approach seemed to be the best suited for implementing high-voltage power conversion systems because it leads to a harmonic reduction and deals with safe high-power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multilevel inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multilevel inverter structure is proposed     

Parallel resonant DC link circuit-a novel zero switching losstopology with minimum voltage stresses

A parallel resonant DC link (PRDCL) circuit topology is proposed as an approach to realizing zero switching loss DC-AC high switching frequency power conversion. The proposed circuit is used as an interface between the DC voltage supply and a voltage source pulse width modulated (PWM) inverter to provide a short zero voltage period in the DC link of the inverter to allow zero voltage switchings to take place in the PWM inverter. The peak voltage stress on the PWM inverter switches is limited to the DC supply voltage. Another significant advantage of the circuit is that the inverter can be controlled by the conventional PWM strategy. The proposed circuit is systematically analyzed and its operation principle is explained. Design considerations and design formulas are presented. A complete zero voltage switching DC-AC system consisting of the proposed circuit and a PWM inverter was simulated on a computer     

Extended operation of flying capacitor multilevel inverters

Recent research in flying capacitor multilevel inverters (FCMIs) has shown that the number of voltage levels can be extended by changing the ratio of the capacitor voltages. For the three-cell FCMI, four levels of operation are expected if the traditional ratio of the capacitor voltages is 1:2:3. However, by altering the ratio, the inverter can operate as a five-, six-, seven-, or eight-level inverter. According to previous research, the eight-level case is referred to as maximally distended (or full binary combination schema) since it utilizes all possible transistor switching states. However, this case does not have enough per-phase redundancy to ensure capacitor voltage balancing under all modes of operation. In this paper, redundancy involving all phases is used along with per-phase redundancy to improve capacitor voltage balancing. It is shown that the four- and five-level cases are suitable for motor drive operation and can maintain capacitor voltage balance under a wide range of power factors and modulation indices. The six-, seven-, and eight-level cases are suitable for reactive power transfer in applications such as static var compensation. Simulation and laboratory measurements verify the proposed joint-phase redundancy control.     

A four-level inverter based drive with a passive front end

Multilevel inverters are suited for high power drive applications due to their increased voltage capability. Specifically, as compared to three level inverters, for a given DC bus voltage, a four-level inverter is able to synthesize better waveforms with reduced device ratings. In a medium voltage drive, a conventional diode bridge rectifier is a low cost multilevel solution if the DC bus voltages can be balanced from the inverter side alone. In this paper, operation of a four-level drive with a passive rectifier is investigated, and modulation constraints of the inverter, arising from the capacitor voltage balancing requirements are examined. Simulation and experimental results are presented to demonstrate the link voltage balancing strategy and the performance of the four-level drive     

Multilevel Multiphase Space Vector PWM Algorithm With Switching State Redundancy

Multilevel multiphase technology combines the benefits of multilevel converters and multiphase machines. Nevertheless, new modulation techniques must be developed to take advantage of multilevel multiphase converters. In this paper, a new space vector pulsewidth modulation algorithm for multilevel multiphase voltage source converters with switching state redundancy is introduced. As in three-phase converters, the switching state redundancy permits to achieve different goals like extending the modulation index and reducing the number of switchings. This new algorithm can be applied to the most usual multilevel topologies; it has low computational complexity, and it is suitable for hardware implementations. Finally, the algorithm was implemented in a field-programmable gate array, and it was tested by using a five-level five-phase inverter feeding a motor.      

Improved control for high power static var compensator using novel vector product phase locked loop (VP-PLL)

This paper presents a new dual loop control using novel vector product phase locked loop (VP-PLL) for a high power static var compensator (SVC) with three-level GTO voltage source inverter (VSI). From a simple dq-axis equivalent circuit obtained by circuit DQ-transformation method, steady-state analysis is achieved for maximum controllable phase angle α_max per unit current between AC source and switching function of inverter. In addition, the system parameters L and C are designed and thus transient analysis is made for open-loop transfer function. This paper proposes software VP-PLL for more accurate α control than conventional hardware PLL because α_max becomes very small in high power SVC. Therefore, the overall controller has dual loop structure of inner VP-PLL for synchronizing the phase angle with AC source and outer Q-loop for compensating reactive power of load. Finally, the usability of the proposed control method is verified through the experiment of 100kvar power capacity with both stand alone and load linked operation.     

A Space Vector Modulation Scheme to Reduce Common Mode Voltage for Cascaded Multilevel Inverters

Multilevel inverters can reduce the common mode voltage generated. Schemes have been reported for multilevel inverters that reduce the common mode voltage. However, most of the schemes result in reduced modulation depth, high switching losses, and high harmonic distortion. This paper proposes a space-vector modulation scheme to reduce common mode voltage for cascaded multilevel inverters. The proposed scheme can increase the voltage range of operation by about 17% and can produce lower total harmonic distortion than the previously proposed schemes. The scheme is explained for five-level inverter. The scheme can be easily extended to a n-level inverter. Both experimental and simulation results are provided.     

Economical design of H-bridge multilevel inverter drive controlled by modified fast algorithm

Traditional cascaded multilevel inverter needs n DC voltage sources to give 2n + 1 levels. As number of levels increased, the amount of switching devices, their proper related drive circuits and their controllers and other components are also increased excessively, making the inverter more complex and costly. A simple and low cost single-phase cascade multilevel inverter with no transformers can be implemented using only single-DC source with n-1 DC sources represented by capacitors and with reduced switches. So, current inverter hardware cost can be reduced abruptly as compared with conventional one.When the number of DC sources is increased, inverter output has higher harmonic content characterized by their transcendental equations that become more complicated and required more time to be solved. New technique is exhibited to find the inverter switching angles by executing modified fast recursive algorithm providing an on-line precise solution for the Harmonic Elimination (HE) problem. The suggested optimized algorithm technique have been used to find optimum switching angles necessary to eliminate any number of lowest order harmonics and maintain the desired fundamental voltage for driving an AC motor. Simulation results of cascade 7-level inverter with single-DC source under the optimized HE stepped waveform technique is used to eliminate the 3rd and 5th harmonics. Prototype design for the proposed inverter loaded by single-phase fan motor is built.     

A cascade boost-switched-capacitor-converter - two level inverter with an optimized multilevel output waveform

Two structures, a switched-capacitor (SC)-based boost converter and a two-level inverter, are connected in cascade. The dc multilevel voltage of the first stage becomes the input voltage of the classical inverter, resulting in a staircase waveform for the inverter output voltage. Such a multilevel waveform is close to a sinusoid; its harmonics content can be reduced by multiplying the stage number of the SC converter. The output low-pass filter, customary after a two-level inverter, becomes obsolete, resulting in a small size of the system, as the SC circuit can be miniaturized. Both stages are operated at a high switching frequency, resulting in a high-frequency inverter output, as required by some industrial applications. A Fourier analysis of the output waveform is performed. The design is optimized with reference to the nominal duty-cycle for obtaining the minimum total harmonic distortion. Simulations and experiments on two prototypes, one with a five-level output and one with a seven-level output, confirm the theoretical analysis.     

Hybrid Cascaded H-Bridge Multilevel-Inverter Induction-Motor-Drive Direct Torque Control for Automotive Applications

This paper presents a hybrid cascaded H-bridge multilevel motor drive direct torque control (DTC) scheme for electric vehicles (EVs) or hybrid EVs. The control method is based on DTC operating principles. The stator voltage vector reference is computed from the stator flux and torque errors imposed by the flux and torque controllers. This voltage reference is then generated using a hybrid cascaded H-bridge multilevel inverter, where each phase of the inverter can be implemented using a dc source, which would be available from fuel cells, batteries, or ultracapacitors. This inverter provides nearly sinusoidal voltages with very low distortion, even without filtering, using fewer switching devices. In addition, the multilevel inverter can generate a high and fixed switching frequency output voltage with fewer switching losses, since only the small power cells of the inverter operate at a high switching rate. Therefore, a high performance and also efficient torque and flux controllers are obtained, enabling a DTC solution for multilevel-inverter-powered motor drives.      

Fundamental Frequency Switching Strategies of a Seven-Level Hybrid Cascaded H-Bridge Multilevel Inverter

This paper presents a cascaded H-bridge multilevel inverter that can be implemented using only a single dc power source and capacitors. Standard cascaded multilevel inverters require $n$ dc sources for 2$n + hbox{1}$ levels. Without requiring transformers, the scheme proposed here allows the use of a single dc power source (e.g., a battery or a fuel cell stack) with the remaining $n-1$ dc sources being capacitors, which is referred to as hybrid cascaded H-bridge multilevel inverter (HCMLI) in this paper. It is shown that the inverter can simultaneously maintain the dc voltage level of the capacitors and choose a fundamental frequency switching pattern to produce a nearly sinusoidal output. HCMLI using only a single dc source for each phase is promising for high-power motor drive applications as it significantly decreases the number of required dc power supplies, provides high-quality output power due to its high number of output levels, and results in high conversion efficiency and low thermal stress as it uses a fundamental frequency switching scheme. This paper mainly discusses control of seven-level HCMLI with fundamental frequency switching control and how its modulation index range can be extended using triplen harmonic compensation.      

Analysis and controller design of static VAr compensator usingthree-level GTO inverter

A static VAr compensator (SVC) using a three-level GTO voltage source inverter (VSI) is presented for high-voltage, high-power applications. The three-level VSI has lower harmonic components and higher DC-link voltage than the two-level VSI and thus can be operated at lower switching frequency (f_sw<500 Hz) without excessive harmonic contents. From the DQ-transformed equivalent circuit of the presented SVC system, DC and AC analyses are carried out to find the steady-state and the dynamic characteristics of the system. Based on the open-loop transfer function of the system, a controller is designed to achieve fast dynamic response. The experimental results confirm the theoretical analyses and controller design     

基于神经网络的多电平逆变电路故障诊断

因含有大量的开关器件,多电平逆变器难以用基于模型的方法进行故障诊断。针对这一问题,提出了一种基于神经网络的故障识别和分类方法。采用载波相移脉冲宽度调制（PWM）策略搭建级联五电平逆变电路,对逆变器的输出电压信号进行快速傅里叶变换,获取其频谱并以此作为特征信息。利用反向传播算法（BP）神经网络对输出电压模式进行分类。Matlab仿真结果表明,本文设计的 BP神经网络有效地实现了对逆变器的故障诊断。     

基于坐标变换的间隙性功率并网系统解耦控制与设计

针对逆变器电流环的有功电流和无功电流存在耦合的情况,文中采用电流的解耦控制,达到独立控制逆变器的有功功率和无功功率;针对逆变器直流侧电压容易波动,文中采用双环控制,稳定逆变器直流侧的电压。搭建了MA-TALAB/SIMULINK系统仿真实验平台,通过间歇性能源输入逆变器功率变化的实验,验证了该逆变器能独立控制输出的有功功率和无功功率,并且保证了直流侧电压的稳定。     

Trinary Hybrid 81-Level Multilevel Inverter for Motor Drive With Zero Common-Mode Voltage

This paper proposes a trinary hybrid 81-level multilevel inverter for motor drive. Benefiting from the trinary hybrid topology of the inverter, 81-level voltages per phase can be synthesized with the fewest components. Bidirectional DC-DC converters are used not only to inject power to the DC links of the inverter but also to absorb power from some DC links in cases with a lower modulation index. The higher bandwidth of DC-DC converters alleviates the ripples of DC-link voltages caused by the load current. The space vector modulation used here, which selects voltage vectors that generate a zero common-mode voltage in the load, works at a low switching frequency. With up to 81-level voltages per phase, the total harmonic distortion is small, and the relationship between the fundamental load voltage and the modulation index is precisely linear. A vector controller is used to control an induction motor, which results in a high dynamic response for speeds or torques. The performance of the proposed inverter for the motor drive is confirmed by simulation and experiment.     

DC Link Capacitor Voltage Balancing in a Three-Phase Diode Clamped Inverter Controlled by a Direct Space Vector of Line-to-Line Voltages

In this paper, the direct modulation strategy of a three-level inverter with self stabilization of the dc link voltage is extended to a five-level inverter. Therefore, a new modeling and control strategy of a five-level three-phase diode-clamped inverter (DCI) is presented. The obtained modeling shows that modulated multilevel voltages are obtained by combination of eight different three-level functions, which are called modulation functions. Therefore, a space-vector scheme without using a Park transform is explained. Based on this algorithm, the location of the reference voltage vector can be easily determined. Then, the voltage vectors are selected to generate corresponding levels and simultaneously their durations are calculated. More over, the redundancies of different switch configurations for the generation of intermediate voltages are used to limit the deviation of capacitor voltages. Experimental results are given to illustrate the proposed control strategy of the three-phase three-level diode clamped inverter. Then, obtained results for a five-level three-phase DCI with the extended version of the control strategy are presented to show the good performances of the proposed balancing modulation.     

Cascaded H-bridge multilevel inverters with discrete variation of DC sources

This paper presents a new voltage regulation structure for multilevel inverters using discrete variation of DC sources. In the proposed method, discrete variation is achieved based on multi-tap transformers for applications where the DC sources are isolated and supplied by three-phase transformers, e.g., medium voltage (MV) motor drive applications. Moreover, by utilising the new solution, the number of required DC regulators is reduced significantly, for applications where the optimum modulation index with variable DC sources is used which suffer from large number of required converters. In addition, this paper proposes a new algorithm for optimising the switching angles, turn ratios of the multi-tap transformers and DC sources to maintain the voltage distortions at the standards levels for a wide range of output voltage regulation. To verify the feasibility of the new solution, a laboratory prototype is implemented based on a 2-cell cascaded H-bridge (CHB) multilevel inverter with unequal DC sources (with 9-level operation) while the proposed structure can be applied for other CHB multilevel inverters and switching strategies.