Ladder tuning‐block partitioned filters for simplified tuning

In this paper, we present a procedure for the design of low‐sensitivity, active‐RC filters that permits efficient functional tuning during the manufacturing process. Filters with finite zeros, such as elliptic (Chebyshev–Cauer) low‐pass filters are primarily considered, although the method can be applied to the design of other filters, e.g. allpole filters, as well. We show how to partition a given ladder filter into two parts. The first is a ladder filter of reduced order compared to the original; the second is a second‐ or third‐order active‐RC filter section, the ‘tuning block’, which, alone is used to tune the overall filter. The ladder, the components of which are fixed, provides most of the selectivity, while the cascaded tuning block determines the band‐edge characteristics and can be tuned relatively easily. A detailed design procedure for the filter partitioning is given. By obtaining a doubly terminated ladder filter, which is cascaded with a tuning block, both the inherent low sensitivity of the ladder and the tunability of the tuning block, are maintained. A Monte Carlo analysis of the partitioned filter demonstrates that the low sensitivity with respect to component tolerances, achievable by maintaining a doubly terminated ladder structure for the larger partitioned part of the filter, is preserved. Copyright © 2012 John Wiley & Sons, Ltd.     

Useful network transformations and reconfigurable analogue filters using the complementary transformation

In this paper it is shown that some of the useful network transformations, such as low pass (LP) to band pass (BP), LP to high pass (HP) and HP to BP can be obtained by means of the complementary transformation (CT). Furthermore, because the CT is a topological one (i.e. the component values remain unchanged, but their position within the circuit changes), it is suitable to realize reconfigurable analogue filter arrays. As an example, a full list of the obtainable GIC‐based filters, along with their design equations, is also presented. Copyright © 2001 John Wiley & Sons, Ltd.     

Analytical synthesis of voltage‐mode even/odd‐nth‐order differential difference current conveyor and fully differential current conveyor II‐grounded resistor and capacitor universal filter structures

A complete definition of an odd/even‐nth‐order notch or band‐reject filter transfer function is presented. Based on the differences between the input voltage and (i) an nth‐order high‐pass; (ii) a traditional nth‐order notch; and (iii) an nth‐order all‐pass filtering transfer function, a systematic method has been proposed to derive a universal filter structure that can realize voltage‐mode odd/even‐nth‐order low‐pass, band‐pass, high‐pass, all‐pass and traditional notch filters. The intrinsic capability of voltage‐mode addition and subtraction of the two active elements, differential difference current conveyors and fully differential current conveyors, is used to advantage in the aforementioned synthesis procedure. Based upon the definition of an nth‐order notch or band‐reject filter transfer function proposed in this paper, the aforementioned universal one has been further extended to the newly defined nth‐order band rejection filter. The voltage and current tracking errors of the two active elements are compensated by varying the resistances of the proposed filter. Filtering feasibility, stability, component sensitivities, linear and dynamic ranges, power consumption, and noise are simulated using H‐Spice with 0.35 µm process. Compared to some of the recently reported universal biquads, the new one is shown to enjoy the lowest component sensitivities and the best output accuracy for all‐pass signals. Moreover, Monte Carlo and two‐tone tests for intermodulation linearity simulations are also investigated. Copyright © 2014 John Wiley & Sons, Ltd.     

Explicit design formulas for current‐mode leap‐frog OTA‐C filters and 300 MHz CMOS seventh‐order linear phase filter

The leap‐frog (LF) configuration is an important structure in analogue filter design. Voltage‐mode LF OTA‐C filters have recently been studied in the literature; however, general explicit formulas do not exist for current‐mode LF OTA‐C filters and there is also need for current‐mode LF‐based OTA‐C structures for realization of arbitrary transmission zeros. Three current‐mode OTA‐C structures are presented, including the basic LF structure and LF filters with an input distributor or an output summer. They can realize all‐pole characteristics and functions with arbitrary transmission zeros. Explicit design formulas are derived directly from these structures for the synthesis of, respectively, all‐pole and arbitrary zero filter characteristics of up to the sixth order. The filter structures are regular and the design formulas are straightforward to use. As an illustrative example, a 300 MHz seventh‐order linear phase low‐pass filter with zeros is presented. The filter is implemented using a fully differential linear operational transconductance amplifier (OTA) based on a source degeneration topology. Simulations in a standard TSMC 0.18µm CMOS process with 2.5 V power supply have shown that the cutoff frequency of the filter ranges from 260 to 320 MHz, group delay ripple is about 4.5% over the whole tuning range, noise of the filter is 420nA/√Hz, dynamic range is 66 dB and power consumption is 200 mW. Copyright © 2008 John Wiley & Sons, Ltd.     

Low‐noise,low‐sensitivity,active‐RC allpole filters using impedance tapering

In this paper it is shown that active‐RC filters whose sensitivity to component tolerances can be minimized by impedance tapering, will also have low output thermal noise. It is shown that impedance tapering will also reduce output thermal noise in OTA‐C filters. Copyright © 2010 John Wiley & Sons, Ltd.     

New designs of low/high‐pass and mid‐pass/stop FIR digital filters

New designs of highly efficient low/high‐ and mid‐pass/stop (centre‐symmetric band‐pass/stop) FIR non‐recursive digital filters are presented. The designs are based on the modulation property of DFT, applied to the already presented MAXFLAT halfband low‐pass filters. The presented filters have explicit formulas for their tap‐coefficients, and therefore are very easy to design. They have highly smooth frequency response and wider transition regions like MAXFLAT filters. The design formulae are modified to give new classes of low/high‐ and mid‐pass/stop filters, for which, like in equiripple filters, the transition bandwidth can be reduced by increasing the size of ripple on magnitude response. It is shown, with the help of design examples, that the performance of these filters is comparable to that of equiripple filters. Copyright © 2001 John Wiley & Sons, Ltd.     

0.5‐V bulk‐driven OTA and its applications

A new 0.5‐V bulk‐driven operational transconductance amplifier (OTA), designed in 50 nm CMOS technology, is presented in the paper. The circuit is characterized by improved linearity and dynamic range obtained for MOS devices operating in moderate inversion region. Some basic applications of the OTA such as a voltage integrator and a second‐order low‐pass filter have also been described. The filter is compared to other low‐voltage filters presented in the literature. Copyright © 2013 John Wiley & Sons, Ltd.     

A DC stabilized log‐domain nth‐order multifunction filter based on the decomposition of nth‐order HP filter function to FLF topology

The design of high‐order log‐domain filters can be easily accomplished by transposing already known linear‐domain G_m‐C filter topologies to their counterparts in the log‐domain through the employment of a set of complementary operators. To achieve the G_m‐C filter topologies, the multiple feedback approach is widely used due to its accrued advantages. In this paper a synthesis approach for the development of an nth‐order multifunction log‐domain filter comprising lowpass (LP), highpass (HP) and bandpass (BP) filter functions is proposed. The approach is based on the decomposition of nth‐order HP filter function to follow‐the‐leader‐feedback (FLF) topology. The design is simple and simultaneously achieves nearly all of the chief advantages. The design offers superior performance factors vis‐à‐vis the ones recently reported. To verify the high‐order behavior of the topology, a 5th‐order multifunction filter was designed and the achieved simulated results verify the theory. Copyright © 2008 John Wiley & Sons, Ltd.     

A 0.6 V, 2.11 MHz, 62 dB SFDR active‐RC filter in 0.13µm CMOS process

Active‐RC biquad is proposed, which allows the DC level of the input of operational amplifier (op‐amp) to be different from that of the op‐amp output, enabling the low‐voltage operation. The proposed biquad realizes a second‐order transfer function with only one op‐amp, rendering even lower power consumption. By cascading two biquads, a 0.6 V fourth‐order filter is realized in a 0.13µm CMOS technology. While dissipating only 0.42 mW, the filter shows 2.11 MHz cut‐off frequency and 62 dB spurious‐free dynamic range. Copyright © 2008 John Wiley & Sons, Ltd.     

Optimal analog active filter design using craziness‐based particle swarm optimization algorithm

Because of the manufacturing constraints, the optimal selection of passive component values for the design of analog active filter is very critical. As the search on possible combinations in preferred values for capacitors and resistors is an exhaustive process, it has to be automated with high accuracy within short computation time. Evolutionary computation may be an attractive alternative for automatic selection of optimal discrete component values such as resistors and capacitors for analog active filter design. This paper presents an efficient evolutionary optimization approach for optimal analog filter design considering different topologies and manufacturing series by selecting their component values. The evolutionary optimization technique employed is craziness‐based particle swarm optimization (CRPSO). PSO is very simple in concept, easy to implement and computationally efficient algorithm with two main advantages: fast convergence and only a few control parameters. However, the performance of PSO depends on its control parameters and may be influenced by premature convergence and stagnation problem. To overcome these problems, the PSO algorithm has been modified to CRPSO and is used for the selection of optimal passive component values of fourth‐order Butterworth low‐pass analog active filter and second‐order state variable low‐pass filter, respectively. CRPSO performs the dual task of efficiently selecting the component values as well as minimizing the total design errors of low‐pass active filters. The component values of the filters are selected in such a way so that they become E12/E24/E96 series compatible. The simulation results prove that CRPSO efficiently minimizes the total design error with respect to previously used optimization techniques. Copyright © 2014 John Wiley & Sons, Ltd.     

Analytical synthesis and comparison of voltage‐mode Nth‐order OTA‐C universal filter structures

Complementary single‐ended‐input operational transconductance amplifier (OTA)‐based filter structures are introduced in this paper. Through two analytical synthesis methods and two transformations, one of which is to convert a differential‐input OTA to two complementary single‐ended‐input OTAs, and the other to convert a single‐ended‐input OTA and grounded capacitor‐based one to a fully differential OTA‐based one, four distinct kinds of voltage‐mode nth‐order OTA‐C universal filter structures are proposed. TSMC H‐Spice simulations with 0.35µm process validate that the new complementary single‐ended‐input OTA‐based one holds the superiority in output precision, dynamic and linear ranges than other kinds of filter structures. Moreover, the new voltage‐mode band‐pass, band‐reject and all‐pass (except the fully differential one) biquad structures, all enjoy very low sensitivities. Both direct sixth‐order universal filter structures and their equivalent three biquad stage ones are also simulated and validated that the former is not absolutely larger in sensitivity than the latter. Finally, a very sharp increment of the transconductance of an OTA is discovered as the operating frequency is very high and leads to a modified frequency‐dependent transconductance. Copyright © 2010 John Wiley & Sons, Ltd.     

The CCII+ and the ICCII as basic building blocks in low‐pass filter realizations

Three new grounded capacitor current mode low‐pass filters using two inverting second‐generation current conveyor (ICCII) or one double output ICCII are given. The circuits employ the minimum number of passive circuit components, namely two resistors and two capacitors. The circuits are generated from three new voltage mode low‐pass filters realized with the ICCII. A new grounded capacitor CCII+ current mode low‐pass filter is generated from one of the new voltage mode low‐pass filters employing two ICCII?. A new grounded passive component low‐pass filter with independent control on Q and using three ICCII+ is also introduced. Spice simulation results based on using the 0.5 µm CMOS model are included to support the theoretical analysis. Copyright © 2007 John Wiley & Sons, Ltd.     

Nearly monotonic passband low‐pass filter design by using sum‐of‐squared Legendre polynomials

A new type of filter approximation, which utilizes orthonormal Legendre polynomials, referred to as sum‐of‐squared Legendre polynomials, is presented in this paper. Power transmission coefficient and the group delay of the proposed filter are compared with those of the Butterworth, Legendre–Papoulis, and Halpern filters. In order to illustrate the design of the proposed filter function, sum‐of‐squared Legendre polynomials coefficients and normalized element values of the low‐pass LC (inductor‐capacitor) ladder network prototype are given, up to the 10th degree. For continuous‐time domain filtering, doubly terminated LC ladder network topologies have very low sensitivities to changes of component values. In order to determine the effect of variation of all reactive components on the filter attenuation characteristic, the new sensitivity function has been proposed. Copyright © 2015 John Wiley & Sons, Ltd.     

Multiple output differential OTA with linearizing bulk‐driven active‐error feedback loop for continuous‐time filter applications

A CMOS circuit realization of a highly linear multiple‐output differential operational transconductance amplifier (OTA) has been proposed. The presented approach exploits a differential pair as an input stage with both the gate and the bulk terminals as signal ports. For the proposed OTA, improved linearity is obtained by means of the active‐error feedback loop operating at the bulk terminals of the input stage. SPICE simulations of the OTA show that, for 0.35 µm AMS process, total harmonic distortion at 1.36Vpp is less than 1% with dynamic range equal to 60.1 dB at power consumption of 276 μW from 3.3 V supply. As an example, both single output and dual differential OTAs are used to design third‐order elliptic low‐pass filters. The cut‐off frequency of the filters is 1 MHz. The power consumption of the OTA‐C filter utilizing the dual output differential OTA is reduced to 1.24 mW in comparison to 2.2 mW consumed by the single output differential OTA‐C filter counterpart. Copyright © 2014 John Wiley & Sons, Ltd.     

Design of current‐mode MOSFET‐C filters using OTRAs

In this paper, third‐order current‐mode MOSFET‐C filters that use operational transresistance amplifiers (OTRAs) with little parasitic capacitance effects are presented. On the basis of the proposed systematic method and design procedure, we can efficiently synthesize third‐order active filters with OTRAs along with simplified MOSFET resistor circuits, and all virtually grounded capacitors. Third‐order current‐mode Chebychev low‐pass and high‐pass filters are realized to verify the validity of the theoretical analysis. Experimental results employing commercially available current feedback amplifiers are also given. Copyright © 2008 John Wiley & Sons, Ltd.     

0.5‐V fractional‐order companding filters

Novel configurations of fractional‐order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh‐domain and log‐domain integrators are presented. Because of the employment of metal–oxide–semiconductor (MOS) transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra‐low‐voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional‐order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company (TSMC) 180‐nm complementary MOS (CMOS) process. Copyright © 2014 John Wiley & Sons, Ltd.     

Square‐root domain linear transformation filters

A new systematic method for designing square‐root domain (SRD) linear transformation (LT) filter is introduced in this paper. For this purpose, a substitution table containing the SRD LT equivalent of each passive element has been introduced. The proposed equivalents have been realized by employing appropriate SRD building blocks with low‐voltage operation capability. As a design example, a 3rd‐order SRD LT filter has been realized and its performance has been evaluated through simulation results. In addition, the most important performance factors of the SRD filter have been compared with those achieved by the SRD filters derived according to the leapfrog, wave, and topological emulation methods. Copyright © 2010 John Wiley & Sons, Ltd.     

Unified theory and state‐variable implementation of critical‐monotonic all‐pole filters

The subject of synthesis of critical‐monotonic low‐pass amplitude characteristics will be revisited. Several new contributions will be given in order to: facilitate the choice of the proper transfer function, to allow cataloguing the transfer functions, to simplify the circuit synthesis procedure, and to perform synthesis in the form of a state‐variable continuous time active filter. Four main criteria for transfer function synthesis will be implemented: maximally flat at the origin, maximum slope at the band‐edge, maximal asymptotic attenuation, and minimal amplitude distortion in the pass‐band. For every criterion, a class of filters will be generated and the coefficients of the transfer functions will be calculated and published for the first time (with one exception). Properties of the classes so generated will be quantitatively compared for the first time. The state‐variable structure will be advised as the one with the simplest synthesis procedure. The procedure will be explained and the design process will be exemplified. Statistical tolerance analysis will be performed for the example solutions in order to complete the information for comparison. Copyright © 2013 John Wiley & Sons, Ltd.     

Current‐mode filters based on current mirror arrays

A technique is proposed for obtaining current‐mode filters based on current mirror arrays that operate as unity gain current amplifiers. These amplifiers by properly driving capacitors realize active lossless integrators which are the basic active elements for the derivation of filters according to the leapfrog method. Due to the fact that both the structure of the amplifiers and the adapted method for filter design are simple, the proposed technique is attractive for filter design and implementation. A design and the implementation of two third‐order low‐pass filters are presented. The array of the amplifiers has been implemented in a 0.8 µm CMOS technology. Copyright © 2007 John Wiley & Sons, Ltd.     

High‐tuning‐range CMOS band‐pass IF filter based on a low‐Q cascaded biquad optimization technique

A design procedure for high‐order continuous‐time intermediate‐frequency band‐pass filters based on the cascade of low‐Q biquadratic cells is presented. The approach is well suited for integrated‐circuit fabrication, as it takes into account the maximum capacitance spread dictated by the available technology and maximum acceptable sensitivity to component variations. A trade‐off between noise and maximum linear range is also met. A novel, wide‐tuning‐range transconductor topology is also described. Based on these results, a 10‐pole band‐pass filter for a code division multiple‐access satellite receiver has been designed and tested. The filter provides tunable center frequency (f₀) from 10 to 70 MHz and exhibits a 28‐MHz bandwidth around f₀ = 70 MHz with more than 39‐dB attenuation at f₀/2 and 2f₀. Third‐order harmonic rejection is higher than 60 dB for a 1‐Vpp 70‐MHz input, and equivalent output noise is lower than 1 mV_rms. The circuit is fabricated in a 0.25‐µm complementary metal oxide semiconductor process, and the core consumes 12 mA from a 2.5‐V supply, offering the best current/pole ratio figure. The die area resulted to be 0.9 × 1.1 mm². Copyright © 2014 John Wiley & Sons, Ltd.