Reconciling software requirements and architectures with intermediate models

Little guidance and few methods are available for the refinement of software requirements into an architecture satisfying those requirements. Part of the challenge stems from the fact that requirements and architectures use different terms and concepts to capture the model elements relevant to each. In this paper we will present CBSP, a lightweight approach intended to provide a systematic way of reconciling requirements and architectures using intermediate models. CBSP leverages a simple set of architectural concepts (components, connectors, overall systems, and their properties) to recast and refine the requirements into an intermediate model facilitating their mapping to architectures. Furthermore, the intermediate CBSP model eases capturing and maintaining arbitrarily complex relationships between requirements and architectural model elements, as well as among CBSP model elements. We have applied CBSP within the context of different requirements and architecture definition techniques. We leverage that experience in this paper to demonstrate the CBSP method and tool support using a large-scale example.     

Weaving the internet together: Imagined communities in newspaper comment threads

Online newspapers (and other spaces) are increasingly seeking to utilise user-generated content alongside professionally developed material. However, this might leave websites increasingly vulnerable to trolls, who work to disrupt online communications in online spaces. Such behaviour can have serious consequences both in peoples online and offline lives, and for the development of coherent online communities. One means of controlling is through the manipulation of the online space to create social norms of polite behaviour through the founding of ‘imagined communities’ online.Approaching the issue from a discursive psychological perspective, this paper draws upon comments published in two online British newspaper comment sections responding to the publication of an academic article on trolling. Imagined communities are shown to arise irrespective of the presence of the virtual infrastructure to support the development of these imagined communities.Key features of imagined communities identified here are: individuation (as opposed to deindividuation); mutual influence between posters; shared history for both the users and the online space; the use of humour to cement social bonds. Analysis also revealed tensions in posters understanding of online and offline behaviours.This research holds implications for understanding online spaces, and the interactions between users within these spaces.     

Prediction of performance and processor requirements in real-timedata flow architectures

Presents a new data flow graph model for describing the real-time execution of iterative control and signal processing algorithms on multiprocessor data flow architectures. Identified by the acronym ATAMM, for Algorithm to Architecture Mapping Model, the model is important because it specifies criteria for a multiprocessor operating system to achieve predictable and reliable performance. Algorithm performance is characterized by execution time and iteration period. For a given data flow graph representation, the model facilitates calculation of greatest lower bounds for these performance measures. When sufficient processors are available, the system executes algorithms with minimum execution time and minimum iteration period, and the number of processors required is calculated. When only limited processors are available or when processors fail, performance is made to degrade gracefully and predictably. The user off-line is able to specify tradeoffs between increasing execution time or increasing iteration period. The approach to achieving predictable performance is to control the injection rate of input data and to modify the data flow graph precedence relations so that a processor is always available to execute an enabled graph node. An implementation of the ATAMM model in a four-processor architecture based on Westinghouse's VHSIC 1750A Instruction Set Processor is described     

A Knowledge-Based Software Engineering Environment for reusable software requirements and architectures

This paper describes a prototype Knowledge-Based Software Engineering Environment used to demonstrate the concepts of reuse of software requirements and software architectures. The prototype environment, which is application-domain independent, is used to support the development of domain models and to generate target system specifications from them. The prototype environment consists of an integrated set of commercial-off-the-shelf software tools and custom developed software tools.The concept of reuse is prevalent at several levels of the domain modeling method and prototype environment. The environment itself is domain-independent thereby supporting the specification of diverse application domain models. The domain modeling method specifies a family of systems rather than a single system; features characterize the variations in functional requirements supported by the family and individual family members are specified by the features they are to support. The knowledge-based approach to target system generation provides the rules for generating target system specifications from the domain model; target system specifications, themselves, may be stored in an object repository for subsequent retrieval and reuse.     

A reference requirements set for public service provision enterprise architectures

Electronic Government (eGov) is a political priority worldwide. One of the core objectives of eGov is the online public services provision (PSP). However, many of eGov PSP systems fail in realizing their objectives. Enterprise Architectures (EA) could contribute to overcome some of the relevant obstacles. The objective of this paper is to derive a reference requirements set for eGov PSP that can be used in EA development. Aiming at capitalizing on existing knowledge, we conduct a systematic literature review on eGov PSP systems requirements. This results in identifying a unified requirements set, i.e. 186 requirements, and stakeholders set, i.e. 19 stakeholders, for eGov PSP systems. Based on these findings, we determine 16 overview use cases demonstrating the basic functionality of such systems. Our findings are modeled using ArchiMate 2.0 notation. The identified requirements set can be used by virtually any public organization providing public services for developing its own EA. As a result, it can lead to the reduction of eGov PSP project failures, the decrease of software development costs and the improvement of its effectiveness and quality. Furthermore, it can be used as a basis to develop a complete reference EA for the eGov PSP domain.     

DRAMA: A framework for domain requirements analysis and modeling architectures in software product lines

One of the benefits of software product line approach is to improve time-to-market. The changes in market needs cause software requirements to be flexible in product lines. Whenever software requirements are changed, software architecture should be evolved to correspond with them. Therefore, domain architecture should be designed based on domain requirements. It is essential that there is traceability between requirements and architecture, and that the structure of architecture is derived from quality requirements. The purpose of this paper is to provide a framework for modeling domain architecture based on domain requirements within product lines. In particular, we focus on the traceable relationship between requirements and architectural structures. Our framework consists of processes, methods, and a supporting tool. It uses four basic concepts, namely, goal based domain requirements analysis, Analytical Hierarchy Process, Matrix technique, and architecture styles. Our approach is illustrated using HIS (Home Integration System) product line. Finally, industrial examples are used to validate DRAMA.     

A controlled experiment to assess the impact of system architectures on new system requirements

While much research attention has been paid to transitioning from requirements to software architectures, relatively little attention has been paid to how new requirements are affected by an existing system architecture. Specifically, no scientific studies have been conducted on the “characteristic” differences between the newly elicited requirements gathered in the presence or absence of an existing software architecture. This paper describes an exploratory controlled study investigating such requirements characteristics. We identify a multitude of characteristics (e.g., end-user focus, technological focus, and importance) that were affected by the presence or absence of an SA, together with the extent of this effect. Furthermore, we identify the specific aspects of the architecture that had an impact on the characteristics. The study results have implications for RE process engineering, post-requirements analysis, requirements engineering tools, traceability management, and future empirical work in RE based on several emergent hypotheses resultant from this study.     

蒂姆·伯纳斯·李:编织万维网

万维网设计师互联网无疑是工业革命及电脑普及之后最大的革命,而奠定这场革命的基石——最重要的技术就是万维网(WWW)。互联网之父有很多位,谁是谁非的争论异常激烈,至今难以定论。但是,万维网的设计师却只有一位,其他任何人都不可能染指,这个人就是蒂姆·伯纳斯·李(Tim Berne     

Dataflow architectures and multithreading

Contrary to initial expectations, implementing dataflow computers has presented a monumental challenge. Now, however, multithreading offers a viable alternative for building hybrid architectures that exploit parallelism. The eventual success of dataflow computers will depend on their programmability. Traditionally, they've been programmed in languages such as Id and SISAL (Streams and Iterations in a Single Assignment Language) that use functional semantics. These languages reveal high levels of concurrency and translate on to dataflow machines and conventional parallel machines via the Threaded Abstract Machine (TAM). However, because their syntax and semantics differ from the imperative counterparts such as Fortran and C, they have been slow to gain acceptance in the programming community. An alternative is to explore the use of established imperative languages to program dataflow machines. However, the difficulty will be analyzing data dependencies and extracting parallelism from source code that contains side effects. Therefore, more research is still needed to develop compilers for conventional languages that can produce parallel code comparable to that of parallel functional languages     

Weaving a computing fabric

As sources of information relevant to a particular domain proliferate, we need a methodology for locating, aggregating, relating, fusing, reconciling, and presenting information to users. Interoperability thus must occur not only among the information, but also among the different software applications that process it. Given the large number of potential sources and applications, interoperability becomes an extremely large problem for which manual solutions are impractical. A combination of software agents and ontologies can supply the necessary methodology for interoperability.     

Quantum holography and neurocomputer architectures

It is generally accepted among neuroscientists that the sensory cortex of the brain is arranged in a layered structure. Based on a unified quantum holographic approach to artificial neural network models implemented with coherent, hybrid optoelectronic, or analog electronic neurocomputer architectures, the present paper establishes a novel identity for the matching polynomials of complete bichromatic graphs which implement the intrinsic connections between neurons of local networks located in neural layers.     

Fifth generation and VLSI architectures

Most Western Governments (USA, Japan, EEC, etc.) have now launched national programmes to develop computer systems for use in the 1990s. These so-called Fifth Generation computers are viewed as “knowledge” processing systems which support the symbolic computation underlying Artificial Intelligence applications. The major driving force in Fifth Generation computer design is to efficiently support very high level programming languages (i.e. VHLL architecture).

Historycally, however, commercial VHLL architectures have been largely unsuccesful. The driving force in computer designs has principally been advances in hardware which at the present time means architectures to exploit very large scale integration (i.e. VLSI architecture).

This paper examines VHLL architectures and VLSI architectures and their probable influences on Fifth Generation computers. Interestingly the major problem for both architecture classes is parallelism; how to orchestrate a single parallel computation so that it can be distributed across an ensemble of processors.     

Cache-only memory architectures

The shared memory concept makes it easier to write parallel programs, but tuning the application to reduce the impact of frequent long latency memory accesses still requires substantial programmer effort. Researchers have proposed using compilers, operating systems, or architectures to improve performance by allocating data close to the processors that use it. The Cache-Only Memory Architecture (COMA) increases the chances of data being available locally because the hardware transparently replicates the data and migrates it to the memory module of the node that is currently accessing it. Each memory module acts as a huge cache memory in which each block has a tag with the address and the state. The authors explain the functionality, architecture, performance, and complexity of COMA systems. They also outline different COMA designs, compare COMA to traditional nonuniform memory access (NUMA) systems, and describe proposed improvements in NUMA systems that target the same performance obstacles as COMA     

Understanding knowledge architectures

The aim of the paper is to present a conceptual framework and a related visual notation for describing architecture of knowledge-based software systems. Knowledge architecture is considered independently of its implementation; abstraction of knowledge system as an interpreted free deductive system is used for analysis of knowledge-based systems. Visual notation for knowledge modules and their connections is introduced and used in the analysis of known knowledge based tools.     

Weaving variability into domain metamodels

Domain-specific modeling languages (DSMLs) are the essence of MDE. A DSML describes the concepts of a particular domain in a metamodel, as well as their relationships. Using a DSML, it is possible to describe a wide range of different models that often share a common base and vary on some parts. On the one hand, some current approaches tend to distinguish the variability language from the DSMLs themselves, implying greater learning curve for DSMLs stakeholders and a significant overhead in product line engineering. On the other hand, approaches integrating variability in DSMLs lack generality and tool support. We argue that aspect-oriented modeling techniques enabling flexible metamodel composition and results obtained by the software product line community to manage and resolve variability form the pillars for a solution for integrating variability into DSMLs. In this article, we consider variability as an independent and generic aspect to be woven into the DSML. In particular, we detail how variability is woven and how to perform product line derivation. We validate our approach through the weaving of variability into two different metamodels: Ecore??widely used for DSML definition??and SmartAdapters, our aspect model weaver. These results emphasize how new abilities of the language can be provided by this means.     

Flag-oriented parallel associative architectures and applications

Flag transformation, a new design concept for parallel associative memory and processor architectures, maps word-oriented data into flag-oriented data. A flag vector represents each word in a set. The flag position corresponds to the value of the transformed word, and all flags in a vector are processed simultaneously to obtain parallel operations. The results of complex search operations performed by modular, cascadable hardware components are also represented by flags and retransformed into word-oriented data. This transformation method allows parallel processing of associative or content-addressable data in uniprocessor architectures, expedites IC design rule checks, and accelerates complex memory tests. It can also be used to develop associative processor architectures and to emulate very fast, modular, cascadable artificial neural networks