2英寸GaAs快速热退火技术研究

为配合２０００门ＧａＡｓ超高速门列及ＧａＡｓ超高速分频器等２英寸ＧａＡｓ工艺技术研究，开展了２英寸ＧａＡｓ快速热退火技术研究，做出了阈值电压为０～０．２Ｖ，跨导大于１００ｍＳ／ｍｍ的Ｅ型ＧａＡｓＭＥＳＦＥＴ和夹断电压为－０．４～－０．６Ｖ，跨导大于１００ｍＳ／ｍｍ的低阈值Ｄ型ＧａＡｓＭＥＳＦＥＴ。     

P埋层技术研究

介绍了在Ｓｉ￣＋注入的ｎ－ＧａＡｓ沟道层下面用Ｂｅ￣＋或Ｍｇ￣＋注入以形成ｐ埋层。采用此方法做出了阈值电压０～０．２Ｖ，跨导大于１００ｍＳ／ｍｍ的Ｅ型ＧａＡｓＭＥＳＦＥＴ，也做出了夹断电压－０．４～－０．６Ｖ、跨导大于１００ｍＳ／ｍｍ的低阈值Ｄ型ＧａＡｓＭＥＳＦＥＴ。     

全离子注入自对准难熔金属氮化物复合栅GaAs MESFET技术研究

本文研究了先进的全离子注入自对准难熔金属氮化物复合栅ＧａＡｓＭＥＳＦＥＴ场效应晶体管的工艺技术．首次使用Ｍｏ／ＺｒＮ作为复合栅的材料，ＡＩＮ薄膜作为器件介质钝化层，制作出了可用于ＧａＡｓ超高速集成电路的场效应晶体管，晶体管的跨导为１６０ｍＳ／ｍｍ，其栅漏反向击穿电压大于５Ｖ．     

InP衬底上的p－沟和n－沟异质结绝缘栅场效应晶体管

在ＩｎＰ衬底上用通常的晶格匹配（ｙ＝０．５３）和晶格失配（ｙ＞０．５３）Ｉｎ＿（０．５３）Ａｌ＿０．４８Ａｓ／Ｉｎ＿ｙＧａ＿（１－ｙ）Ａｓ层结构同时制作ｐ－沟和ｎ－沟曾强型异质结绝缘栅场效应晶体管（ＨＩＧＦＥＴ）。获得１μｍ栅长ｅ型ｐ－沟ＨＩＧＦＥＴ，其阈值电压约０．６６Ｖ，夹断尖锐，栅二极管开启电压０．９Ｖ，室温时非本征跨导＞２０ｍＳ／ｍｍ。相邻的（互补的）ｎ－小沟ＨＩＧＦＥＴ也显示ｅ型工作（阈值Ｖ＿ｔｈ＝０．１６Ｖ），低的漏电，０．９Ｖ栅开启电压和高跨导（ｇｍ＞３２０ｍＳ／ｍｍ）。这是首次报道在ＩｎＰ衬底上同时制作具有适合作互补电路特性的ｐ＿和ｎ－沟ＨＩＧＦＥＴ。     

在1．8GHz频率下功率密度为2．8W／mm的4H－SiCMESFET

本文论述了使用４Ｈ－ＳｉＣ衬底及外延层制作ＭＥＳＦＥＴ的方法，测得了栅长为０．７μｍ、栅宽为３３２μｍ的ＭＥＳＦＥＴ的直流、Ｓ参数和输出功率特性。当Ｖｄｓ＝２５Ｖ时，电流密度约为３００ｍＡ／ｍｍ，最大跨导在３８～４２ｍＳ／ｍｍ之间；当频率为５ＧＨｚ时，该器件的增益为９．３ｄＢ，ｆｍａｘ＝１２．９ＧＨｚ。当Ｖｄｓ＝５４Ｖ时，功率密度为２．８Ｗ／ｍｍ，功率附加效率为１２．７％。     

InP衬底上的p—沟和n—沟异质结绝缘栅场效应晶体管

在ＩｎＰ衬底上用通常用晶格匹配（ｙ＝０．５３）和晶格失配（ｙ〉０．５３）Ｉｎ０．５３Ａｌ０．４６Ａｓ／ＩｎｙＧａ（１－ｙ）Ａｓ层结构同时制作ｐ－沟和ｎ－沟增强型异质结绝缘栅场效应晶体管（ＨＩＧＦＥＴ）。获得１μｍ栅长ｅ型ｐ－沟ＨＩＧＦＥＴ，其阈值电压约０．６６Ｖ，夹断尖锐，栅二极管开启电压０．９Ｖ，室温时非本征跨导〉２０ｍＳ／ｍｍ。相邻的（互补的）ｎ－沟ＨＩＧＦＥＴ也显示ｅ型工作（阈值Ｖｔｈ＝０．     

Ka波段功率PHEMT的设计与研制

报道了Ｋａ 波段功率ＰＨＥＭＴ的设计和研制结果。利用双平面掺杂的ＡｌＧａＡｓ／ＩｎＧａＡｓＰＨＥＭＴ材料,采用０．２ μｍ 的Ｔ型栅及槽型通孔接地技术,研制的功率ＰＨＥＭＴ的初步测试结果为：Ｉｄｓｓ：３６５ ｍ Ａ／ｍ ｍ ;ｇｍ ０：３２０ ｍ Ｓ／ｍ ｍ ;Ｖｐ：－ １．０～－ ２．０ Ｖ。总栅宽为７５０ μｍ 的功率器件在频率为３３ ＧＨｚ时,输出功率大于２８０ ｍ Ｗ,功率密度达到３８０ ｍ Ｗ／ｍ ｍ ,增益大于６ ｄＢ。     

AlGaAs／InGaAs功率PHEMT用异质材料的计算机优化与器件实验结果

借助一新的工艺模拟与异质器件模型用ＣＡＤ软件──ＰＯＳＥＳ（Ｐｏｉｓｓｏｎ－ＳｃｈｒｏｅｄｉｎｇｅｒＥｑｕａｔｉｏｎＳｏｌｖｅｒ），对以ＡｌＧａＡｓ／ＩｎＧａＡｓ异质结为基础的多种功率ＰＨＥＭＴ异质层结构系统（传统、单层与双层平面掺杂）进行了模拟与比较，确定出优化的双平面掺杂ＡｌＧａＡｓ／ＩｎＧａＡｓ功率ＰＨＥＭＴ异质结构参数，并结合器件几何结构参数的设定进行器件直流与微波特性的计算，用于指导材料生长与器件制造。采用常规的ＨＥＭＴ工艺进行ＡｌＧａＡｓ／ＩｎＧａＡｓ功率ＰＨＥＭＴ的实验研制。对栅长０．８μｍ、总栅宽１．６ｍｍ单胞器件的初步测试结果为：ＩＤｓｓ２５０～４５０ｍＡ／ｍｍ；ｇｍ０２５０～３２０ｍＳ／ｍｍ；Ｖｐ－２．０－２．５Ｖ；ＢＶＤＳ５～１２Ｖ。７ＧＨｚ下可获得最大１．６２Ｗ（功率密度１．０Ｗ／ｍｍ）的功率输出；最大功率附加效率（ＰＡＥ）达４７％。     

OEIC光接收机研究的湿法选择腐蚀

试验了用柠檬酸与双氧水系列腐蚀液来实现ＩｎＡｌ（Ｇａ）Ａｓ∶ＩｎＰ和ＩｎＧａＡｓ∶ＩｎＡｌＡｓ的选择腐蚀,达到了较好的效果,且工艺重复性好。同一单片上ＭＳＭ（金属－半导体－金属）光探测器的光响应度可达到０．５Ａ／Ｗ,ＨＥＭＴ器件最大跨导为３０５ｍＳ／ｍｍ,最大饱和电流密度为３５０ｍＡ／ｍｍ。完成了实现ＯＥＩＣ光接收机的关键一步。     

高跨导常断GaN MODFET

成功地制作出常断ＧａＮ基ＭＯＤＦＥＴ（调制掺杂ＦＥＴ）。该器件的栅长和沟道长度分别为３和５μｍ，其非本征跨导高达１２０ｍＳ／ｍｍ，在正栅偏压为３Ｖ时其电流为３００ｍＡ／ｍｍ。该跨导值与先前报道的栅长分别为１和０．２３μｍ、跨导分别为４５和２４ｍＳ／ｍｍ的器件相比，是相当不错的。     

p-channel GaAs SIS (semiconductor-insulator-semiconductor) FET

The first p-channel GaAs SIS (semiconductor-insulator-semiconductor) FET having a p+-GaAs/undoped GaAlAs/undoped GaAs structure is reported. The FET fabricated shows a transconductance of gm=30 mS/mm, a drain conductance of gd=2.5 mS/mm and a threshold voltage of Vth=+0.2 V at 77 K in the dark.     

GaAs MOSFET using InAlP native oxide as gate dielectric

GaAs metal-oxide-semiconductor field-effect transistors (MOSFETs) using wet thermally oxidized InAlP as the gate insulator are reported for the first time. Leakage current measurements show that the 11-nm-thick native oxide grown from an In/sub 0.49/Al/sub 0.51/P layer lattice-matched to GaAs has good insulating properties, with a measured leakage current density of 1.39/spl times/10/sup -7/ mA//spl mu/m/sup 2/ at 1 V bias. GaAs MOSFETs with InAlP native gate oxide have been fabricated with gate lengths from 7 to 2 /spl mu/m. Devices with 2-/spl mu/m-long gates exhibit a peak extrinsic transconductance of 24.2 mS/mm, an intrinsic transconductance of 63.8 mS/mm, a threshold voltage of 0.15 V, and an off-state gate-drain breakdown voltage of 21.2 V. Numerical Poisson's equation solutions provide close agreement with the measured sheet resistance and threshold voltage.     

GaAs基InAlAs/InGaAsMHEMT直流特性研究

报道了用 MBE技术生长的 Ga As基 In Al As/In Ga As改变结构高电子迁移率晶体管 (MHEMT)的制作过程和器件的直流性能。对于栅长为 0 .8μm的器件 ,最大非本征跨导和饱和电流密度分别为 3 5 0 m S/mm和1 90 m A/mm。源漏击穿电压和栅反向击穿电压分别为 4V和 7.5 V。这些直流特性超过了相同的材料和工艺条件下 Ga As基 PHEMT的水平 ,与 In P基 In Al As/In Ga As HEMT的性能相当     

1-μm Enhancement Mode GaAs N-Channel MOSFETs With Transconductance Exceeding 250 mS/mm

In this letter, 1-mum GaAs-based enhancement-mode n-channel devices with channel mobility of 5500 cm²/Vmiddots and g _m exceeding 250 mS/mm have been fabricated. The measured device parameters including threshold voltage V_th, maximum extrinsic transconductance g_m, saturation current I_dss , on-resistance R_on, and gate current are 0.11 V, 254 mS/mm, 380 mA/mm, 4.5 Omegamiddotmm, and < 56 pA for a first wafer and 0.08 V, 229 mS/mm, 443 mA/mm, 4.5 Omegamiddotmm, and < 90 pA for a second wafer, respectively. With an intrinsic transconductance g_mi of 434 mS/mm, GaAs enhancement-mode MOSFETs have reached expected intrinsic device performance     

Quantum-well p-channel AlGaAs/InGaAs/GaAs heterostructureinsulated-gate field-effect transistors with very high transconductance

Quantum-well p-channel pseudomorphic AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with enhanced hole mobility are described. The devices exhibit room-temperature transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, in 0.8-μm-gate devices. Transconductance, transconductance parameter, and maximum drain current as high as 175 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively were obtained in 1-μm p-channel devices at 77 K. From the device data hole field-effect mobilities of 860 cm²/V-s at 300 K and 2815 cm²/V-s at 77 K have been deduced. The gate current causes the transconductance to drop (and even to change sign) at large voltage swings. Further improvement of the device characteristics may be obtained by minimizing the gate current. To this end, a type of device structure called the dipole heterostructure insulated-gate field-effect transistor is proposed     

Self-aligned GaAs gate heterojunction SISFET

A self-aligned GaAs gate heterojunction enhancement-mode SISFET with a layer structure of n+-GaAs/undoped Al0.5Ga0.5As/undoped GaAs is fabricated and shows a high transconductance and a low threshold voltage. The highest transconductance at both room temperature and at 77 K ever reported on a long-channel GaAs gate SISFET, 197 mS/mm and 313 mS/mm, respectively, is obtained.     

n+ -GaAs/undoped GaAlAs/undoped GaAs field-effect transistor

The first self aligned accumulation-mode GaAs MIS-like FET having an n+ -GaAs/undoped GaAlAs/undoped GaAs structure is reported. The FETs fabricated show the threshold voltage of almost zero (V?th = 0.035 V) and very uniform (?Vth = 0.013 V) characteristics, as expected. The transconductance is as high as 170 mS/mm, which is the highest value ever reported on GaAs MIS-like FETs.     

A 630-mS/mm GaAs MESFET with Au/WSiN refractory metal gate

GaAs MESFET's with a gate length as low as 0.2 μm have been successfully fabricated with Au/WSiN refractory metal gate n⁺-self-aligned ion-implantation technology. A very thin channel layer with high carrier concentration was realized with 10-keV ion implantation of Si and rapid thermal annealing. Low-energy implantation of the n⁺-contact regions was examined to reduce substrate leakage current. The 0.2-μm gate-length devices exhibited a maximum transconductance of 630 mS/mm and an intrinsic transconductance of 920 mS/mm at a threshold voltage of -0.14 V     

Modification of transconductance characteristics for ion-implanted GaAs/AlGaAs heterojunction MESFETs

Inverted GaAs/AlGaAs heterostructures grown by MOCVD have been used to fabricate conventional ion-implanted MESFETs. Two types of GaAs/AlGaAs heterojunctions are studied. One type has a compositionally graded AlGaAs layer which provides a built-in field and corresponding quantum well at the heterointerface. The other type has a constant-composition AlGaAs layer. 0.5 mu m gate devices fabricated using the ungraded AlGaAs layer show a maximum extrinsic transconductance G/sub m/ of 280 mS/mm and a small G/sub m/ variation over a gate voltage range of 1.5 V. In comparison, devices fabricated using the graded AlGaAs layer exhibit higher transconductance over all the gate voltages and an enhancement of G/sub m/ up to 420 mS/mm at low gate bias.<>