共查询到19条相似文献,搜索用时 109 毫秒
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为配合2000门GaAs超高速门列及GaAs超高速分频器等2英寸GaAs工艺技术研究,开展了2英寸GaAs快速热退火技术研究,做出了阈值电压为0~0.2V,跨导大于100mS/mm的E型GaAsMESFET和夹断电压为-0.4~-0.6V,跨导大于100mS/mm的低阈值D型GaAsMESFET。 相似文献
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《微纳电子技术》1995,(2)
在InP衬底上用通常的晶格匹配(y=0.53)和晶格失配(y>0.53)In_(0.53)Al_0.48As/In_yGa_(1-y)As层结构同时制作p-沟和n-沟曾强型异质结绝缘栅场效应晶体管(HIGFET)。获得1μm栅长e型p-沟HIGFET,其阈值电压约0.66V,夹断尖锐,栅二极管开启电压0.9V,室温时非本征跨导>20mS/mm。相邻的(互补的)n-小沟HIGFET也显示e型工作(阈值V_th=0.16V),低的漏电,0.9V栅开启电压和高跨导(gm>320mS/mm)。这是首次报道在InP衬底上同时制作具有适合作互补电路特性的p_和n-沟HIGFET。 相似文献
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在InP衬底上用通常用晶格匹配(y=0.53)和晶格失配(y〉0.53)In0.53Al0.46As/InyGa(1-y)As层结构同时制作p-沟和n-沟增强型异质结绝缘栅场效应晶体管(HIGFET)。获得1μm栅长e型p-沟HIGFET,其阈值电压约0.66V,夹断尖锐,栅二极管开启电压0.9V,室温时非本征跨导〉20mS/mm。相邻的(互补的)n-沟HIGFET也显示e型工作(阈值Vth=0. 相似文献
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Ka波段功率PHEMT的设计与研制 总被引:1,自引:1,他引:0
报道了Ka 波段功率PHEMT的设计和研制结果。利用双平面掺杂的AlGaAs/InGaAsPHEMT材料,采用0.2 μm 的T型栅及槽型通孔接地技术,研制的功率PHEMT的初步测试结果为:Idss:365 m A/m m ;gm 0:320 m S/m m ;Vp:- 1.0~- 2.0 V。总栅宽为750 μm 的功率器件在频率为33 GHz时,输出功率大于280 m W,功率密度达到380 m W/m m ,增益大于6 dB。 相似文献
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借助一新的工艺模拟与异质器件模型用CAD软件──POSES(Poisson-SchroedingerEquationSolver),对以AlGaAs/InGaAs异质结为基础的多种功率PHEMT异质层结构系统(传统、单层与双层平面掺杂)进行了模拟与比较,确定出优化的双平面掺杂AlGaAs/InGaAs功率PHEMT异质结构参数,并结合器件几何结构参数的设定进行器件直流与微波特性的计算,用于指导材料生长与器件制造。采用常规的HEMT工艺进行AlGaAs/InGaAs功率PHEMT的实验研制。对栅长0.8μm、总栅宽1.6mm单胞器件的初步测试结果为:IDss250~450mA/mm;gm0250~320mS/mm;Vp-2.0-2.5V;BVDS5~12V。7GHz下可获得最大1.62W(功率密度1.0W/mm)的功率输出;最大功率附加效率(PAE)达47%。 相似文献
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Matsumoto K. Ogura M. Wada T. Yao T. Hayashi Y. Hashizume N. Kato M. Endo T. Inage H. 《Electronics letters》1985,21(13):580-581
The first p-channel GaAs SIS (semiconductor-insulator-semiconductor) FET having a p+-GaAs/undoped GaAlAs/undoped GaAs structure is reported. The FET fabricated shows a transconductance of gm=30 mS/mm, a drain conductance of gd=2.5 mS/mm and a threshold voltage of Vth=+0.2 V at 77 K in the dark. 相似文献
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Li X. Cao Y. Hall D.C. Fay P. Han B. Wibowo A. Pan N. 《Electron Device Letters, IEEE》2004,25(12):772-774
GaAs metal-oxide-semiconductor field-effect transistors (MOSFETs) using wet thermally oxidized InAlP as the gate insulator are reported for the first time. Leakage current measurements show that the 11-nm-thick native oxide grown from an In/sub 0.49/Al/sub 0.51/P layer lattice-matched to GaAs has good insulating properties, with a measured leakage current density of 1.39/spl times/10/sup -7/ mA//spl mu/m/sup 2/ at 1 V bias. GaAs MOSFETs with InAlP native gate oxide have been fabricated with gate lengths from 7 to 2 /spl mu/m. Devices with 2-/spl mu/m-long gates exhibit a peak extrinsic transconductance of 24.2 mS/mm, an intrinsic transconductance of 63.8 mS/mm, a threshold voltage of 0.15 V, and an off-state gate-drain breakdown voltage of 21.2 V. Numerical Poisson's equation solutions provide close agreement with the measured sheet resistance and threshold voltage. 相似文献
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报道了用 MBE技术生长的 Ga As基 In Al As/In Ga As改变结构高电子迁移率晶体管 (MHEMT)的制作过程和器件的直流性能。对于栅长为 0 .8μm的器件 ,最大非本征跨导和饱和电流密度分别为 3 5 0 m S/mm和1 90 m A/mm。源漏击穿电压和栅反向击穿电压分别为 4V和 7.5 V。这些直流特性超过了相同的材料和工艺条件下 Ga As基 PHEMT的水平 ,与 In P基 In Al As/In Ga As HEMT的性能相当 相似文献
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Rajagopalan K. Droopad R. Abrokwah J. Zurcher P. Fejes P. Passlack M. 《Electron Device Letters, IEEE》2007,28(2):100-102
In this letter, 1-mum GaAs-based enhancement-mode n-channel devices with channel mobility of 5500 cm2/Vmiddots and g m exceeding 250 mS/mm have been fabricated. The measured device parameters including threshold voltage Vth, maximum extrinsic transconductance gm, saturation current Idss , on-resistance Ron, and gate current are 0.11 V, 254 mS/mm, 380 mA/mm, 4.5 Omegamiddotmm, and < 56 pA for a first wafer and 0.08 V, 229 mS/mm, 443 mA/mm, 4.5 Omegamiddotmm, and < 90 pA for a second wafer, respectively. With an intrinsic transconductance gmi of 434 mS/mm, GaAs enhancement-mode MOSFETs have reached expected intrinsic device performance 相似文献
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Daniels R.R. Ruden P.P. Shur M. Grider D. Nohava T.E. Arch D.K. 《Electron Device Letters, IEEE》1988,9(7):355-357
Quantum-well p-channel pseudomorphic AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with enhanced hole mobility are described. The devices exhibit room-temperature transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, in 0.8-μm-gate devices. Transconductance, transconductance parameter, and maximum drain current as high as 175 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively were obtained in 1-μm p-channel devices at 77 K. From the device data hole field-effect mobilities of 860 cm2/V-s at 300 K and 2815 cm2/V-s at 77 K have been deduced. The gate current causes the transconductance to drop (and even to change sign) at large voltage swings. Further improvement of the device characteristics may be obtained by minimizing the gate current. To this end, a type of device structure called the dipole heterostructure insulated-gate field-effect transistor is proposed 相似文献
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A self-aligned GaAs gate heterojunction enhancement-mode SISFET with a layer structure of n+-GaAs/undoped Al0.5Ga0.5As/undoped GaAs is fabricated and shows a high transconductance and a low threshold voltage. The highest transconductance at both room temperature and at 77 K ever reported on a long-channel GaAs gate SISFET, 197 mS/mm and 313 mS/mm, respectively, is obtained. 相似文献
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Matsumoto K. Ogura M. Wada T. Hashizume N. Yao T. Hayashi Y. 《Electronics letters》1984,20(11):462-463
The first self aligned accumulation-mode GaAs MIS-like FET having an n+ -GaAs/undoped GaAlAs/undoped GaAs structure is reported. The FETs fabricated show the threshold voltage of almost zero (V?th = 0.035 V) and very uniform (?Vth = 0.013 V) characteristics, as expected. The transconductance is as high as 170 mS/mm, which is the highest value ever reported on GaAs MIS-like FETs. 相似文献
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Onodera K. Tokumitsu M. Sugitani S. Yamane Y. Asai K. 《Electron Device Letters, IEEE》1988,9(8):417-418
GaAs MESFET's with a gate length as low as 0.2 μm have been successfully fabricated with Au/WSiN refractory metal gate n+-self-aligned ion-implantation technology. A very thin channel layer with high carrier concentration was realized with 10-keV ion implantation of Si and rapid thermal annealing. Low-energy implantation of the n+-contact regions was examined to reduce substrate leakage current. The 0.2-μm gate-length devices exhibited a maximum transconductance of 630 mS/mm and an intrinsic transconductance of 920 mS/mm at a threshold voltage of -0.14 V 相似文献
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Inverted GaAs/AlGaAs heterostructures grown by MOCVD have been used to fabricate conventional ion-implanted MESFETs. Two types of GaAs/AlGaAs heterojunctions are studied. One type has a compositionally graded AlGaAs layer which provides a built-in field and corresponding quantum well at the heterointerface. The other type has a constant-composition AlGaAs layer. 0.5 mu m gate devices fabricated using the ungraded AlGaAs layer show a maximum extrinsic transconductance G/sub m/ of 280 mS/mm and a small G/sub m/ variation over a gate voltage range of 1.5 V. In comparison, devices fabricated using the graded AlGaAs layer exhibit higher transconductance over all the gate voltages and an enhancement of G/sub m/ up to 420 mS/mm at low gate bias.<> 相似文献