High-Selectivity Switched-Capacitor Bandpass Filter with Quasi-Continuous Quality Factor Tunability

This paper describes the design and implementation of a second-order switched-capacitor (SC) bandpass (BP) filter with very wide quality factor (Q) programmability range. The filter selectivity is digitally programmed by varying the effective sampling frequency of an SC branch, without modifying any capacitor value. The proposed approach allows a quasi-continuous Q-factor tunability avoiding, in principle, the inherent quantization error associated to any traditional programming technique. Automatic Q-factor tuning is performed by using a scheme based on an amplitude-locking loop approach. Experimental results obtained from a 0.8-m CMOS integrated prototype demonstrate the versatility of the proposed technique for high-Q SC BP filters.     

A 65 mW, 0.4–2.3 GHz Bandpass Filter for Satellite Receivers

A monolithic tunable bandpass filter for satellite receiver front-ends is presented. The center frequency of the bandpass filter can be tuned from 0.4 GHz to 2.3 GHz. The filter is constructed using four transconductor-C poly-phase filter sections and has a 50 dB variable gain range. At 20 dB attenuation and at 30 dB gain the measured 1 dB compression point is –21 dBm and –56 dBm, respectively. Measured input IP3 is –12 dBm. The noise figure is 15 dB at maximum gain. An on-chip I/Q oscillator tracks the center frequency and enables automatic tuning. The bandpass filter dissipates 65 mW with 5 Volt supply voltage and occupies 0.16 mm² chip area. The filter is realized in a standard 11 GHz f _t bipolar technology.     

Wide Dynamic Range High Output Impedance Current-mode Multifunction Filters with Dual-output Current Conveyors

This paper reports five new single-input multiple-output current-mode multifunction filter circuits which can simultaneously realise three basic filter functions all at high impedance outputs. The circuits employ only the same type of active elements, grounded passive components, andno element matching conditions are imposed. The filters permit orthogonal adjustment of the quality factor Q and angular resonant frequency ω₀. The active/passive sensitivities are shown to be low.     

Voltage/Current-Mode Universal Filter Using FTFN and CFA

A novel configuration for realizing voltage/current-mode (VM/CM) universal filter using a single four terminal floating nullor (FTFN), a single current feedback amplifier (CFA), two capacitors and three resistors is presented. The VM configuration has three inputs and a single output and implements all the five generic filtering functions through the selection of inputs. This topology enjoys cascadability and does not require any additional active element for facilitating the filter realizations. The same circuit in current-mode has a single input and four outputs and realizes LP, HP and two BP responses simultaneously from which AP and Notch can also be realized. This topology uses grounded resistors and capacitors which are ideal for monolithic integration. Both the topologies enjoy orthogonal control of natural frequency (ω₀) and quality factor (Q) by the grounded resistors. The topologies enjoy low active and passive sensitivity figures. Experimental and PSPICE simulation results are also included.     

Improved Biquad Structures Using Double-Output Transconductance Blocks for Tunable Continuous-Time Filters

A family of g_m-C biquad structures is derived. These biquads require only a pair of grounded capacitors and three transconductors. It is shown that a pair of complex zeros can be realized simply by replicating the output stage of the transconductance block, thereby constructing a second output current that is proportional to the original output current. Although these biquad structures are very compact, they allow independent programming of the filter's center frequency andQ . IC simulations and measurements are presented using a fifth-order tunable filter as an example.     

Low sensitivity multifunction active circuits using CFA-based supercapacitor

Some new current feedback amplifier (CFA)-based active Resistance–Capacitance (RC) circuits are presented for the realization of an ideal grounded supercapacitor (Y(s)?=?s ² D) type Frequency Dependent Negative Resistance (FDNR). The D-element is then resonated with additional RC sections to derive multifilter function circuits. The filter function have been tested for continuous resonant frequency (f ₀) tunability in a range of 30?KHz?≤?f ₀?≤?300?KHz with high quality (1?Q?相似文献   

A Switched Opamp-Based Bandpass Filter: Design and Implementation in a 0.35 μm CMOS Technology

A fully differential SC bandpass filter (central frequency, 58 kHz; Q = 15; and voltage gain, 8) based on the switched-opamp approach is designed and implemented in this work. The filter operates from a single 1 V supply voltage and is realized in a 0.35 m CMOS technology. It has been characterized with a sampling frequency of 1 MHz and its power consumption is about 230 W. As a main internal filter component, an appropiate switched opamp was also designed. Its common-mode feedback circuit was implemented by using an error amplifier and sampling of the output common-mode voltage is carried out by applying a DC offset to level shift the common-mode sample. It provides an accurate common-mode output for a wide temperature and supply voltage ranges.     

New topology for implementing bandpass,bandstop and allpass filters with CFAs

In this brief, a new filter topology based on current feedback amplifiers is presented and compared with its operational amplifier counterpart. The circuits arising from the new topology have the important advantage that access to the Z node of the current feedback amplifier is not required, as is the case with many existing current feedback amplifier filter circuits. The operation and requirements for each of the filters are described. Theoretical results and circuit limitations are discussed and verified with experimental results. In one experiment a bandpass filter with a calculated Q and centre frequency of 20 and 158.53 kHz, respectively was built using the OPA2607 dual CFAs IC. Measured results yielded a Q of 20.153 at a centre frequency of 148.62 kHz showing close agreement with theory.     

A Practical Parallel Architecture for Stacks Filters

Stack filters belong to the class of non-linear filters and include the well-known median filter, weighted median filters, order statistic filters and weighted order statistic filters. Any stack filter can be implemented by using the parallel threshold decomposition architecture which allows implementing their non-linear processing by means of a collection of identical binary filters (Boolean logic circuits). Although it is conceptually simple and useful to study the filter properties, this architecture is not practical for direct hardware implementation because as many as (M – 1) binary filters are required for a M-valued input signal and M is large in many applications.In this paper we introduce a new parallel architecture for stack filter implementations. The complexity is now proportional to the window width L of the filter, instead of to M. In most applications L is much smaller than M which translates into efficient hardware implementations. The attractive characteristic of ease of design exhibited by the threshold decomposition architecture is kept. In fact, for a given stack filter both in the conventional implementation and in the proposed one, the same binary filter is required. The key concept supporting the new architecture is a modified decomposition scheme which generates L binary signals for a multi-valued input. As an application example, a complex WOS filter is designed and prototyped in an FPGA.     

A Low-Voltage Low-Power Rail-to-Rail Constant g m Transconductance Amplifier

In this paper, a low-voltage low-power rail-to-rail constant g _m transconductance amplifier (TA) is introduced. The supply voltages are set at (±1.5 V). The circuit depends on selecting the maximum transconductance (g _m ) to achieve an almost constant g _m over the entire common-mode (CM) range. The circuit is then used to realize a second-order 4 MHz lowpass filter consuming 530 W, and a fifth-order 450 kHz lowpass elliptic filter consuming 2.3 mW. Both filters can be integrated on silicon without any external connections.     

Integrated CMOS GSM baseband channel selecting filters realized using switched capacitor finite impulse response technique

A problem of the design and optimization of analog channel selecting filters, which are needed in wireless communication systems, is considered and evaluated in this paper on an example of the baseband GSM (global system for mobile telephony) channel filter. Two versions of this filter, both designed by the authors using switched-capacitor finite impulse response (SC FIR) technique, are presented and compared to each other as well as to other concurrent designs. In order to fully and plausibly compare the both filter versions (the newer and the elder one), the authors decided to design and fabricate both filters using the same technology, i.e., the technology of the elder filter version, which is the two metal, two poly CYE CMOS 0.8 μm process. The conclusions, which have been drawn, are, however, general and to a large extent technology independent.Although both presented filters are switched-capacitor (SC) finite impulse response (FIR) systems [Dąbrowski A, Cetnarowicz D, Długosz R, Pawłowski P. Design and optimisation of integrated CMOS FIR SC channel filter for a GSM Receiver, European Conference on Circuit Theory and Design, Helsinki, 28–31 August 2001. p I.265; Długosz R, Dąbrowski A, Pawłowski P. Design and measurement results of the GSM SC FIR channel filter realized in CMOS 0.8 μm technology. In: 9th international conference mixed design of integrated circuits and systems, 2002. p. 607–12] they essentially differ to each other as they are based on two quite different SC FIR delay line structures. In the first filter version Gillingham delay elements [Gillingham P. Stray-free switched-capacitor unit delay circuit. Electron lett 1984;20(7):308–10] are used, while in the second version even and odd delay elements [Dąbrowski A. Multirate and multiphase switched-capacitors circuits, London: Chapman & Hall; 1997; Dąbrowski A, Menzi U, Moschytz GS. Design of switched-capacitor FIR filters with application to a low-power MFSK receiver. IEE Proceedings-G 1992;139(4):450] are alternately connected to form the delay line. In this way an interesting comparison of these two SC delay line concepts has been possible.It should also be stressed that the frequency responses of both presented filters have been designed using the same technique, i.e., the Kaiser window of order N = 31. The upper frequency is in both cases equal to 500 kHz and the frequency of the controlling clock generator is equal to 1 MHz.The filter with Gillingham delay elements dissipates 30 mW with the 3 V supply voltage and occupies 2.2 mm². On the contrary, the even–odd SC FIR filter dissipates 18 mW only with the 3 V supply voltage and occupies 2.4 mm². Moreover, the newer filter version has the stopband attenuation greater by about 10 dB than the previous version.     

Efficient linear-phase FIR, maximally flat error approximations for the amplitude response |1/ω r |,r,r=1, 2, 3,..., and a versatile realization

In this paper, designs of linear-phase finite impulse response (FIR) filters approximating the ideal frequency responseH (,r) |1/ ^r r=1, 2, 3,..., by using maximally flat error criteria have been proposed. Exact weights required for the realizations have been derived and are shown to be independent of the filter orderN. The suggested designs are particularly suitable for operation in the midband frequency range of 0.10–0.90 radians.     

Current‐Mode Electronically Tunable Universal Filter Using Only Plus‐Type Current Controlled Conveyors and Grounded Capacitors

In this paper we present a new current‐mode electronically tunable universal filter using only plus‐type current controlled conveyors (CCCII+s) and grounded capacitors. The proposed circuit can simultaneously realize lowpass, bandpass, and highpass filter functions—all at high impedance outputs. The realization of a notch response does not require additional active elements. The circuit enjoys an independent current control of parameters ω₀ and ω₀ / Q. No element matching conditions are imposed. Both its active and passive sensitivities are low.     

Universal voltage-mode filter using only plus-type DDCCs

Despite the extensive literature on current conveyor-based voltage-mode universal biquads with single input and multiple outputs, no filter circuit has been reported to simultaneously achieve all of the advantageous features: (i) employment of only two differential difference current conveyor (DDCC), (ii) employment only two grounded capacitors, (iii) employment only three resistors, (iv) simultaneously realize voltage-mode low-pass, band-pass, high-pass, notch and all-pass filter signals from the five output terminals, respectively, (v) orthogonal control of ω _o and Q, (vi) low input impedance and can be cascadable (vii) no need to employ inverting type input signals, and (viii) no need to impose component choice except realizing the all-pass filter signal.     

Series/Parallel Time-Multiplexed Switched-Capacitor Filters with Programmability Based on Non-Uniform Sampling

This paper presents an improved scheme for programmable time-multiplexed (TM) switched-capacitor (SC) filters. The proposed approach uses a novel sampling technique, which eliminates the need for resolution/area tradeoffs. The programmability of each processing channel is based on the use of non-uniform clock signals with noise-shaped sampling energy. No capacitor values are modified for programming frequency response parameters and, hence, the performance of the TM SC filter is not sacrificed for programmability. Such a sampling technique not only leads to an accurate frequency response control, but also allows the design procedures and the resulting SC circuit implementation to be simplified. A test-chip including a programmable second-order TM SC filter with a multiplexing order of four, which operates in series or in parallel mode, was fabricated in conventional CMOS technology. Measurement results demonstrate the effectiveness and versatility of the proposed technique.     

Design of selective CIC filter functions

The aim of this letter is to provide graphs which can be used to design a novel class of selective CIC (Cascaded-Integrator–Comb) filters given insertion loss specification. The goal is to choose the free integer filter parameters such that the filter function yields a desired frequency response. To determine the filter parameters needed to satisfy the desired specifications, one can use the graphs of normalized passband and stopband cut-off frequencies versus filter order N. Two graphs, one for maximum attenuation in the passband and one for minimum attenuation in the stopband, are given here. Achieved improvement of performances of the novel class of CIC filter functions over the classical CIC filters is also given. In case of N = 7, the novel class of CIC filter functions gives improvements of 27.68 dB, 47.29 dB and 66.53 dB for different values 1, 2 and 3 of free parameter L, respectively.     

Delay-Range-Dependent L 2–L ∞ Filtering for Stochastic Systems with Time-Varying Interval Delay

This paper focuses on the problem of delay-range-dependent L ₂–L _∞ filter design for stochastic systems with time-varying delay. The time delay varies in an interval. A delay-range-dependent sufficient condition is formulated in terms of linear matrix inequalities (LMIs), which guarantees the existence of a linear filter. The proposed filter ensures that the filtering error system is stochastically asymptotically stable and that its L ₂–L _∞ performance satisfies a prescribed level. The corresponding filter design is cast into a convex optimization problem which can be efficiently handled by using standard numerical algorithms. Finally, a numerical example is given to illustrate the effectiveness of the proposed method. This work is partially supported by the Natural Science Foundation of China (60674055, 60774047), and the Taishan Scholar Programme of Shandong Province.     

A New CMOS Programmable Balanced Output Transconductor and Application to a Mixed Mode Universal Filter Suitable for VLSI

A new CMOS programmable balanced output transconductor (BOTA) is introduced. The BOTA is a useful block for continuous-time analog signal processing. A new CMOS realization based on MOS transistors operating in the saturation region is given. Application of the BOTA in realizing a mixed mode universal filter using six BOTAs and two grounded capacitors is also introduced. The filter's gain can be adjusted simply by varying the amplitude of a transconductance through its control voltage without affecting ₀ and Q of the filter. Also, the Q of the filter can be adjusted by a single transconductor independent of ₀. PSpice simulation results for the BOTA circuit and for the universal filter are also given.     

NOVEL SECOND-ORDER CURRENT MODE FILTERS USING CCIIs

Two new current mode active-RC networks using the second generation current conveyer (CCII) devices are presented. The circuits provide high-Q bandpass (BP)/lowpass(LP) filter characteristics; the highpass(HP) response may also be obtained with suitable design. Current mode sine wave signal generation (Q→α) is possible by tuning a grounded resistor. With non-ideal CCIIs the design equations are slightly altered owing to CCII port current and voltage tracking errors (Ei,v).     

对寄生电容不灵敏的开关电容有源滤波器的设计

采用单位缓冲器设计对寄生电容不灵敏的开关电容(SC)频率相关负电阻(FDNR)元件，利用该元件对椭圆函数式LC低通滤波器进行SC模拟。为了获得电容最佳值，提出了一种简单的最优化方法；并采用寄生电阻预畸变与SC负电阻相结合的办法，设计的SC滤波器对寄生电容不灵敏，且电路简单。在电子工作平台(EWB)上进行五阶椭圆低通SC-FDNR滤波器仿真，测量数据最大相对误差为0．948％，仿真结果表明该方法实用可行，效果明显。