An ion-implanted diamond metal-insulator-semiconductor field-effecttransistor

A p-type conducting layer has been formed in a substrate of semi-insulating natural diamond (type IIa) by boron implantation. Silicon dioxide was deposited over this layer to make an insulated-gate field-effect transistor. Saturation and pinch-off were both observed at room temperature. The transconductance was 3.9 μS-mm^-1 and the output conductance was 60 nS-mm^-1. This is the first reported use of ion implantation to successfully fabricate a field-effect device in diamond     

不同偏置条件下PMOSFETs的剂量率效应研究

研究了不同剂量率、不同偏置条件下,PMOSFETs的辐照响应特性;并对高剂量率辐照后的器件进行了与低剂量率辐照等时的室温退火。结果表明,随着剂量率的降低,PMOSFETs阈值电压的漂移更加明显;不同偏置条件、不同剂量率范围内表现出TDE和ELDRS两种不同的剂量率效应。利用亚阈分离技术对影响阈值电压漂移的氧化物陷阱电荷和界面态进行了详细的机理分析,认为ELDRS效应的产生是由界面态密度的差异导致的。     

High-performance GaAs metal insulator semiconductor transistor

Proton bombardment techniques have been used to fabricate GaAs metal insulator semiconductor transistors (MIST's) with good thermal stability and radiation hardened performance. Highly stable insulator layers have been obtained using both single-species (H1+) and multiple-species (H1+, H2+, O+, and OH+) beams. The device processing is compatible with fabrication of GaAs FET devices in monolithic circuits.     

Design and modeling of a new silicon-based tunneling field-effecttransistor

As the effective channel length of conventional MOSFET's approaches the sub-0.1 μm regime, further downscaling of integrated circuits may require new transistor structures. In this paper we propose a new tunneling field-effect transistor. According to its new operating principle, the tunneling current between two terminals is strongly modulated by the bias applied to the third terminal. Different from the planar structure of MOSFET's, the three terminals of this transistor are vertically stacked up. This new tunneling transistor is free of the short-channel effects, and its lateral dimension can in principle be scaled down to nanometers. The design of new transistor structure, calculated results and scaling properties are discussed     

Improving solution-processed n-type organic field-effect transistors by transfer-printed metal/semiconductor and semiconductor/semiconductor heterojunctions

Solution-processed n-type organic field effect transistors (OFETs) are in need of proper metal contact for improving injection and mobility, as well as balanced hole mobility for building logic circuit units. We address the two distinct problems by a simple technique of transfer-printing. Transfer-printed Au contacts on a terrylene-based semiconductor (TDI) significantly reduced the inverse subthreshold slope by 5.6 V/dec and enhanced the linear mobility by over 5 times compared to evaporated Au contacts. Hence, devices with a high-work-function metal (Au) are comparable with those with low-work-function metals (Al and Ca), indicating a fundamental advantage of transfer-printed electrodes in electron injection. We also transfer-printed a poly(3-hexylthiophene) (P3HT) layer onto TDI to construct a double-channel ambipolar transistor by a solution process for the first time. The transistor exhibits balanced hole and electron mobility (3.0 × 10⁻³ and 2.8 × 10⁻³ cm² V⁻¹ s⁻¹) even in a coplanar structure with symmetric Au electrodes. The technique is especially useful for reaching intrinsic mobility of new materials, and enables significant enlargement of the material tanks for solution-processed functional heterojunction OFETs.     

超声化学法合成金属硫族半导体纳米材料

随着纳米科技的发展,合成纳米材料的新方法层出不穷。超声化学方法合成纳米材料近年来得到了飞速的发展,引起了科学界越来越多的关注。本文从超声化学的基本原理和特点出发,简要介绍了近年来超声化学法在水、有机溶剂及微乳液中合成金属硫族半导体纳米材料和复合金属纳米材料的进展。在水溶液中超声化学制备金属硫族半导体纳米材料方便、简单,而在有机溶剂和微乳液中制备,能更好地控制粒子的尺寸和形貌。     

Performance and optimization of dipole heterostructure field-effecttransistor

Dipole heterostructure field effect transistors (dipole HFETs) have been fabricated in AlGaAs/GaAs. Doped p⁺⁺ and n⁺⁺ planes in the charge control AlGaAs layer form a dipole that creates a considerably larger barrier between the channel and the gate than in conventional heterostructure FETs. This leads to a sharp reduction of the forward-biased gate current in enhancement-mode n-channel devices, a much broader transconductance peak, and a higher maximum drain current in enhancement-mode devices. The authors also outline an analytical theory, supported by numerical modeling, for the optimization of device structures for both enhancement- and depletion-mode devices. This is supported by experimental results obtained from enhancement devices     

Gate-self-aligned p-channel germanium MISFETs

The authors have fabricated the first gate-self-aligned germanium MISFETs and have obtained record transconductance for germanium FETs. The devices fabricated are p-channel, inversion-mode germanium MISFETs. A germanium-oxynitride gate dielectric is used and aluminum gates, serve as the mask for self-aligned source and drain implants. A maximum room-temperature transconductance of 104 mS/mm was measured for a 0.6-μm gate length. A hole inversion channel mobility of 640 cm² /V-s was calculated using transconductance and capacitance data from long-channel devices. This large hole channel mobility suggests that germanium may be an attractive candidate for CMOS technology     

Hot rocks [single crystal diamond for power semiconductor devices]

This article describes the production, using chemical vapour deposition, of single crystal synthetic diamonds. It then discusses their practical use in semiconductor devices. Diamond is a wide band gap semiconductor with high breakdown voltage, high saturation velocity, high carrier mobility, and high thermal conductivity. In addition it is extremely radiation hard. Diamond semiconductors are ideal for high-power, high-frequency electronic applications.     

Thermal characteristics of semiconductor laser phase-locked arrays with diamond film heatsink

The equation of heat conduction in the heatsink consisting of an artificial diamond film and a copper bulk is solved by the image method. The influence of the diamond thickness on the temperature rise and distribution is shown.<>     

Integrated multi-biosensors based on an ion-sensitive field-effecttransistor using photolithographic techniques

Two kinds of multifunctional biosensors, one sensitive to glucose and triolein and the other to glucose and urea, have been constructed using semiconductor fabrication techniques. An integrated ISFET (ion-sensitive field-effect transistor) with three hydrogen-ion-sensitive FET elements on one chip was used as a transducer for the biosensor. A photolithographic technique with a water-soluble photocrosslinkable polymer made possible the deposition of patterned enzyme membranes (glucose oxidase, lipase, and urease membranes) and bovine serum albumin membrane around each gate surface of ISFET elements. The multibiosensor for measuring glucose and triolein concentrations determined both glucose concentrations up to 5 mM and triolein concentrations up to 3 mM simultaneously. The biosensor for glucose and urea has a detection range of 0.03 to 3 mM for glucose and 0.1 to 20 mM for urea. Some multibiosensors showed a cross-sensitivity problem due to enzyme contamination. An improved membrane fabrication method to prevent the enzyme contamination is described     

The effect of stress on metal semiconductor junctions

The effects of stress on metal-semiconductor junctions have been investigated assuming that the transport mechanisms operative are thermionic emission, thermionic-field emission, or field emission. For generality the semiconductor has been considered to have a many valley conduction band structure. The analysis is developed in such a manner as to allow the calculation of the change in the built-in potential caused by the presence of a stress field from experimental data for several field configurations. Thus, it permits appraisal of the actual electron transfer process causing the stress-sensitivity in a given junction.For a material with a single valley structure in the conduction band, it is shown that the barrier height change is equal to the change in bias, at constant current, for any uniform stress field. For a loading applied normally to a portion of the contact an expression is also obtained for the barrier height change. For materials with a many valley structure, the same results are obtained for certain crystallographic directions; whereas, for others, repopulation effects are present. Their importance and magnitude are discussed.     

Thin-phase epitaxy for good semiconductor metal ohmic contacts

Ohmic contacts of superior quality are produced by treating the normal alloying process as an epitaxy process, where Ga and As are supplied separately by evaporation together with the normal contact metals and by overpressure, respectively. New device fabrication methods based on this new scheme are the production of shallow p-n junctions, shallow heterojunctions, thin ternary semiconductor layers with different bandgaps from that of the bulk, and multiple structures. By using photoresist, complete regrowth patterns as used for IC's should be possible. The types of devices where these developments should be of interest are solar cells, light-emitting IC patterns, even with different light colors on one chip, Gunn devices, BARITT's, MESFET's, Schottky CCD's, heterojunction bipolar transistors, etc.     

Theory of noise in metal oxide semiconductor devices

Noise in MOS diodes arises from different sources: fluctuations in occupation of surface states, shot noise, and leakage noise. Fluctuations in the occupation of surface states produce changes in the surface space-charge distribution which in turn produce currents. Shot noise is produced by fluctuations of the individual drift and diffusion flows toward the surface. Leakage noise is associated with the small flow of current through the oxide. In MOS triodes these three mechanisms give rise to gate noise and thus input noise in the amplifier, but the first one produces an important indirect effect. Fluctuations in the occupation of interface states result in modulation of the channel conductance. At low frequencies this modulation is the dominant effect, giving rise to a noise power spectrum which resembles1/fnoise. At high frequencies, where only thermal noise in the channel and input noise are of importance, MOS triodes are similar to junction field effect devices from the noise point of view.     

Analysis of noise up-conversion in microwave field-effecttransistor oscillators

The conversion process of the low frequency noise into phase noise in field-effect transistors (FET) oscillators is investigated. First, an evaluation of the baseband noise contribution to the oscillator phase noise is provided from the analysis of the baseband noise and the frequency noise spectra. A distinction is made within the different components of the low frequency noise contributions to close-in carrier phase noise. Next, the frequency noise of the oscillator circuit is analyzed in terms of the FET's low frequency noise multiplied by the oscillator's pushing factor. Though this product usually provides a good evaluation of the phase noise, experimental results presented here show the inaccuracy of this method at particular gate bias voltages where the pushing factor decreases to zero. To account for these observations, a new nonlinear FET model involving at least two noise sources distributed along the channel is proposed     

CVD金刚石热沉封装高功率半导体激光器的热特性

本文以自支撑CVD金刚石膜作为半导体激光器线阵的封装热沉,从而改进其热特性。首先,以电子辅助化学气相沉积(EACVD)制备自支撑金刚石膜。在沉积工艺中,提出了优化O_2流量刻蚀非金刚石相,使金刚石膜品质得到改进,从而提高其导热率。然后,测试了基于不同氧流量下制备金刚石热沉封装的半导体激光器线阵的电光特性,并对封装器件的热特性进行了分析。结果表明:通入O_2流量为每分钟5 sccm时,制备的金刚石热沉导热率可达1 812.3 WK^-1m^-1。O_2流量5 sccm制备金刚石热沉的封装器件的斜率效率为1.30 W/A,电光转换效率最大值可达60.6%。在连续波30 A时,该封装器件的光谱红移波长为2.02 nm,器件工作温度降低4.9 K。器件的传热路径热阻降低28.4%,表现出优异的可靠性。     

IGFET circuit performance-n-channel versus p-channel

The n-channel insulated-gate field-effect transistor offers a factor of 2 to 3.4 mobility advantage (depending on crystal orientation and substrate doping level) over p-channel devices. In addition, several advantages result from the fact that the work function difference between an aluminum gate and the silicon substrate is about -0.8 volt for a p substrate compared with about zero for an n substrate. In particular, this results in a low threshold voltage that allows the use of a substrate bias to adjust the threshold voltage over a useful design range resulting in an added flexibility in choice of thresholds and substrate doping, a reduction in the effect of source-substrate bias on device threshold, decreased junction capacitance, and larger parasitic thick-oxide thresholds for a given insulator thickness. The speed, power, and density advantages of the n-channel device are illustrated for logic and memory circuits using representative n- and p-channel device designs.     

Correction of eccentricity of metal bonded diamond grinding wheels

Metal bonded diamond grinding wheels are often supplied with the central bore eccentric relative to the periphery. Trueing of these wheels and high speed miniature diamond cutters create problems in the manufacture of precision artefacts, particularly in the research environment. In many cases it is uneconomic or impractical to use the electrolytic in-process dressing or electrochemical dressing of the wheels. The paper proposes adaptations of traditional dressing methods.     

Analytical model for p-channel MOSFETs

An analytical model for p-channel MOSFETs is described. The model is based on the unified charge control model (UCCM), which describes both the subthreshold and the above-threshold regimes using one continuous equation. Also derived and incorporated into the model is an equation for the dependence of the hole mobility on gate-to-source voltage and threshold voltage. The model makes it possible to propose a simple and unambiguous characterization procedure for extracting device parameters. Detailed measurements of capacitance-voltage and current-voltage characteristics of p-channel MOSFETs with different gate lengths are reported. Results are in excellent agreement with experimental results. The model is ideally suited for applications in computer-aided design software for simulation of both digital and analog circuits, and for automated parameter extraction     

Anisotype-gate self-aligned p-channel heterostructure field-effecttransistors

A new self-aligned p-channel HFET structure was evaluated for application to complementary HFET circuits. The AlGaAs/InGaAs HFET structure uses an anisotype graded n⁺ InGaAs/GaAs semiconductor gate to enhance the barrier height of the FET, resulting in a significant reduction in gate leakage current at low voltages. With AlGaAs composition of x=0.3, and a thin AlAs spacer of 60 Å, leakage current was reduced by a factor of about 1000 at gate voltage of 1 V, when compared to AlGaAs/InGaAs HIGFET of aluminum content x=0.75. The anisotype PFET maintains high device transconductance, typically 50 mS/mm for 1.3×10 μm PFETs, high reverse breakdown voltages 9-10 V, and low capacitance. Microwave S -parameter characterization resulted in F_t of 5 GHz for a 1×50 μm PFET