雪崩热电子注入对快速热氮化的SiO_xN_y膜陷阱的影响

本文研究了雪崩热电子注入对快速热氮化的SiO_zN_y膜体内电子陷阱和界面陷阱的影响.结果表明:快速热氮化的SiO_xN_y膜存在着不同类型的陷阱,其陷阱密度悬殊很大.雪崩热电子注入过程中在Si/SiO_xN_y界面上产生两类性质不同的快界面态陷阱.同时还给出这两种陷阱在禁带中的能级位置,界面态密度随雪崩注入的变化关系.文中并对实验结果进行讨论与分析.     

PECVD形成纳米级薄膜界面陷阱特性的雪崩热电子注入研究

采用雪崩热电子注入技术研究了纳米级SiOxNy薄膜界面陷阱特性.证实了PECVD SiOxNy薄膜中界面陷阱来源于悬挂键的物理模型.观察到该纳米膜内存在着受主型电子陷阱,随着注入的增长,界面上产生的这种陷阱将起主导作用.发现到界面陷阱密度随雪崩热电子注入剂量增加而增大,禁带上半部增大得较下半部显著.指出了雪崩注入过程中在SiOxNy界面上产生两种性质不同的电子陷阱,并给出它们在禁带中的位置与密度大小关系.揭示出PECVD法形成的SiOxNy纳米膜与快速热氮化制备的这种薄膜中、氮氧含量不同、界面陷阱特性变化关系不一样,并从形成薄膜氮化机制上予以合理的物理解析.给出了PECVD形成纳米级薄膜的优化工艺条件.     

MIS结构中快速热氮化的SiO_xN_y膜电荷特性

本文报导了采用光I—V法研究MIS结构中新型的快速热氮化的SiO_xN_y膜电荷特性。给出这种介质膜和传统的SiO_2膜的体电荷面密度及其分布重心位置等实验结果。文中还用“改进”的雪崩热电子注入装置研究MIS结构中快速热氮化的SiO_xN_y膜的电荷特性。结果指出:快速热氮化后的再氧化工艺可有效地降低SiO_xN_y膜的体电子陷阱和界面陷阱密度;雪崩注入到一定程度后平带电压漂移出现“回转效应”,随后又前漂,弱呈现“N”形。本文就此提出了物理解释。结果还给出:界面电荷陷阱密度在禁带中分布随雪崩注入剂量(时间)的变化关系。文中还对实验结果进行了分析讨论。     

PECVD形成纳米级薄膜界面陷阱的物理模型

采用雪崩热电子注入技术研究了纳米级富氮 Si Ox Ny 薄膜界面陷阱的物理模型。证实了 PECVDSi Ox Ny 薄膜中界面陷阱来源于悬挂键的物理模型。观察到该纳米膜内存在着受主型电子陷阱 ,随着注入的增长 ,界面上产生的这种陷阱将起主导作用。发现到 Dit随雪崩热电子注入剂量增加而增大 ,禁带上半部 Dit的增大较下半部显著。指出了雪崩注入过程中在 Si Ox Ny 界面上产生两种性质不同的电子陷阱 ,并给出它们能级位置及密度大小关系。揭示出 PECVD法形成的这种纳米膜与快速热氮化制备的薄膜中、氮氧含量不同、界面陷阱特性变化不一样 ,并从薄膜氮化机制予以物理解析。给出了 PECVD形成纳米级薄膜的优化工艺条件 ,该工艺条件制成膜的界面陷阱及其它物理电学特性都比较好     

快速热氮化的SiO_xN_Y膜界面特性的DLTS研究

用深能级瞬态谱技术研究了快速热氮化SiO_xN_y膜界面态密度及界面态俘获截面特性,分析了Si/SiO_xN_y界面的DLTS理论,结果表明,快速热氮化SiO_xN_y膜的界面态密度随禁带中能量呈现“U”形分布,该种薄膜界面态俘获截面在禁带中的能量分布近似呈现指数规律,且禁带中央附近的界面态俘获截面比价带顶附近的俘获截面大得多,影响微电子器件电学特性的界面态主要仍是禁带中央附近的界面能态。结果还给出了DLTS技术与雪崩热电子注入法测试SiO_xN_y膜界面态密度能量分布的比较,得到两种不同方法的研究结果基本一致。文中并对实验结果进行了分析与讨论。     

雪崩热电子注入研究富氮SiO_xN_y纳米级薄膜的陷阱特性

采用雪崩热电子注入技术研究了富氮 Si Ox Ny 纳米级薄膜的陷阱特性。观察到该薄膜存在着受主型电子陷阱 ,随着注入的增长、界面上产生的这种陷阱将起主导作用 ,其密度大过施主型界面电子陷阱。揭示出界面陷阱密度在禁带中分布 ,其密度随雪崩注入剂量增加而增大 ,禁带上半部增大得尤其显著。指出雪崩注入过程中在 Si/ PECVD Si Ox Ny 界面上产生两种性质不同的电子陷阱 ,并给出它们在禁带中的位置及密度大小关系。支持了界面陷阱来源于悬挂键的物理模型 ,由于本实验的重要结果可用该理论模型圆满地解析。给出 PECVD形成纳米级薄膜的优化工艺条件 ,该条件成膜的界面特性良好、耐压范围高、抗雪崩注入能力及其他电子特性也较好     

快速热氮化SiO_2膜陷阱特性的研究

本文采用雪崩热电子注入技术研究了快速热氯化SiO_2膜和氮化后再氧化SiO_2膜的体电子陷阱和界面态特性。揭示出电子陷阱的起源和放电机理;观察并解释了界面态密度随氮化时间以及平带电压漂移随注入时间的变化关系;提出降低体电子陷阱密度和界面态密度的有效途径。     

研究电子陷阱特性的雪崩注入法

本文介绍一种研究MIS电容介质膜电子陷阱特性的新型方法——雪崩热电子注入法.文章详细地讲述了雪崩注入法研究电子陷阱特性的实验装置和测试原理;具体给出了如何确定介质膜内的体电子陷阶密度、电子陷阱俘获截面和界面态陷阱状态等;指出了雪崩注入法的优缺点及其应用.     

快速热氮化SiO_xN_y薄介质膜的电荷特性与光学性质

对于快速热氮化（ＲＴＮ）的ＳｉＯｘＮｙ薄膜（ＲＴＮＦ），本文不仅采用Ｂ－Ｔ处理高频Ｃ－Ｖ测试研究了它的电荷特性，而且还借用椭圆偏振谱技术和俄歇电子能谱分析研究了它的光学性质和微结构组分，同时还讨论了电学特性与光学性质间的相关性．实验结果表明：氮化后再氧化退火是减少ＲＴＮＦ中固定电荷的有效途径，结合Ｂ－Ｔ处理高频Ｃ－Ｖ测试技术仍适用于这种薄膜中碱金属可动离子密度的测量．研究结果还给出：类似于禁带中央界面陷阱密度，该薄膜折射率随氮化时间呈现出“回转效应”变化关系．测试分析结果并初步提出一个直接与膜的微结构组分     

DCIV技术表征MOS/SOI界面陷阱能级密度分布

基于直流电流电压(DCIV)理论和界面陷阱能级U型对称分布模型,可以获取硅界面陷阱在禁带中的分布,即利用沟道界面陷阱引起的界面复合电流与不同源/漏-体正偏电压(Vpn)的函数关系,求出对应每个Vpn的有效界面陷阱面密度(Neff),通过Neff函数与求出的每个Neff值作最小二乘拟合,将拟合参数代入界面陷阱能级密度(DIT)函数式,作出DIT的本征分布图.分别对部分耗尽的nMOS/SOI和pMOS/SOI器件进行测试,得到了预期的界面复合电流曲线,并给出了器件界面陷阱能级密度的U型分布图.结果表明,两种器件在禁带中央附近的陷阱能级密度量级均为109 cm-2·eV-1,而远离禁带中央的陷阱能级密度量级为1011 cm-2·eV-1.     

Reliability of MOSFETs as affected by the interface traptransformation process

An investigation of the long-term time-dependent degradation of the subthreshold characteristics in n-channel and p-channel MOSFETs resulting from Fowler-Nordheim electron injection is discussed. Immediately after the hot-electron injection, degradation in both n- and p-channel transistors due to the hot-electron-induced interface traps is observed. When measured after the hot-electron injection was terminated, however, the subthreshold slope in n-channel transistors exhibits a gradual recovery toward its preinjection level, while that in p-channel transistors continues to degrade with time. This phenomenon can be explained by the interface trap transformation process, which is characterized by a gradual reduction of the hot-electron-induced interface traps above midgap and a gradual increase of the interface traps below midgap     

雪崩热电子注入对快速热氮化SiO_2膜陷阱行径的影响(英文)

The effects of avalanche hot-electron injection on trapping behavior of bulk electron and interface state of rapid thermal nitrided SiO2 film is investigated. It is found that in the dielectric films, besides the generation of the acceptor-type electron trapping, the slow donor-type electron trapping is also generated near interface during avalanche injection.The density of the acceptor electron trapping is much larger than that of donor. Results indicate that in the course of the avalanche injection two fast interface state trappings of the acceptor-type and the donor-type are generated in the interface and the positions of the two trappings in the forbidden band are denoted. The changing relation of the interface state density with avalanche injection is given. In this paper the theoretical analysis of these research results is also made.     

PECVD法低温形成新型SiO_xN_y薄膜的界面特性研究

研究了等离子体增强化学气相淀积（PECVD）方法低温形成新型SIOxNy薄膜的界面特性。研究侧重于PECVDSiOxNy薄膜良好界面特性的控制，探索出界面特性与微观组份、衬底工作温度、反应室气压、退火致密、金属化后退火的相互关系。同时给出了获取界面等特性优良的PECVDSiOxNy薄膜的最优化工艺条件，并对实验结果进行了理论分析与讨论。     

The role of electron traps on the post-stress interface trapgeneration in hot-carrier stressed p-MOSFETs

The generation of interface traps in p-MOSFETs subjected to hot-electron injection is found to proceed even after the stress has been terminated. The extent of post-stress interface trap generation is strongly dependent on the magnitude of the preceding hot-electron stress, as well as the magnitude and polarity of the gate voltage during relaxation. Trap generation is enhanced for negative gate voltage anneal, but suppressed for positive gate voltage anneal. For a given stress-induced damage, the corresponding trap generation kinetics can be completely described by a single characteristic, which is shifted in time according to the magnitude of the applied gate voltage. Existing interface trap generation models are discussed in the light of the experimental results. A new model involving the tunneling of holes from the inversion layer to deep-level electron traps is proposed. Similar post-stress effect observed for hot-electron stressed n-MOSFETs provides additional support for the model. Our work suggests that near-interface electron traps, apart from the well-known hole traps, may also significantly affect the long-term stability of the Si-SiO₂ interface     

Impact of nitrogen incorporation on interface states in (1 0 0)Si/HfO2

The energy distribution of (1 0 0)Si/HfO₂ interface states and their passivation by hydrogen are studied for different levels of nitrogen incorporation using different technological methods. The results are compared to those of N-free samples. The nitrogen in the (1 0 0)Si/HfO₂ entity is found to increase the trap density in the upper part of the Si band gap and to hinder the passivation of traps in molecular hydrogen in this energy range. At the same time, the passivation of fast interface traps in the lower part of the band gap proceeds efficiently, provided the thickness of the grown Si₃N₄ interlayer is kept minimal. However, the lowest achievable interface trap density below midgap is set by the presence of slow N-related states, likely related to traps in the insulator.