Interaction of Ir and IrO2 thin films with polysilicon,W and WSIx

Abstract

Ir and IrO₂ thin films have been identified as potential electrode materials for ferroelectric capacitors. These electrodes have shown excellent electrical characteristics. The integration of ferroelectric capacitors into memory cell requires the bottom electrode material to be placed directly over a contact plug. This paper studies the interaction of Ir and IrO₂ with commonly used plug materials such as polysilicon, tungsten (W), and tungsten silicide (WSi_x) after a post-deposition annealing at 800°C. Film properties such as composition, resistivity, crystallinity, adhesion, and micro-structure have been examined before and after anneal. The results show that W is a possible plug material for Ir electrode; while polysilicon and WSi_x are potential candidates if IrO₂ electrodes are used.     

Effects of Ti/Ir top electrodes of PZT capacitors on the hydrogen related degradation

Abstract

Hydrogen annealing damages on properties of PZT capacitors and a role of Ti/Ir hybrid structure top electrodes on capacitors are investigated in this study. It is demonstrated that the capacitors with Ti/Ir structure top electrodes improve a resistance against hydrogen related degradation. As the thickness ratio of Ti/Ir increases, the capacitors show enhanced endurance against hydrogen damages. Especially, PZT (350nm) capacitors with Ti(80nm)/Ir(20nm) hybrid top electrodes show only 26% decrease in nonvolatile polarizations (P?_r) under ± 7V, while 67% of P?_r of ferroelectric capacitors with Ir top electrodes is reduced after forming gas annealing at 250°C for 10min. Based on the XPS analysis, ferroelectric characteristics of PZT thin film capacitors are degraded by destruction of Pb-O bond into metallic Pb due to hydrogen anneal on the catalytic top electrodes (Ir, Pt).     

Plasma Etch Processes for Embedded FRAM Integration

We describe the etch processes used for integration of embedded ferroelectric random access memory (FRAM) within a standard CMOS logic flow. The ferroelectric module is inserted following front-end contact formation and prior to backend integration using only two additional mask levels: capacitor pattern and bi-level via pattern. The single-mask stack etch process employs a TiAlN hardmask to define Ir/IrO_x/PZT/IrO_x/Ir capacitors. Protective sidewalls can be formed using an etchback process. The bi-level via etch and subsequent metal fill processes complete the FRAM module formation. Functional 4 MB arrays embedded with 5 levels of Cu/FSG integration have been demonstrated.     

Conducting oxide electrodes for ferroelectric films

Abstract

Suitability of oxide electronic conductors [e.g. ruthenium oxide (RuO_x) and indium-tin-oxide (ITO)] as contact metallization for ferroelectric films (e.g. PbZr_xTi_1?xO₃) was investigated using techniques such as Rutherford backscattering spectrometry, x-ray diffraction and electron spectroscopy for chemical analysis. Thin films of RuO_x and ITO were deposited on Si substrates by reactive sputtering. Either PbO or PZT (x = 0.53) films were deposited onto the conducting oxides and the specimens were annealed at various temperatures between 400°C and 700°C. Less intermixing was found in Si/RuO_x/ PZT films when compared to Si/ITO/PZT under similar processing conditions. The ferroelectric properties of PZT films on RuO_x electrodes are compared to those on Pt electrodes. The PZT films show improved fatigue properties on RuO_x electrodes.     

The origin and elimination of random single-bit failure in high density 1t1c fram

Abstract

The COB (capacitor-over-bit line) structure is essential for integrating high density FRAM (ferroelectric random access memory) device. It is very difficult in the COB cell structure to maintain low contact resistance between plug material and bottom electrode during the integration processes. We have used CoSi_x/poly-Si and Pt/IrO₂/Ir as plug materials and bottom electrode stack, respectively. However, random single-bit failure was observed due to the high contact resistance, which was caused by the formation of amorphous oxide layer, especially, during high temperature anneal for PZT (Pb[Ti_x,Zr_1-x]O₃) crystallization. It was observed that silicon atoms diffuse even into Ir oxygen barrier, thus leading to the oxide formation between the plug and Ir oxygen barrier. The approach we have taken to prevent contact resistance failure is to optimize the plug material that has high endurance against oxidation reaction. In this study, we developed tungsten plug technology to eliminate the random single-bit failure. It is expected that this tungsten plug technology can provide highly reliable COB structure for 32Mb FRAM device and beyond.     

Integration of H2 barriers for ferroelectric memories based on SrBi2Ta2O9 (SBT)

Abstract

In this study, integration of an hydrogen barrier into a FeRAM process flow is investigated. It is reported in the literature that ferroelectric properties can be maintained after hydrogen annealing by using IrO_x as a top electrode [16][17][18]. Advantage of materials like IrO_x is less catalytic activity compared to Pt. However, we found that IrO_x is not a promising candidate for top electrode barrier. (Pt)/IrO_x/SBT/Pt capacitors are prone to shorting or exhibit high leakage. IrO_x films are very easily reduced by reducing ambient which will result in peeling off. Also, IrO_x films tend to oxidize Ti or TiN layers immediately. Therefore, other barrier materials or layer sequences like Ir/IrO_x have to be considered.

For protection of the entire capacitor an Encapsulation Barrier Layer (EBL) is required. In this study, LPCVD SiN is used. LPCVD SiN is a standard material in CMOS technology. Production tools are available and it is well known as hydrogen barrier. By modifying the deposition process and using a novel process sequence, no visual damage of the capacitors after SiN-deposition and FGA is seen. Also, no degradation of electrical properties after capacitor formation as well as after SiN-deposition and FGA is observed. However, after metal 1 and metal 2 processing, 2P_r values at 1.8V are reduced from 12μC/cm²to 2μC/cm². Polarization at 5.0V is not affected.     

Lead zirconate titanate ferroelectric capacitors produced on sapphire and gallium arsenide substrates

Abstract

Pb(Zr_xTi_1?x)O₃ (PZT) based ferroelectric capacitors have been produced at 600°C on R-cut sapphire and Si-doped (100) GaAs substrates using a pulsed laser ablation deposition (PLAD) technique. La_0.5Sr_0.5CoO₃ (LSCO) conducting electrodes deposited using PLAD serve as top and bottom electrodes. X-ray diffraction results show that the PZT film is polycrystalline and phase-pure in both cases. Electrical characterization of the films show remanant polarization in excess of 20 μC/cm₂. Results of long term properties show that these capacitors: are very tolerant to extremely large numbers of switching cycles; retain charges over very long periods of time; and do not show a strong tendency for their dipoles to be imprinted in a preferred direction.     

Preparation of PZT Thin Films by Liquid-Source MOCVD Using of Cyclohexane Solvent

Pb(Zr, Ti)O₃ thin films were grown on 8-inch Ir(111)/SiO₂/Si substrate by a MOCVD system aiming at application utilizing high-density ferroelectric memory (FRAM). Two types of solvents, THF and cyclohexane were used for liquid source delivery. It was found that the ferroelectric properties of the MOCVD-PZT films using cyclohexane solvent were better than them using THF solvent. By choosing cyclohexane as solvent, the MOCVD-PZT thin films showed strong ?111? preferred orientation and the Pt/PZT/Ir capacitors exhibited promising ferroelectric performances, for instance, large switching charge (Qsw) of 56.4 uC/cm².     

Modification of PZT nucleation and growth using oxide layer in multi-layered electrodes

Abstract

The ferroelectric properties of PZT on RuO₂ electrodes were compared to those on RuO₂/Pt electrodes. The better hysteretic properties were obtained from Pt/RuO₂/PZT/RuO₂/Pt ferroelectric capacitors. The enhancement of ferroelectric properties is likely attributed to the modification in the microstructure of PZT film. The interfacial modification would be affected by the factors such as surface roughness, stress, and porosity of RuO₂ film. As the result of the interfacial modification, better quality PZT films are produced, thereby resulting in better ferroelectric properties. We made an effort to understand the relationship between the grain size and the coercive voltage in terms of the domain formation and the domain pinning in connection with defects like grain boundaries.     

Study on property variation due to the interface between PZT and electrode

Abstract

The ferroelectric capacitors are fabricated using RuO₂/Pt electrode to examine the electrode effect on ferroelectric properties. PZT films are prepared by metalorganic decomposition (MOD) on sputter deposited electrodes. In particular, inductively coupled plasma(ICP) etcher is used to minimize the etching damage. In addition, TiO₂ reaction barrier layer is also employed to retard the degradation of ferroelectric properties due to the reaction between a passivation layer and PZT film. The better hysteretic properties were obtained from Pt/RuO₂/PZT/RuO₂/Pt ferroelectric capacitors. The enhancement of ferroelectric properties is likely attributed to the modification in the microstructure of PZT film. The interfacial modification would be affected by the factors such as surface roughness, stress, and porosity of RuO₂ film. The result implies RuO₂/Pt would be a good electrode for a nonvolatile memory application.     

Ferroelectric memory FET with Ir/IrO2 electrodes

Abstract

We proposed a MFMIS structure having a floating gate as a bottom electrode between a ferroelectric thin film and the gate SiO₂. Conventional gate SiO₂ can be used and ferroelectric thin films can be grown on bottom electrodes which have a good matching with the ferroelectric materials due to adopt the MFMIS structure. Ir and IrO₂ on poly-Si were used as floating gate. When a IrO₂ layer was formed between PZT and poly-Si, a high-quality PZT thin film was obtained and the PZT films show no fatigue up to 10¹² cycles of switching pulses. From the I_D-V_G characteristics measurement for 1·2 μm P-ch MFMIS FET, the shift in V_th or the memory window for a bias sweep of ±15V was about 3·3V. The difference of I_D-V_D curves which corresponded to I_D-V_G characteristics were found between before and after a programming pulse was applied.     

Etching effects on ferroelectric capacitors with multilayered electrodes

Abstract

Dry etching of PZT thin film capacitors with RuOx/Pt multilayered electrodes was studied to examine the etching effects. PZT films were deposited on RuOx/Pt/Ti/SiO₂/ Si substrates by sol-gel process and Pt films were prepared by DC magnetron sputtering. PZT and Pt thin films were etched with Cl₂/C₂F₆/Ar gas combination in an Inductively Coupled Plasma (ICP) by varying the etching parameters such as coil RF power, DC bias to wafer susceptor, and gas pressure.

Etching effects were investigated in terms of etch rate, etch selectivity, etch profiles, and electrical properties of etched capacitors. Quantitative analysis of the etching damage was obtained by calculating the shift of the coercive field and the switchable polarization in hysteresis loops. Finally, the etching damage mechanism was discussed and the optimization of etching processes for the fabrication of PZT capacitors was attempted to minimize the etching damage to ferroelectric capacitors.     

Application of fluorinated SiO2 interlayer dielectrics for ferroelectric memory

Abstract

Fluorine-doped silicon oxide (SiOF) as interlayer dielectric (ILD) was deposited over PZT capacitors by electron cyclotron resonance (ECR) chemical vapor deposition using SiF₄ and N₂O gases. In the conventional deposition of SiO₂ ILD layer using hydrogen-contained source gases, the properties of ferroelectric capacitors are known to be degraded during the formation of SiO₂ layer. In this study, we examined the degradation of electrical properties of SiOF-deposited PZT capacitors. The remnant polarization and leakage currents were not degraded after the deposition of SiOF. We observed that the fluorine atoms were not diffused into the metal electrode in both cases of the SiOF deposited PZT capacitors and post-deposition annealed capacitors. The SiOF films deposited in the high CF₄ flow rate exhibited rough columnar structure on the metal electrodes. We can successfully deposit SiOF in a smooth morphology by introducing TiO₂buffer layer or using the novel deposition method of changing the SiF₄ flow rate, namely two-layer-deposition method.     

PZT capacitors using IrO2 electrode by RF magnetron sputtering

Abstract

RF magnetron sputtered Pb(Zr_x, Ti_1-x)O₃ [PZT] films were prepared on IrO₂/SiO₂/Si and Pt/IrO₂/SiO₂/Si substrates using the ceramic PZT target with Pb_1.1(Zr_0.52Ti_0.48)O₃ composition. In order to obtain single perovskite phase, PZT film was sputtered at room temperature under Ar plasma and followed by high temperature annealing under oxygen atmosphere. In case of Pt/PZT/IrO₂ capacitor, Δ P (=P*-P∧) was decreased with oxygen annealing temperature. However, it was increased in Pt/PZT/Pt/IrO₂ capacitor. Leakage current density of Pt/PZT/Pt/IrO₂ capacitor, which was used for improving leakage characteristics, was about 10^-2A/cm^?2 order lower than that of Pt/PZT/IrO₂ capacitor. Leakage current density of Pt/PZT/Pt/IrO₂ capacitor annealed at 700°C was 6.6x10^-6A/cm². From the fatigue test, Pt/PZT/IrO₂ capacitor annealed at 650°C and Pt/PZT/Pt/IrO₂ capacitor annealed at 700°C showed 3% and 12% degradation of Δ P after 5×10¹⁰ fatigue cycles, respectively.     

Effect of etch gases on iridium etching using a hard mask

Abstract

The dry etching of iridium(Ir) and iridium oxide(IrO₂) using a hard mask has been studied in a high density Inductively Coupled Plasma (ICP). The etch rate and etch selectivity have been obtained in terms of gas chemistry including CI₂/O₂/Ar, HBr/O₂/Ar, and C₂F₆/O₂/Ar gases. The etch profile and the etch mechanism have been examined for various etch gases by using field emission scanning electron microscopy (FESEM) and field emission auger electron spectroscopy (FEAES). In addition, the electrical properties of the etched ferroelectric capacitors were measured for each etching gas.     

Investigation on various insulator layers for MFIS capacitors

Abstract

Effects of insulator layers of Metal(Au)/Ferroelectrics(PZT)/Insulator/Si (MFIS) structure capacitors are investigated for non-destructive type non-volatile memory device applications. Various high dielectric oxide layers such as Al₂O₃, Ta₂O₅, TiO₂ and ZrO₂ were fabricated by reactive sputtering as insulating layers. The oxide insulators give significant impacts on the morphologies of PZT layer and the properties of capacitors. It is noted that the oxide layers with small thermal expansions (<6x10^–6/°C) coefficient caused cracks on PZT films during PZT crystallization annealing. The effects of insulators as a diffusion barrier are also comparatively studied using Auger electron spectroscopy. In addition, the characteristics of high dielectric solid solution, such as titanium oxide-zirconium oxide, are also studied.     

A novel diffusion barrier using oxygen stopping layer for high density FRAM

Abstract

A novel diffusion barrier was successfully developed by using an oxygen stopping layer between Ir barrier films. The oxygen stopping layer was generated by inserting a Ti layer between Ir films, which results in the sandwiched form of Ir/Ti/Ir multi-layer. The diffusion barrier properties were enhanced by refraining oxygen from penetrating into polysilicon plug, which might be attributed to the reaction of oxygen with the Ir-Ti layer. It was confirmed in Auger depth profile that the oxygen was well localized in the stopping layer after annealing at 700°C for 10 min in O₂ ambient. The multi-stack barrier exhibited low contact resistance of 320 and 650 ohm for contact size of 0.6×0.6 and 0.4×0.4 μm², respectively. The PZT films prepared on Pt/IrO²/Ir-Ti-Ir/poly substrate shows remnant polarization of 20 μC/cm² and coercive voltage of 1.2V at 5V. It was demonstrated that this novel barrier can solve barrier contact problem occurred in high density 16Mb FRAM.     

Iridium thin film as a bottom electrode for high dielectric (Ba,Sr)TiO3 capacitors

Abstract

We propose Ir thin films as new electrode materials for high dielectric BST capacitors. Ir was found to be superior to Pt in a number of aspects such as resistivity, adhesion and surface roughness. The Pt/BST/Ir/SiO₂/Si capacitors showed leakage currents as low as Pt/BST/Pt/SiO₂/Si ones, but higher capacitance resulted. For endurance properties with +5V unipolar pulse trains, the dielectric constant of BST films on Ir decreased by only 10% below its initial value after switching of 10⁹ cycles while that on Pt degraded by 30% after 10⁸ cycles. Ir bottom electrode effects on BST film properties were well explained by the formation of IrO₂ phases on the surface of Ir electrodes.     

Ferroelectric properties of heterolayered lead zirconate titanate thin films

Heterolayered Pb(Zr_{1 − x} Ti _x )O₃ thin films consisting of alternating PbZr_0.7Ti_0.3O₃ and PbZr_0.3Ti_0.7O₃ layers were successfully deposited via a multistep sol-gel route assisted by spin-coating. These heterolayered PZT films, when annealed at a temperature in the range of 600–700^∘C show (001)/(100) preferred orientation, demonstrate desired ferroelectric and dielectric properties. The most interesting ferroelectric and dielectric properties were obtained from the six-layered PZT thin film annealed at 650^∘C, which exhibits a remanent polarization of 47.7 μC/cm² and a dielectric permittivity of 1002 at 100 Hz. Reversible polarization constituents a considerably high contribution towards the ferroelectric hysteresis of the heterolayered PZT films, as shown by studies obtained from C-V and AC measurement.     

Effects of ILD & IMD characteristics on ferroelectric properties of fram devices

Abstract

We have deposited SiO₂ using plasma-enhanced TEOS-based (PE-TEOS) CVD method and USG and PSG using atmosphere-pressure CVD method on Pb(Zr, Ti)O₃(PZT) capacitors. The ferroelectric and dielectric properties of the SiO₂ covered PZT capacitors were characterized. SIMS (secondary ion mass spectroscopy) was utilized to obtain hydrogen concentration in the deposited ILD and IMD materials. The concentration of hydrogen in the PE-TEOS-derived SiO₂ was lower than that in the PSG and the USG. Internal stress was low tensile at room temperature and the behavior of thermal stress hysteresis was nearly similar for all SiO₂ materials. Remnant polarization (Pr) of the PE-TEOS covered PZT capacitors was severely degraded as compared to that of as-deposited capacitors. From these results, we have concluded that the degradation of ferroelectric characteristics of PZT capacitors associated with the ILD and IMD processes was closely related to the plasma-induced damage.