Hysteresis analysis in capacitance-voltage characteristics of Pt/(Ba,Sr)TiO3/Pt structures

Abstract

Capacitance-Voltage (C-V) characteristics of Pt/(Ba, Sr)TiO₃/Pt MIM capacitor were investigated. Hysteresis observed in the C-V characteristics of BST films was analyzed. The dependence of the C-V characteristics on the sweeping direction of applied voltage indicates that the hysteresis is caused by the interface trap charge between the BST film and the Pt electrode. A new method was proposed to characterize the interface traps from the hysteresis of C-V characteristics of MIM capacitor. The trapped electron density near the lower interface of the BST thin films was constant (～ 3 × 10¹²cm^?2) for all the film thickness ranging from 500 Å to 2000 Å, which suggests that the hysteresis is not caused by the bulk property of the BST film but caused by the interfacial property.     

Ferroelectric Na0.5K0.5NbO3 thin films by pulsed laser deposition

Abstract

Highly c-axis oriented single phase Na_0.5K_0.5NbO₃ (NKN) thin films have been deposited onto polycrystalline Pt₈₀lr₂₀ substrates and SiO₂/Si(001) wafers using pulsed laser ablation of stoichiometric ceramic target. Strong self-assembling of NKN films along the [001] direction has been observed. Properties of NKN/Pt thin film structures have been successfully tailored by oxygen pressure control from the ferroelectric state, characterized by the remnant polarization of 12 uC/cm², dielectric constant ? ～ 520 and tan δ ～ 0.024 @ 100 kHz, to superparaelectric state with tan δ as low as 0.003 and ? = 210 with very small 1.7% dispersion in the frequency domain 0.4–100 kHz and less than 10% variation in the temperature range 77–415 K. NKN films grown onto SiO₂/Si(001) substrates show quadrupled super-lattice structure along c-axis, loss tan δ less than 0.01, and ? ～ 110 @ 1 MHz. C-V measurements for Au/NKN (270nm)/SiO₂/Si MFIS-diode structure yield memory window of 3.26 V at the programmable voltage of 8 V.     

Effects of nitridation treatments for SBT/Ta2O5 stack gate capacitors

Abstract

In this study, effects of ICP nitride treatments on characteristics of ferroelectric gate stack capacitor were investigated for FET type ferroelectric memory applications. Pt/SBT(200nm)/Ta₂O₅(20nm)/ Nitride/Si (MeFINS) structure capacitors show wide ΔV (memory window) of 1.06V under ±3V operation, while Pt/SBT(200nm)/ Ta2O₅(20nm)/Si (MeFIS) capacitors without nitride treatments exhibit memory window of 0.60V. At the same time, an accumulation capacitance of the MeFINS structure device is higher than that of the MeFIS structure capacitor. This result implies that the ICP nitride treatment successfully suppresses a formation of low dielectric constant interfacial SiO_x layer and alleviates a series capacitance problem.     

Characterization of the CeO2 thin films for insulation layer and Pt/SrBi2Ta2O9/CeO2/Si MFISFET structure

Abstract

CeO₂ and SrBi₂Ta₂O₉ (SBT) thin films for MFISFET (metal-fcrroelectrics-insulator-semiconductor field effect transistor) were deposited by rf sputtering and pulsed laser deposition method, respectively. The effects of oxygen partial pressure during deposition for CeO₂ films were investigated. The oxygen partial pressure significantly affected the preferred orientation, grain size and electrical properties of CeO₂ films. The CeO₂ thin films with a (200) preferred orientation were deposited on Si(100) substrates at 600°C. The films deposited under the oxygen partial pressure of 50 % showed the best C-V characteristics among those under various conditions. The leakage current density of films showed order of the 10^?7～10^?8 A/cm² at 100 kV/cm. The SBT thin films on CeO₂/Si substrate showed dense microstructure of polycrystalline phase. From the C-V characteristics of MFIS structure composed of the SBT film annealed at 800°C, the memory window width was 0.9 V at ±5 V. The leakage current density of Pt/SBT/CeO₂/Si structure annealed at 800°C was 4×10^?7 A/cm² at 5 V.     

C-Axis Oriented MOCVD YMnO3 Thin Film and Its Electrical Characteristics in MFIS FeTRAM

Yttrium manganate (YMO) thin films were prepared on SiO₂ buffered silicon as a candidate for ferroelectric transistor random access memory (FeTRAM). The films were deposited by flash evaporated MOCVD at low temperature and post annealed to crystallize the c-axis oriented hexagonal YMO phase. It is found that oxygen content and substrate temperature are major parameters determining c-axis orientation. For the electrical characteristics, P_r (remnant polarization) ～2 μ C/cm² and ? (dielectric constant) ～ 20 are obtained in Pt/YMO/Pt structures. It is also found that a top buffer layer of 30 nm ZrO₂ helps to reduce the leakage current of Pt/top buffer/YMO/SiO₂/Si stack to 10^{? 7} A/cm² and improves the C-V memory window from 0.2 V to 2 V.     

Preparation of BST thin films on Pt electrode on Si wafer with down-flow LSMCVD reactor

Abstract

A novel type of down-flow LSMCVD (Liquid Source Mist CVD) reactor was developed to prepare a high dielectric BST thin film on Pt electrode on Si wafer. Barium acetate [Ba (OOCCH₃)₂], strontium acetate [Sr (OOCCH₃)₂], and titanium isoproxide [Ti (OC₃H₇ ⁱ )₄] were used as metal sources. Metal sources were dissolved in acetic acid, 1-butanol, or 2-methoxyethanol. BST [Ba/(Ba + Sr) = 0.7] film annealed on Pt/Ti/SiO₂/Si above 650°C was polycrystalline. BST film has a (110) preferred orientation with increasing temperature. Surface roughness of BST film and grain size increased with increasing temperature. The metal-oxygen bond was formed at 650°C as shown in the spectra of FTIR. The depth profiles of elements of BST thin films indicated a uniform composition throughout the film. BST films annealed at 750°C showed a dielectric constant and a tanδ of 390 (thickness: 150 nm) and 0.06 at a frequency of 100 kHz, respectively. The behavior of capacitance of the BST film with bias voltage showed paraelectric property. BST film annealed at 750°C had the leakage current density of 3.2 (μA/cm²) at a bias voltage of 2V.     

Bottom electrode structures of Pt/Ru and Ru deposited on polycrystalline silicon by MOCVD for DRAM capacitor

Abstract

The electrode structures of Pt/Ru and Ru on polycrystalline silicon (poly-Si) were prepared by metalorganic chemical vapor deposition (MOCVD) for high dielectric constant (Ba, Sr)TiO₃(BST) capacitor integration. The electrode structures of Pt/Ru/poly-Si annealed above 700°C for 1h in oxygen atmosphere showed a smooth surface ·microstructure without any second phases on the platinum. The specific contact resistance of Pt/Ru and poly-Si in Pt/Ru/poly-Si structures annealed at 800°C was about 1.5 × 10^?5 Ω-cm². The step coverage of Ru film deposited at 150°C was 76% and those of Pt film deposited at 300°C on Ru (deposited at 150°C) was about 61.3%.     

Microstructures and pyroelectric properties of (Pb,La)TiO3 thin films grown on MgO and ON Pt/MgO

Abstract

Comparison has been made between the microstructures and electrical properties of Pb_0·95La_0·05TiO₃ (PLT) thin films deposited on bare (100)MgO and on Pt/(100)MgO. Nearly perfect epitaxial PLT was grown on (100)MgO. (100)-oriented Pt film was obtained via coalescence of Pt islands formed on MgO. Highly c-axis oriented PLT thin film was successfully grown on the Pt bottom electrode with an electrically conductive network structure. High detectivity of 3·5 × 10⁸ and 2·6 × 10⁸ cm√Hz/W was obtained at 30 Hz without any poling treatments from the PLT/MgO- and PLT/Pt/MgO-based infrared detectors, respectively.     

Iridium thin film as a bottom electrode for high dielectric (Ba,Sr)TiO3 capacitors

Abstract

We propose Ir thin films as new electrode materials for high dielectric BST capacitors. Ir was found to be superior to Pt in a number of aspects such as resistivity, adhesion and surface roughness. The Pt/BST/Ir/SiO₂/Si capacitors showed leakage currents as low as Pt/BST/Pt/SiO₂/Si ones, but higher capacitance resulted. For endurance properties with +5V unipolar pulse trains, the dielectric constant of BST films on Ir decreased by only 10% below its initial value after switching of 10⁹ cycles while that on Pt degraded by 30% after 10⁸ cycles. Ir bottom electrode effects on BST film properties were well explained by the formation of IrO₂ phases on the surface of Ir electrodes.     

Impact of platinum contamination on ferroelectric memories

Abstract

The impact of platinum contamination on the breakdown properties of gate oxide is reported. Wafers were intentionally contaminated with 1×10¹³ to 4×10¹⁴ at/cm² Pt after a 7.5 nm gate oxide growth, 300 nm poly-silicon deposition and subsequent phosphorus doping. Breakdown characteristics were evaluated using a voltage ramp method. The current-voltage curves of MOS capacitors show very few low field breakdown events, and the main field breakdown occurs at 12 MV/cm. If compared to clean wafers, platinum does not increase the defect density seriously. It is found from the E-Ramp results that platinum contamination up to 4×10¹⁴ at/cm² does not have a pronounced effect on the gate oxide integrity if the contamination occurs after front-end-of-line processing of device fabrication.     

Dielectric properties and schottky barriers in silver tantalate-niobate thin film capacitors

Abstract

Submicron thick ferroelectric Ag(Ta,Nb)O₃ films have been pulsed laser deposited on the bulk Pt₈₀lr₂₀ polycrystalline substrates. They are ferroelectric at temperatures below 125 K with the remnant polarization of 0.4 μC/cm² @ 77K and paraelectric at higher temperatures with tanδ@ 100 kHz as low as 0.015. Extensive I-V characterization has been performed in a wide temperature range 77 K to 350 K for vertical Me/Ag(Ta,Nb)O₃/Pt₈₀Ir₂₀ capacitive cells, where the metals Me = Pd, Au, Cr, and Al have been used as a top electrode. The electronic transport in thin Me/Ag(Ta,Nb)O₃/Pt₈₀Ir₂₀ capacitors follows the Schottky emission mechanism with the barrier height for the Pd, Au, Cr, and Al of 0.85, 0.8, 0.74, and 0.69 eV, respectively.     

Effects of Ti/Ir top electrodes of PZT capacitors on the hydrogen related degradation

Abstract

Hydrogen annealing damages on properties of PZT capacitors and a role of Ti/Ir hybrid structure top electrodes on capacitors are investigated in this study. It is demonstrated that the capacitors with Ti/Ir structure top electrodes improve a resistance against hydrogen related degradation. As the thickness ratio of Ti/Ir increases, the capacitors show enhanced endurance against hydrogen damages. Especially, PZT (350nm) capacitors with Ti(80nm)/Ir(20nm) hybrid top electrodes show only 26% decrease in nonvolatile polarizations (P?_r) under ± 7V, while 67% of P?_r of ferroelectric capacitors with Ir top electrodes is reduced after forming gas annealing at 250°C for 10min. Based on the XPS analysis, ferroelectric characteristics of PZT thin film capacitors are degraded by destruction of Pb-O bond into metallic Pb due to hydrogen anneal on the catalytic top electrodes (Ir, Pt).     

Ferroelectric SrBi2Ta2O9 thin films deposited by liquid injection MOCVD using novel bimetallic alkoxide precursor

Abstract

The ferroelectric SBT films were deposited on Pt/Ti/SiO₂/Si substrates by liquid injection metalorganic chemical vapor deposition (MOCVD) with single-mixture solution of Sr[Ta(OEt)₅(dmae)]₂ and Bi(C₆H₅)₃. The Sr/Ta and Bi/Ta ratio in SBT films depended on deposition temperature and mol ratio of precursor in the single-mixture solution. At the substrate temperature of 400°C, Sr/Ta and Bi/Ta ratio were close to 0.4 and 1 at precursor mol ratio of 0.5～1.0. As-deposited film was amorphous. However, after annealing at 750°C for 30 min in oxygen atmosphere, the diffraction patterns indicated polycrystalline SBT phase. The remanent polarization (Pr) and coercive field (Ec) of SBT film annealed at 750°C were 4.7 μC/cm²and 115.7 kV/cm at an applied voltage of 5 V, respectively. The SBT films annealed at 750°C showed practically no polarization fatigue up to 10¹⁰ switching cycles.     

CHARACTERISTICS OF METAL-FERROELECTRIC-INSULATOR-SILICON DEVICES USING HFSION BUFFER LAYERS

ABSTRACT

In this work, metal-ferroelectric-insulator-silicon (MFIS) devices were fabricated using HfSiON as buffer layers and their electrical properties were studied. Ultra-thin HfSiON films were fabricated by electron-beam evaporation at room temperature and post-annealed using different parameters such as temperature, time in O₂. By annealing a 2 nm-thick HfSiON film at 800°C for 60s in O₂, a negligible hysteresis loop and small equivalent oxide thickness of 2.3 nm were obtained with a corresponding leakage current density of 6.8 × 10^{? 5} A/cm² at a voltage shifted from the flat band voltage by 1 V. In the fabrication of MFIS diodes, Sr_0.8Bi_2.2Ta₂O₉ (SBT) films with 400 nm thickness were formed by chemical solution deposition. For Pt/SBT (400 nm)/HfSiON(2 nm)/Si diodes, a memory window of 0.8 V in width was observed during double capacitance-voltage sweep between +5 and –5 V. At the same time, excellent data retention properties were observed. The high and low capacitances in the hysteresis loop were well distinguishable even after 24 h had elapsed.     

BIPOLAR RESISTIVE SWITCHING IN Au/TiO2/Pt THIN FILM STRUCTURES

ABSTRACT

The conditions and physical mechanisms of electroforming and subsequent resistive switching in Au/TiO₂/Pt thin film structures were investigated. It was concluded that the electroforming, being a current-limited electric breakdown of the TiO₂ films, resulted in a considerable increase of the oxygen vacancy concentration in the bulk and on the surface of the films. The resistive switching implemented by short voltage pulses of different polarities is proposed to be due to the change of the Schottky barrier height at the Pt/TiO₂ interface as a result of the current-induced variation of the occupancy by electrons of the surface states in the band gap of TiO₂.     

Interfacial layers and their effect on leakage current in mocvd-deposited SBT thin films

Abstract

Strontium bismuth tantalate (SBT) thin films were deposited on Pt/Ti electrodes by metalorganic chemical vapor deposition (MOCVD). Interactions at the interface of Pt and SBT and their effect on leakage current were investigated. High-resolution transmission electron micrographs (HRTEM) reveal that after annealing at 700°C, a 1–2 nm thick interfacial layer built. Auger electron spectra (AES) confirm that the constituents of SBT intermix with the Pt and vice versa. Schottky emission yields a nice linear fit to the leakage current data but the extracted values of the optical dielectric constant and the Richardson constant do not meet experimental values. Taking into account an interfacial layer with low dielectric constant and the effect of diffusion on the Schottky emission these inconsistencies can be resolved.     

Ferroelectric properties of plzt thin films prepared by mocvd

Abstract

Lanthanum-modified lead zirconate titanate (PLZT) thin films have been grown on Pt/SiO₂/Si substrate at 650[ddot]C by metalorganic chemical vapor deposition. The relative dielectric constant increased as the La content was increased up to about 5 atomic percent (at%). The remanent polarization and coercive field decreased from 30 to 20 μC/cm² and from 53 to 30 kV/cm, respectively, with increasing La content in the range of 0–13 at%. The leakage current of PLZT film was 3 × 10^?9 A/cm² at an applied voltage of 3 V. The degradation of switched charge density of PLZT film was not observed even at 2 × 10¹¹ cycles.     

The effects of forming gas anneal on the electrical characteristics of ir-electroded BST thin film capacitors

Abstract

The effect of various temperature nitrogen anneals prior to top electrode deposition on the ability of Ba_0.7Sr_0.3TiO₃ (BST) thin-film capacitors with both Ir and Pt top electrodes to withstand hydrogen damage was investigated. Experimental results show that samples that underwent a 750 °C N₂ pre-top electrode anneal exhibited the lowest leakage current density at positive bias for both Ir- and Pt-electroded devices after forming gas anneal. It was also found that DRAM polarization values decreased slightly after forming gas anneal. Also, a post-top electrode deposition 550°C O₂ anneal improved both electrical characteristics (lowered leakage and increased DRAM polarization) of these devices. Complete recovery of the leakage level prior to hydrogen damage was obtained after a 550°C N₂ recovery anneal for some devices independent of the pre-top electrode anneal. Ir- and Pt-electroded BST (40nm) capacitors have been shown to meet the 1 giga-bit DRAM leakage current requirement of 10^?8 A/cm² at 1.7 V. These Ir- and Pt-electroded BST devices achieved capacitance density levels of approximately 50 fF/μm².     

A novel diffusion barrier using oxygen stopping layer for high density FRAM

Abstract

A novel diffusion barrier was successfully developed by using an oxygen stopping layer between Ir barrier films. The oxygen stopping layer was generated by inserting a Ti layer between Ir films, which results in the sandwiched form of Ir/Ti/Ir multi-layer. The diffusion barrier properties were enhanced by refraining oxygen from penetrating into polysilicon plug, which might be attributed to the reaction of oxygen with the Ir-Ti layer. It was confirmed in Auger depth profile that the oxygen was well localized in the stopping layer after annealing at 700°C for 10 min in O₂ ambient. The multi-stack barrier exhibited low contact resistance of 320 and 650 ohm for contact size of 0.6×0.6 and 0.4×0.4 μm², respectively. The PZT films prepared on Pt/IrO²/Ir-Ti-Ir/poly substrate shows remnant polarization of 20 μC/cm² and coercive voltage of 1.2V at 5V. It was demonstrated that this novel barrier can solve barrier contact problem occurred in high density 16Mb FRAM.     

The annealing effect on properties of ZnO thin film transistors with Ti/Pt source-drain contact

ZnO-based thin film transistors (TFTs) with Ti/Pt contacts were fabricated on SiO₂/Si substrates. The as-deposited ZnO TFT did not work well as a TFT device but the annealed ZnO TFT showed acceptable characteristics with a mobility (μ_sat), threshold voltage (V_th), on/off ratio and subthreshold swing (SS) of 0.8 cm²/V.s, 2.5 V, over 10⁶ and 0.84 V/dec, respectively. Complete oxygen loss was observed in ZnO after annealing at 300°C under a N₂ atmosphere. The annealing process altered the crystallinity, density and composition of the ZnO active layers due to the formation of oxygen vacancies as shallow donors. This process is expected to play an important role in controlling the TFT performance of ZnO. In addition, it is expected to form the basis of the future electronic devices applications, such as transparent displays and active matrix organic lighting emitted displays (AMOLED).