A four-level inverter based drive with a passive front end

Multilevel inverters are suited for high power drive applications due to their increased voltage capability. Specifically, as compared to three level inverters, for a given DC bus voltage, a four-level inverter is able to synthesize better waveforms with reduced device ratings. In a medium voltage drive, a conventional diode bridge rectifier is a low cost multilevel solution if the DC bus voltages can be balanced from the inverter side alone. In this paper, operation of a four-level drive with a passive rectifier is investigated, and modulation constraints of the inverter, arising from the capacitor voltage balancing requirements are examined. Simulation and experimental results are presented to demonstrate the link voltage balancing strategy and the performance of the four-level drive     

Implementation of a Three-Phase Capacitor-Clamped Active Power Filter Under Unbalanced Condition

A capacitor-clamped voltage-source inverter for active power filter operation under balanced and unbalanced conditions is proposed to suppress current harmonics and compensate the reactive power generated from the nonlinear loads. The adopted voltage-source inverter is based on a three-level capacitor-clamped topology to reduce the voltage stress of power semiconductors. Two control loops are used in the control scheme to achieve harmonic and reactive currents compensation and to regulate the inverter dc side voltage. In the adopted inverter, the neutral point voltage is compensated by a voltage compensator to obtain the balanced capacitor voltages on the dc side. In order to control the flying capacitor voltages, two redundant states in each inverter leg can be selected to compensate the flying capacitor to obtain a better voltage waveform with low harmonic contents on the ac terminals. The balanced and sinusoidal line currents are drawn from the ac source under the balanced and unbalanced conditions. The feasibility of the proposed scheme is confirmed through experimental results     

A 6.6-kV Transformerless Motor Drive Using a Five-Level Diode-Clamped PWM Inverter for Energy Savings of Pumps and Blowers

This paper describes a 6.6-kV adjustable-speed motor drive for pumps and blowers without transformer. The power conversion system consists of a front-end diode rectifier, a five-level diode-clamped pulsewidth modulation (PWM) inverter with a voltage balancing circuit, and a hybrid active filter for harmonic-current mitigation of the diode rectifier. The control of the inverter is characterized by superimposing a third-harmonic zero-sequence voltage on each of the three-phase reference voltages to achieve the so-called overmodulation and reduce the switching stress of insulated gate bipolar transistors (IGBTs). A 200-V 5.5-kW downscale model is designed, constructed, and tested with focus on the five-level PWM inverter and the voltage balancing circuit. Experimental results obtained from the 200-V downscale model verify the viability and effectiveness of the 6.6-kV adjustable-speed motor drive, showing that the four split dc capacitor voltages are well balanced in all the operating conditions and that the switching stress of the IGBTs is reduced at low modulation indexes.     

Capacitor voltage balancing in full binary combination schema flying capacitor multilevel inverters

Recently, the full binary combination schema (FBCS) method has been introduced to control the flying capacitor multilevel inverter. This method has the primary advantage that the number of voltage levels can be increased for a given number of semiconductor devices when compared to the conventional control methods. However, due to the difficulty of balancing the capacitors, the new schema requires fixed floating sources to provide the DC voltages. This paper reveals an approach of balancing the capacitors, thus expanding the application fields of FBCS inverters to the family of the flying capacitor multilevel inverters under the condition of choosing a suitable modulation index. Simulation results demonstrate the proposed voltage balancing control.     

An SVM Algorithm to Balance the Capacitor Voltages of the Three-Level NPC Active Power Filter

A requirement of the three-level neutral-point-clamped voltage source inverter, with or without a separately supporting dc link, is to maintain the balance of the two dc-link capacitor voltages. In this paper, balancing of the capacitor voltages for these two dc-link voltage source possibilities is analyzed and an algorithm is proposed to independently balance the capacitor voltages. The algorithm considers the average energy effect of each vector on capacitor voltage and the necessary optimal vector state sequence in each modulation cycle. The algorithm minimizes the voltage rating overheads of the hardware, reduces the voltage ripple, and attenuates the negative effects associated with dc-link voltage oscillations.      

Optimal Predictive Control of Three-Phase NPC Multilevel Converter for Power Quality Applications

This paper presents the optimal control of the ac currents, the dc voltage regulation, and the dc capacitor voltage balancing in a three-level three-phase neutral point clamped multilevel converter for use in power quality applications as an active power filter. The ac output currents and the dc capacitor voltages are sampled and predicted for the next sampling time using linearized models and considering all the 27 output voltage vectors. A suitable quadratic weighed cost function is used to choose the voltage vector that minimizes the ac current tracking errors, the dc voltage steady-state error, and the input dc capacitor voltage unbalancing. The obtained experimental results show that the output ac currents track their references showing small ripple, a total harmonic distortion (THD) of less than 1%, harmonic contents that are 46 dB below the fundamental, and almost no steady-state error (0.3%). The capacitor voltages are balanced within 0.05%, and the balancing is assured even when redundant vectors are not chosen. Near-perfect capacitor dc voltage balancing is obtained while reducing current harmonic distortion. Some experimental evidence of robustness concerning a parameter variation was also found, with the optimum controller withstanding parameter deviations from $+$100% to $-$50%. Compared to a robust sliding mode controller, the optimal controller can reduce the THD of the ac currents or reduce the switching frequency at the same THD, being a suitable controller for power quality in medium-voltage applications.      

A Novel Four-Level Voltage Source Inverter—Influence of Switching Strategies on the Distribution of Power Losses

In this paper, a novel four-level inverter will be presented and analyzed. The proposed inverter topology, which is composed of a conventional two-level and a three-level neutral-point clamped (NPC) inverter, is suitable for high-voltage and high-power applications. The proposed inverter, when it is compared with the conventional four-level NPC pulsewidth modulation inverter, exhibits the following advantages: a) ability of changing the power losses distribution profile among the devices by selecting a suitable switching strategy; b) reduction of total inverter power semiconductor device losses; c) ability of bidirectional operation for all power semiconductor switches; and d) easy implementation using existing power semiconductor modules. The effect of conduction and switching losses profiles of the proposed inverter for different switching strategies is examined under different loads, power factors, and modulation indices. The dc-link capacitors voltages are effectively balanced via a proposed self-voltage balancing topology, without the need of isolated dc voltage sources or additional voltage stabilizing circuits. Finally, the theoretical results are confirmed by simulation and experimental results     

New three-port DC-AC inverter outputting a single-phase and a set of three-phase AC voltages

A conventional DC-AC inverter can only output either a single-phase AC voltage or a set of three-phase AC voltages. A new three-port DC-AC inverter which can simultaneously output a single-phase AC voltage and a set of three-phase AC voltages is proposed in this paper. This three-port DC-AC inverter is based on the three-port T-type multi-level power converter which is composed of three T-type power electronic legs, a decoupling transformer set, a filter inductor set, a single-phase filter capacitor, and a three-phase filter capacitor set. The DC port of the proposed power converter is connected to a DC power source to act as the input port, and the single-phase AC port and the three-phase AC port serve as two output ports to supply power to the single-phase load and the three-phase load, respectively. The zero-sequence transformer is used to decouple the single-phase and three-phase AC components, which are generated by the three T-type power electronic legs. The operation principle of this three-port DC-AC inverter is analyzed, and a hardware prototype is established to verify the performance of the proposed three-port DC-AC inverter. The experimental results are as expected.     

Three-Level Inverter Scheme With Common Mode Voltage Elimination and DC Link Capacitor Voltage Balancing for an Open-End Winding Induction Motor Drive

A dc link capacitor voltage balancing scheme along with common mode voltage elimination is proposed for an induction motor drive, with open-end winding structure. The motor is fed from both the ends with three-level inverters generating a five level output voltage space phasor structure. If switching combinations, with zero common mode voltage in the pole voltage, are used, then the resultant voltage space vector combinations are equivalent to that of a three-level inverter. The proposed inverter vector locations exhibit greater multiplicity in the inverter switching combinations which is suitably exploited to arrive at a capacitor voltage balancing scheme. This allows the use of a single dc link power supply for the combined inverter structure. The simultaneous task of common mode voltage elimination with dc link capacitor voltage balancing, using only the switching state redundancies, is experimentally verified on a 1.5-kW induction motor drive     

Loss-Free Balancing Circuit for Series Connection of Electrolytic Capacitors Using an Auxiliary Switch-Mode Power Supply

Most of today's power converters such as three-phase variable-speed drives, uninterruptible power systems, welding converters, and telecom and server power supplies are based on voltage-source converters equipped with bulky dc-link electrolytic capacitors. To be able to handle full dc bus voltage, the dc bus capacitor is arranged as series-connected electrolytic capacitors rated at lower voltage. An electrolytic capacitor, however, is not an ideal capacitor. It has significant leakage current that strongly depends on the capacitor temperature, voltage, and ageing conditions. To compensate large dispersion of the leakage current and ensure acceptable sharing of the total dc bus voltage among the series-connected capacitors, a passive balancing circuit is often used. Drawbacks of the ordinary passive balancing circuit, such as size, significant losses, and standby consumption are discussed in this paper. An active loss-free balancing circuit, which utilizes an auxiliary switch-mode power supply (SMPS) to equalize the capacitor voltages, is proposed. The capacitors midpoint (MP) is connected to the SMPS via two devices; namely a current injection device and a compensation device. The current injection device injects current into the capacitors MP, while the compensation device sinks the difference between the capacitor leakage currents and the injected current. As a result, the capacitor voltages are controlled and maintained in the desired ratio. The proposed balancing technique is theoretically analyzed and experimentally verified on a laboratory setup. The results are presented and discussed.      

Diode-clamped multilevel converters: a practicable way to balance DC-link voltages

The converter topologies identified as diode-clamped multilevel (DCM) or, equivalently, as multipoint clamped (MPC), are rarely used in industrial applications, owing to some serious drawbacks involving mainly the stacked bank of capacitors that constitutes their multilevel DC link. The balance of the capacitor voltages is not possible in all operating conditions when the MPC converter possesses a passive front end. On the other hand, in AC/DC/AC power conversion, the back-to-back connection of a multilevel rectifier with a multilevel inverter allows the balance of the DC-link capacitor voltages and, at the same time, it offers the power-factor-correction capability at the mains AC input. An effective balancing strategy suitable for MPC conversion systems with any number of DC-link capacitors is presented here. The strategy has been carefully studied to optimize the converter efficiency. The simulation results related to a high-power conversion system (up to 10 MW) characterized by four intermediate DC-link capacitors are shown.     

Improved Multilevel Hysteresis Current Regulation and Capacitor Voltage Balancing Schemes for Flying Capacitor Multilevel Inverter

This paper focuses on the development of multilevel hysteresis current regulation strategies. Two such strategies have been discussed and some modifications in their control tasks have been proposed to achieve more reliable and improved performance. In general, the multiband concept has been used while making the proposals. The hysteresis band size considerations have also been presented by taking into account the desired and existing system conditions. The proposed modulation schemes have been applied to a five-level flying-capacitor inverter, whose operation under hysteresis current control mode is much less established. A new method of flying-capacitor voltage balancing is proposed which ensures balanced flying-capacitor voltages and, at the same time, maintains the desired current profile. It uses a time-based approach for controlling the capacitor voltages and achieves appreciable voltage spectrum under wide range of load power factor conditions. The performance of the proposed strategies is confirmed through both simulation and experimental investigations.     

Analysis of a four-level DC/DC buck converter

In this paper, a four-level DC/DC buck power converter is introduced. The primary application for this converter is to regulate the center capacitor voltage in a four-level inverter system. The steady-state and average-value models for the proposed converter are developed and compared in simulation. The converter was constructed in the laboratory and verified on a four-level motor drive system. It was shown that the four-level DC/DC converter provides capacitor voltage balancing and allows higher output voltage utilization from the inverter.     

A novel control scheme for the multilevel rectifier/inverter

A novel three-level pulsewidth modulation (PWM) rectifier/inverter is proposed: this single-phase three-level rectifier with power factor correction and current harmonic reduction is proposed to improve power quality. A three-phase three-level neutral point clamped (NPC) inverter is adopted to reduce the harmonic content of the inverter output voltages and currents. In the adopted rectifier, a switching mode rectifier with two AC power switches is adopted to draw a sinusoidal line current in phase with mains voltage. The switching functions of the power switches are based on a look-up table. To achieve a balanced DC-link capacitor voltage, a capacitor voltage compensator is employed. In the NPC inverter, the three-level PWM techniques based on the sine-triangle PWM and space vector modulation are used to reduce the voltage harmonics and to drive an induction motor. The advantages of the adopted th-ree-level rectifier/inverter are (1) the blocking voltage of power devices (T1, T2, S_a1-S_c4) is clamped to half of the DC-link voltage, (2) low conduction loss with low conduction resistance due to low voltage stress, (3) low electromagnetic interference, and (4) low voltage harmonics in the inverter output. Based on the proposed control strategy, the rectifier can draw a high power factor line current and achieve two balance capacitor voltages. The current harmonics generated from the adopted rectifier can meet the international requirements. Finally, the proposed control algorithm is illustrated through experimental results based on the laboratory prototype.     

Research on Hybrid-Clamped Multilevel-Inverter Topologies

The concept of hybrid clamped is proposed in multilevel-inverter topologies, and a hybrid-clamped multilevel-inverter topology comprising active and passive clamping devices is presented in this paper. In this topology, the dc-link capacitor voltages can be balanced without additional circuitry or separated dc voltage sources, regardless of load characteristics. It can be used in real and reactive power conversion applications. The topology structure, operating principle, and self-voltage balancing ability are analyzed. In addition, the validity is confirmed by simulations and experiments based on a five-level inverter. Finally, the functions of different clamping devices are compared     

DC Link Capacitor Voltage Balancing in a Three-Phase Diode Clamped Inverter Controlled by a Direct Space Vector of Line-to-Line Voltages

In this paper, the direct modulation strategy of a three-level inverter with self stabilization of the dc link voltage is extended to a five-level inverter. Therefore, a new modeling and control strategy of a five-level three-phase diode-clamped inverter (DCI) is presented. The obtained modeling shows that modulated multilevel voltages are obtained by combination of eight different three-level functions, which are called modulation functions. Therefore, a space-vector scheme without using a Park transform is explained. Based on this algorithm, the location of the reference voltage vector can be easily determined. Then, the voltage vectors are selected to generate corresponding levels and simultaneously their durations are calculated. More over, the redundancies of different switch configurations for the generation of intermediate voltages are used to limit the deviation of capacitor voltages. Experimental results are given to illustrate the proposed control strategy of the three-phase three-level diode clamped inverter. Then, obtained results for a five-level three-phase DCI with the extended version of the control strategy are presented to show the good performances of the proposed balancing modulation.     

两种双环控制方式对并联逆变器的影响

电压电流双环控制策略对单相逆变电源有一定的优越性,不同的采样电流方式对逆变电源输出电压外特性有着不同的影响。在控制参数一致的情况下进行对比分析,电感电流反馈方式对其输出电压外特性的影响较大,对并联逆变电源的环流影响较小;电容电流反馈对输出电压外特性的影响较小,对并联逆变电源的环流影响较小,所以文中并联系统采用电容电流反馈方式作为内环调节;通过MATLAB软件中的simulink工具验证了理论的正确性。     

A new cascaded multilevel H-bridge drive

In this paper, a general structure for cascaded power converters is presented in which any number of H-bridge cells having any number of voltage levels are series connected to form an inverter phase leg. Equations are introduced for determining an optimal voltage ratio of DC voltages for the H-bridge cells which will maximize the number of voltage levels obtainable resulting in high power quality. Special cases of the generalized inverter are presented including novel 11-level and 15-level inverters. Laboratory measurements demonstrate the proposed inverter performance     

Experimental evaluation of direct torque-controlled 3-phase induction motor under inverter faults

ABSTRACT

In this paper, analysis and design of fault-tolerant converter topology for direct torque-controlled (DTC) induction motor (IM) drive suitable for low, medium and high power applications is proposed. The proposed converter topology can restore normal operation of the drive after the occurrence of open-circuit or short-circuit of power switches in the inverter. It consists of a current-controlled three-level boost converter (TLBC) to boost the dc-link voltage at input terminals of an inverter during post-fault, balance the voltages at dc-link capacitors and retains all the advantages of the conventional IM drive. Simulation and experimental results are presented for pre- and post-fault operation. The results are compared with conventional fault-tolerant DTC of the drive to highlight the merits of proposed converter.     

模块化多电平换流器电容电压的滑模观测器研究

模块化多电平换流器（modular multilevel converter,MMC）子模块电容电压的稳压控制是MMC的一个关键难题,在实际应用中,需要大量的电压传感器以获取各子模块电容电压。对此提出了一种电容电压滑模观测器（sliding mode observer,SMO）,根据MMC电路中的桥臂电流和开关信号观测出子模块电容电压,并结合电压闭环控制,实现电容电压的稳定,采用双曲正切函数tanh作该滑模观测器的切换函数,可削弱系统抖振。仿真和实验结果表明该滑模观测器可准确观测出电容电压。