Test Fixtures for RF Susceptibility Testing

The most likely standard test fixture for RF susceptibility testing is the twin-strip transmission line, or its half-space counterpart. Its capacitance per meter (length) is 2? or 4?; characteristic impedance Zc= Z0/2 or Z0/4; voltage gradient Ez = V/w or 2 V/w; magnetic field Hy = V/w Z0 or 2 V/w Z0, respectively.     

A Double-Sided Parallel-Strip Line Push–Pull Oscillator

A novel double-sided parallel-strip line (DSPSL) push-pull oscillator using two identical sub-oscillators on the opposite sides of a dielectric substrate is proposed. The two sub-oscillators, sharing a common DSPSL resonator and common ground in the middle of the substrate, generate out-of-phase fundamental signals and in-phase second harmonics. At the common DSPSL output, the second harmonics are cancelled out while the fundamental signals are well combined. By this design, an additional combiner at the output, as required by the conventional push-pull circuits, is not needed, which greatly reduces the circuit size and simplifies the design procedures of the proposed push-pull oscillator.     

Approximations for the Symmetrical Parallel-Strip Transmission Line (Letters)

A single approxation that is valid for the capacitance of both "wide" and "narrow" parallel-strip transmission lines was derived by assuming that the current distribution is uniform. An approximate formula for the repulsive force between the strips was also derived.     

A Differential Voltage-Controlled Integrated Antenna Oscillator Based on Double-Sided Parallel-Strip Line

A voltage-controlled integrated antenna oscillator (VCIAO) integrating a differential voltage-controlled oscillator (VCO) with a double-sided parallel-strip line (DSPSL)-fed quasi-Yagi antenna based on the DSPSL is presented in this paper. The quasi-Yagi antenna is used not only as the radiating element, but also as the output power combiner and the resonating load of the differential VCO without any matching circuits or transition between them. The two sub-oscillators of the VCO on the opposite sides of the substrate share a common quarter-wavelength DSPSL resonator and a common inserted ground plane, which also works as the reflecting element for the quasi-Yagi antenna. The common DSPSL resonator terminated by a series varactor can not only help to synchronize the two sub-oscillators, but also realize tunable oscillating frequency. Due to the differential output of the proposed VCO, the cross polarization of the proposed VCIAO is suppressed to a great extent in the entire tunable frequency range.     

Broadband Transition Between Double-Sided Parallel-Strip Line and Coplanar Waveguide

A broadband transition between double-sided parallel-strip line and coplanar waveguide is proposed in this letter. This design is based on tapered structure and vertical coupling, which doesn't require any via hole. The proposed transition has a simple structure for easy fabrication. Several parameters are studied by simulation to optimize the transition. A demonstration back-to-back transition is fabricated and measured. The experimental results show that the insertion loss of less than 1.4 dB and the return loss of better than -10dB is obtained from 1.3 to 9GHz     

RTCA/DO-160F与GJB151A射频敏感性项目对比分析

对RTCNDO-160F《机载设备环境条件和测试规程》中第20章的射频敏感性(传导和辐射)与GJB 151A《军用设备和分系统电磁发射和敏感度要求》中CS 114(电缆束注入传导敏感度)和RS 103(电场辐射敏感度)这两个项目进行了详细的对比分析.并从测试目的、适用范围、试验方法、测试布置和校准等方面进行了介绍,旨在...     

Double-Sided Parallel-Strip Line With an Inserted Conductor Plane and Its Applications

In this paper, a novel multilayer structure using the double-sided parallel-strip line with an inserted conductor plane is investigated. A conductor plane is inserted into the middle of the substrate of the double-sided parallel-strip line in the proposed structure, which can function as virtual ground to isolate the nonidentical circuits on the top and bottom layers effectively. On the other hand, the conductor plane can be negligible for the identical circuits. Based on the new structure, a dual-band stub can be realized using the isolation characteristic of the conductor plane, where the stub can be treated as a combination of two back-to-back microstrip stubs operating at different frequencies. The common ground of the two microstrip stubs is provided by the inserted conductor plane. For demonstrating this idea, a bandpass filter with two transmission zeros is optimized, fabricated, and tested. The simulated and measured results are presented and show good agreement. The size of this filter is reduced approximately by half, as compared with that of the similar type of microstrip filters.     

Comments on "Approximation for the Symmetrical Parallel-Strip Transmission Line" (etters)

In a recent article, Rochelle gave an approximation for the capacitance of both "wide" and "narrow" parallel-strip transmission lines in a homogeneous, lossless, dielectric medium. The author obtained a final, unique formula, which is an advantage.     

RF Transmission Line Method for Wide-Bandgap Heterostructures

We propose a high-frequency extension of the transmission line model method that allows for independent extraction of open-surface sheet resistance of a semiconductor layer and that under metallization. The method is applied for the characterization of an AlGaN/GaN heterostructure with a high ( ~40%) Al content with and without a top dielectric layer. In both cases, the sheet resistance under the metal is approximately 30% smaller than that under the open surface. This reduction is attributed to the surface charge compensation by the top metal.     

HSUPA终端射频测试介绍

分析了HSUPA的新增物理信道和关键技术,介绍了HSUPA相关射频测试,对HSUPA测试进行了总结。     

Parallel Wire Susceptibility Testing for Signal Lines

A technique is presented which can be utilized to establish a standardized procedure for performing conducted susceptibility testing on signal lines at the component and/or the subsystem level. Typical military specifications require that the test function be injected to the test lines via a susceptibility transformer, a coupling capacitor, or a standardized network, such as the line stabilization network (LSN). Although these methods may be adequate for testing of power line susceptibility, they present several disadvantages when utilized in signal lines, such as impedance loading, the requirement for physical insertion, and proximity to the load. These disadvantages become more pronounced at RF where the signal developed across the input of the test specimen may be considerably lower than the signal injected at the physical insertion point. A technique that overcomes these deficiencies utilizes a coupling jig that 1) does not require a physical connection, and 2) provides a known coupling across the input impedance of the package being tested-thus simulating, in a very realistic manner, interference coupling as it may occur in a system. A general expression for coupling prediction and a computer solution for various values of load impedances are presented.     

cdma 1x手机射频性能入网测试

本文对CDMA手机入网射频测试项目进行阐述和分析,并说明入网测试注意事项,对易出现不合格的项目提供了整改建议。     

The RF Pulse Susceptibility of UHF Transistors

The electromagnetic susceptibility of UHF transistors is investigated. The 2N5179 RF amplifier type transistor was selected as a representative UHF transistor because of its chip structure. It is a silicon n-p-n epitaxial planar transistor with an interdigitated baseemitter metallization pattern. Several manufacturer's versions were tested. A single RF pulse at 240 MHz was applied directly to the base terminal with the emitter terminal grounded. The incident RF pulse power required to cause a 50 percent failure rate is in the 35-70 W range for a 3 ?s pulse duration and in the 150-450 W range for a 0.3 , ?s pulse duration. The primary variable is the percentage of the incident power absorbed by the transistor. The absorbed pulse energy required to cause a 50 percent failure rate is in the 20-35 ?Joule range for 0.3-3.0, ?s pulse durations. The gs pulse and CW RF burnout powers for 2N5179 transistors are similar to those for 1N23 mixer diodes. The data suggest that UHF receivers with an RF transistor amplifier front end may be as susceptible to intense EMR at UHF frequencies as are UHF receivers with a mixer diode front end.     

Low Cost On-Line Testing Strategy for RF Circuits

This work proposes the use of a simple 1-bit digitizer as an analog block observer, in order to enable the implementation of on-line test strategies for RF analog circuits in the System-on-Chip environment. The main advantages of using a simple digitizer for RF circuits are related to the increased observability of the RF signal path and minimum RF signal degradation, as neither reconfiguration of the signal path nor variable load for the analog RF circuit are introduced. As an additional advantage, the same digitizer can be used to implement BIST strategies, if required. The feasibility of using a 1-bit digitizer for the test of analog signals has already been presented in the literature for low frequency linear analog systems. This paper discusses the implementation of an on-line test strategy for analog RF circuits in the SoC environment, and presents new results for on-line RF testing. Moreover, we also provide detailed analysis regarding the overhead of the test strategy implementation. Experimental results illustrate the feasibility of the proposed technique.Marcelo Negreiros was born in Porto Alegre, Brazil, in 1969. He received the electrical engineering degree in 1992 and the M.S. degree in 1994, both from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then he was been working as an associate researcher in the Signal Processing Lab. (LaPSI) of the Electrical Engineering Department at UFRGS. Since 2000 he also works toward a Ph.D. in Computer Science from UFRGS. His main research interests include mixed-signal and analog testing and digital signal processing.Luigi Carro was born in Porto Alegre, Brazil, in 1962. He received the Electrical Engineering and the MSc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1985 and 1989, respectively. From 1989 to 1991 he worked at ST-Microelectronics, Agrate, Italy, in the R&D group. In 1996 he received the Ph.D. degree in the area of Computer Science from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design and Digital Signal processing disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible for courses in Embedded Systems, Digital Signal Processing, and VLSI Design. His primary research interests include mixed-signal design, digital signal processing, mixed-signal and analog testing, and fast system prototyping. He has published more than 90 technical papers in those topics and is the author of the book Digital Systems Design and Prototyping (in portuguese).Altamiro A. Susin was born in Vacaria-RS, Brazil, in 1945. He received the Electrical Engineering and the MSc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1972 and 1977, respectively. Since 1968 he worked in the start up of Computer Centers of two local Universities. In 1981 he got his Dr Eng degree from Institut National Polytechnique de Grenoble-France. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible for courses in VLSI Architecture and is also thesis director. His main research interests are integrated circuit architecture, embedded systems, signal processing with more than 50 technical papers published in those domains. He is/was responsible for several R&D projects either funded with public and/or industry resources.     

测试系统中射频网络自动切换的研究

对测试系统中射频网络自动切换的各种设计方案进行了全面分析比较,并提出了一种高适配能力的设计方案,基于此方案设计的混合式智能型开关矩阵,解决了自动测试设备与各种被测单元适配难的问题.用一套测试装置完成多种测试,而不需要频繁地断开和连接.实现测试过程的自动化,提高测试效率并且降低成本.     

4-几何结构下测试线段相交性快速算法

提出了一种4-几何结构下两线段相交性测试的快速算法.算法根据4-几何结构的特点,主要以加减运算和快速判断代替了过多使用乘法的传统判断线段相交性的算法,从而加快了算法速度.实验证明算法的性能良好.     

基于LabVIEW平台的射频放大器自动测试系统

本文描述的自动测试系统基于NI公司的LabVIEW软件平台,使用计算机通过GPIB口,控制安捷伦射频网络分析仪测试射频放大器并获取测试数据。该自动测试系统省却了手动设置网络分析仪的繁琐复杂的操作,简化了测试操作流程,提高了测试速度,降低了测试难度。     

利用MAX2016测量RF增益

本文讨沦如何利用MAX×2016 RF检测器实现超外差收发器的增益自动测量.并比较了三种方案的性能和测量精度:增益测量和校准,具有失调修正的增益测量和具有失调、斜率修正的增益测量.     

The Computer-Aided Approach to Susceptibility Testing

Susceptibility testing is generally performed using manual methods which result in the following disadvantages and limitations: tests are time consuming, frequency and amplitude accuracy may not be satisfactory, operator errors can easily occur, and test setup inaccuracies are seldom taken into account and compensated. A new and low-cost method of performing susceptibility testing automatically is presented in this paper. With the advent of test instrumentation operated under digital control and the availability of standardized interface systems, it is now possible to build test systems to carry out automated susceptibility tests which are particularly advantageous when digital equipment are to be tested. By driving power amplifiers from programmable sweep generators, the repeatability and accuracy of the testing will be considerably increased as a result of accurate frequency and amplitude controls using control loops (AFC and ALC). A computer can be used to control and to manage the execution oftests as well as the processing of off-line test results. Major advantages given by the automation of susceptibility testing are increased measurement accuracy, reduction of testing costs and EMC-problem prediction capabilities.