FM/PWM control scheme in class DE inverter

This paper presents a new control scheme for a Class DE inverter, that is, frequency modulation/pulsewidth modulation (FM/PWM) control. Further, the FM/PWM controlled Class DE inverter is analyzed and we clarify performance characteristics. Since the FM/PWM controlled inverter has two control parameters, namely, the switching frequency and the switch-on duty ratio, it has one more degree of freedom for the control than the inverter with the conventional control scheme. The increased degree of freedom is used to minimize the switching losses. Therefore, it is possible to control the output power with high power-conversion efficiency for wide-range control. Carrying out the circuit experiments, we confirm that the experimental results agree well with the theoretical predictions quantitatively. For example, the proposed controlled inverter can control the output voltage from 56% to 191% of the optimum one, which is designed for 1.8 W at 1.0 MHz, with maintaining over 90% power-conversion efficiency.     

Analysis of class D inverter with irregular driving patterns

This paper presents an analysis of Class D inverter when irregular driving patterns are given to the gate drive of the switch devices. The analysis has been carried out with focusing on the waveforms, harmonics, low-frequency components, output power, and equivalent dc resistance, which are numerically analyzed and discussed. Class D inverters with six different Q factors from 0.1 to 20 are analyzed about 2/sup 16/ driving patterns for each Q. Superior four models of the six inverters are built and tested in circuit experiments. The calculated waveforms are compared to the experimental results. Both of them are agreed well in time domain and frequency domain. Analytical results show a possibility of a novel control method with irregular driving patterns. In spite of discontinuous control, the output power or voltage can be strictly changed as if continuous using the selected driving patterns in some ranges.     

A novel control scheme for the multilevel rectifier/inverter

A novel three-level pulsewidth modulation (PWM) rectifier/inverter is proposed: this single-phase three-level rectifier with power factor correction and current harmonic reduction is proposed to improve power quality. A three-phase three-level neutral point clamped (NPC) inverter is adopted to reduce the harmonic content of the inverter output voltages and currents. In the adopted rectifier, a switching mode rectifier with two AC power switches is adopted to draw a sinusoidal line current in phase with mains voltage. The switching functions of the power switches are based on a look-up table. To achieve a balanced DC-link capacitor voltage, a capacitor voltage compensator is employed. In the NPC inverter, the three-level PWM techniques based on the sine-triangle PWM and space vector modulation are used to reduce the voltage harmonics and to drive an induction motor. The advantages of the adopted th-ree-level rectifier/inverter are (1) the blocking voltage of power devices (T1, T2, S_a1-S_c4) is clamped to half of the DC-link voltage, (2) low conduction loss with low conduction resistance due to low voltage stress, (3) low electromagnetic interference, and (4) low voltage harmonics in the inverter output. Based on the proposed control strategy, the rectifier can draw a high power factor line current and achieve two balance capacitor voltages. The current harmonics generated from the adopted rectifier can meet the international requirements. Finally, the proposed control algorithm is illustrated through experimental results based on the laboratory prototype.     

UPS inverter design using discrete-time sliding-mode control scheme

This paper presents a novel discrete-time sliding-mode control algorithm for an uninterruptible power supply (UPS) inverter design. The approach offers a dual-loop design, in which a current predictor utilizes the tracking error of output voltage to estimate the desired inductor current, while a current controller is adopted to regulate the inductor current and, thus, produces a control command to the pulsewidth modulation inverter. An explicit condition for stable controller design is derived. The efficacy of this scheme is validated via a successful implementation on a digital-signal-processor-based UPS inverter. The proposed scheme has shown its robustness on low output voltage distortion, excellent voltage regulation, and it is insensitive to load variation, even under nonlinear loads. Experimental studies were performed to further validate the effectiveness of this scheme     

New denoising scheme for magnetic resonance spectroscopy signals

A new scheme for denoising magnetic resonance spectroscopy (MRS) signals is presented. This scheme is based on projecting noisy MRS signals in different domains, consecutively, and performing noise filtering operations in these domains. The domains are chosen such that the noise portion, which is inseparable from the desired signal in one domain, is separable in the other. A set of stable, linear, time-frequency (SLTF) transforms with different resolutions was selected for these projections as an example. Scheme evaluation was performed using extensive MRS signals with various noise levels. Compared with one domain denoising, it was observed that the proposed scheme gives superior results that compensate for the excess computational requirements. The proposed scheme supersedes also the wavelet packet denoising schemes.     

New scheme for vector quantisation of speech signals

The design theory of a vector quantiser is valid only on some assumptions which are unfortunately not satisfied in most real-world cases. A decomposition procedure of speech signals is described which leads to a proposed method for designing the vector quantisers in a reasonable way.<>     

逆变器无线并联控制方案的设计与实现

首先对逆变器无线并联的原理作了简单的介绍。其次依据逆变器技术指标设计了一种以dsPIC30F3011芯片为核心控制器的无线并联控制方案,结合系统主电路和相关控制原理,给出了该系统的硬件设计和软件设计。最后以两台逆变器并联为研究对象进行实验验证,实验结果表明该控制方案能够达到技术指标的要求并且能够有效地抑制并联系统产生的环流,使输出功率和负载电流得到均分。     

Synchronous current control scheme with reference voltage estimation for voltage-fed PWM inverter

A new current control scheme with the reference voltage estimation for a voltage-fed pulsewidth modulated (PWM) inverter is presented. This scheme is simple and can provide smaller current error than predictive control with the same switching frequency when the load parameters are mismatched.<>     

A new single-phase five-level PWM inverter employing a deadbeat control scheme

A single-phase five-level PWM inverter is presented to alleviate harmonic components of the output voltage and the load current. Operational principles with switching functions are analyzed. To keep the output voltage sinusoidal and to have the high dynamic performances even in the cases of load variations and the partial magnetization in filter inductor, the deadbeat controller is designed and implemented on a prototype. The validity of the proposed inverter is verified through simulation and experiments. To assess the proposed inverter, it is compared with the conventional single-phase three-level PWM inverter under the conditions of identical supply DC voltage and switching frequency. In addition, it is compared with the five-level cascaded PWM inverter.     

Wiregrid modelling scheme for curvature varying surface

A new wiregrid modelling scheme for a curvature varying scatterer is proposed. A conducting elliptic cylinder is modelled by wires with radii of different sizes depending on the radius of curvature on the surface. The size of each wire is generated from the model equation suggested in the study. Numerical results show that this new wiregrid model can be applied to enhance the accuracy of solutions for a curvature varying scatterer     

Improvement of brightness uniformity by AC driving scheme for AMOLED display

We propose an AC voltage driving scheme which can improve the brightness uniformity of active-matrix organic light-emitting diode (AMOLED) displays. Through the use of a charge feed-through mechanism and an AC driving voltage, the voltage drop caused by the parasitic resistance can be compensated. A 2.2 in AMOLED panel with a resolution of 176/spl times/RGB/spl times/220 has been fabricated by low temperature polycrystalline silicon technology to evaluate the performance of the AC driving scheme. Experimental results show that a brightness uniformity of higher than 91.6%, achieved by the AC driving scheme, in contrast to that of 74% achieved by a DC driving scheme.     

Development of a new adaptive sigma-delta modulator scheme applied to multilevel inverter control

Interest in multilevel inverters is increasing in recent years, especially in high voltage applications. Traditional pulse width modulation (PWM) techniques can be applied to control this type of switched converter. However, it is necessary to adapt these techniques to the particularities of multilevel operation. As an alternative, other modulation techniques, such as sigma-delta modulation (SDM) can be used. In this case, it is possible to use advanced modulation techniques, such as adaptive modulation, to adapt the SDM to the multilevel operation. This article presents a new adaptive sigma-delta modulator that controls a five levels multilevel inverter. The algorithm that generates the sigma-delta signal is implemented in a field-programmable gate array (FPGA). This allows a very fast operation independent of the overall control circuit operation response. In addition, the FPGA can generate the control signals necessary to drive the power semiconductors in the power stage. The resulting modulator is simpler than the PWM version.     

New dual-game-based cooperative bandwidth control scheme for ultra-dense networks

Wireless Networks - Future 5G cellular networks are being designed to address the explosive traffic growth of mobile users. In emerging new wireless system paradigms, the ultra-dense network (UDN)...     

Random switching techniques for inverter control

New techniques which dramatically reduce acoustic noise by randomising the inverter switching frequency for inverter control are presented. It is shown that the proposed techniques combine the advantages of conventional pulsewidth modulation (PWM) techniques based on regular-sampling techniques and random PWM techniques     

基于单片机的智能小车行驶控制方案设计

以STC89C52单片机作为控制核心,提出了智能小车行驶控制方案,完成了硬件系统的设计,实现了小车的红外循迹和自动避障的功能.设计方案简单低廉、性能稳定、通用性强、控制精度高,具有较高的使用价值.     

High-speed low-power voltage-programmed driving scheme for AMOLED displays

A new voltage-programmed driving scheme named the mixed parallel addressing scheme is presented for AMOLED displays, in which one compensation interval can be divided into the first compensation frame and the consequent N-1 post-compensation frames without periods of initialization and threshold voltage detection. The proposed driving scheme has the advantages of both high speed and low driving power due to the mixture of the pipeline technology and the threshold voltage one-time detection technology. Corresponding to the proposed driving scheme, we also propose a new voltage-programmed compensation pixel circuit, which consists of five TFTs and two capacitors(5T2C). In-Zn-O thin-film transistors(IZO TFTs) are used to build the proposed 5T2C pixel circuit. It is shown that the non-uniformity of the proposed pixel circuit is considerably reduced compared with that of the conventional 2T1C pixel circuit. The number of frames(N) preserved in the proposed driving scheme are measured and can be up to 35 with the variation of the OLED current remaining in an acceptable range. Moreover, the proposed voltage-programmed driving scheme can be more valuable for an AMOLED display with high resolution, and may also be applied to other compensation pixel circuits.     

Simple starting scheme for a parallel resonance inverter forinduction heating

A starting scheme for thyristor-based parallel resonant current source inverters, with particular reference to induction heating applications, is presented. The input stage to the DC-link is a three-phase phase controlled rectifier. It is shown that instead of using the usual startup circuits providing forced commutation, it is possible to start the system by using a single additional thyristor across the DC-link inductor, together with a special timed gating at the input and output converter. The scheme provides startup for a wide range of loads. The paper explains the principle starting concept and derives a simplified model to quantify the important parameters that govern the startup. The theoretical concept is verified by experimental data demonstrating the start of such an inverter     

New class of codes suitable for computer error control

A new concept of generalised orthogonality is proposed and a class of generalised orthogonal codes based on SBIBD theory is developed     

A five-leg inverter for driving a traction motor and a compressor motor

This paper presents an integrated inverter for speed control of a traction motor and a compressor motor to reduce the compressor drive cost in electric vehicle/hybrid electric vehicle applications. The inverter comprises five phase-legs; three of which are for control of a three-phase traction motor and the remaining two for a two-phase compressor motor with three terminals. The common terminal of the two-phase motor is tied to the neutral point of the three-phase traction motor to eliminate the requirement of a third phase leg. Further component reduction is made possible by sharing the switching devices, dc bus filter capacitors, gate drive power supplies, and control circuit. Simulation and experimental results are included to verify that speed control of the two motors is independent from each other.     

Uncoordinated rate-division multiple-access scheme for pulsed UWB signals

Popular multiple-access schemes for asynchronous users that access the channel at randomly or pseudorandomly chosen time instances are ALOHA and TH-PPM. To cope with the randomness of these signals can be challenging for a receiver. In this paper, an uncoordinated but deterministic multiple-access scheme is proposed that can eliminate some of these drawbacks. The principle of this scheme is that each user transmits with an individual pulse or packet rate, while the duty cycle of the user signals is kept very low. As the access to the channel is asynchronous, collisions will occur. An analytical expression is derived for the collision probability, which depends on the asynchronism between the users. Design rules are derived that make the collision probability independent of the asynchronism. In practical implementations, deviations from the design values for the user rates will occur, and the length of a data packet is limited; the impact of these aspects on the collision probability is discussed. Simulation of a sensor network scenario without transmit power control shows that the design rules that make the collision probability insensitive to the asynchronism also do this for the bit-error rate (BER). The comparison of simulation results for RDMA with binary antipodal modulation and random TH-PSK, which is related to TH-PPM, yields very similar bit-error rates.