Precision electrical trimming of very low TCR poly-SiGe resistors

Precision electrical trimming of stacked Si/SiGe polycrystalline resistors available from the extrinsic base structure of a SiGe BiCMOS technology has been demonstrated for the first time. It is shown that pulse current trimming techniques can be used to trim the poly-SiGe resistors by up to 50% from their original values with accuracy better than ±0.5%. The temperature coefficient of resistance (TCR) is shown to be linearly proportional to the percent change in electrically trimmed poly-SiGe resistance. Finally, we demonstrate resistance cycling using an electrical trim/recovery sequence, indicating that the technique is reversible and is governed by dopant segregation/diffusion mechanisms. The results are consistent with those obtained on conventional polysilicon resistors suggesting that the introduction of a strained SiGe layer does not adversely affect the electrical trim properties of these resistors     

Polysilicon resistor trimming by laser link making

A technique for laser trimming of polysilicon resistors has been developed. In this scheme an undoped polysilicon film is patterned lithographically, and then photoresist patterns are used to prevent doping of certain narrow areas of each resistor during the impurity implant; thus, the protected areas remain insulating after wafer processing. Subsequent laser scanning of the undoped regions can produce precise reductions in resistance by lateral diffusion of dopant impurities. Trimming can be accomplished by changing either the laser power or the position. Q-switched Nd:YAG (1.06-μm wavelength) and second-harmonic (0.53-μm wavelength) radiations have produced successful results. The process was applied to passivated resistors with negligible (perhaps zero) post-trim drift, and the temperature coefficients of resistivity (TCRs) of trimmed resistors can be matched to the TCRs of untrimmed resistors in the same film     

An approach to ensure stability of precision laser trimmed thick film resistors

In view of its complete automation, very high throughput, least in process variation, etc., laser trimming has been an industry standard in thick film technology. Random variations in print thickness, uncertainty of sheet resistivity in a paste lot and other process variations in a production line make it difficult to ensure a reasonably good yield for high precision resistors, where the tolerances under consideration are of the order of ±0.30%. Special attention has to be given to the resistor configuration type of laser cut and post trim processing. The studies were performed on samples drawn from a regular production line which contained two resistor—one with AR (L/W) > 1 where an L cut/Vernier cut combination was used for trimming and the other with AR < 1 where a P cut/Vernier cut combination was used. The post trim resistors' performance was studied under two conditions—one at room temperature and the other after baking at 150°C for 100hr and then maintained at room temperature. These studies lead to the conclusion that for high precision resistors the resistors should be so designed that the L cut/Vernier cut combination can be adopted for trimming. Secondly the trimmed resistor should be stored at 150°C for a period of 100 hr to make the post trim behaviour more predictable and also to achieve better yield.     

Electrical trimming of ion-beam-sputtered polysilicon resistors byhigh current pulses

Phosphorus doped polysilicon resistors have been fabricated from microcrystalline silicon films which were deposited by ion beam sputtering using an argon ion beam of diameter 3 cm, energy 1 keV and current density 7mA/cm², with a deposition rate of 100-120 Å/min. The resistors, having a sheet resistance of 70 Ω/square and a carrier concentration of 7.5×10¹⁹ cm^-3, were stressed with current pulses of width 10 μs and duty cycle 0.6% for 5 min. There was a steady decrease of resistance with increasing pulse current density above a threshold value 5×10 ⁵ A/cm². A maximum fall of 27% was observed for a 95 μm long resistor. The current-voltage characteristics were also recorded during the trimming process. The trimming characteristics were simulated using a small-signal resistivity model of Lu et al. (1983). and the I-V characteristics by a large-bias conduction model. A close fitting of the experimental data with the theoretical values needed an adjustment of some grain boundary parameters for the different pulse current densities used for stressing. The nature of variation of the grain boundary parameters indicates that the rapid Joule heating of the grain boundaries due to current pulses passivates the grain boundary interfaces, at lower currents above the threshold, and then, at higher values of currents, causes zone melting and gradual recrystallization of the disordered boundary layers and subsequent dopant segregation. It confirms the mechanism suggested in the physical model of Kato et al. (1982). The role played by the field-enhanced diffusivity and electromigration of dopant ions, due to the high instantaneous temperature of the grain boundaries, has also been discussed. The pulse trimming technique is simple and does not cause damage to the adjacent components on a monolithic chip     

Quantitative Analysis of Resistance Tolerance of Polymer Thick Film Printed Resistors

Low cost methodologies of resistor fabrications are needed for cost effective embedding of resistors into polymeric substrates. Polymer thick film resistors (PTFRs) are low temperature processable, low cost resistors with a wide resistivity range. The electrical resistance variation of these resistors is in the range of around plusmn20% after deposition and trimming procedure is employed to tune the resistances to meet specifications. This adds to the cost and complicates the fabrication process when the resistors are embedded. In this study, the influences of PTFRs geometries on the resistance tolerances were investigated. Results indicated that the resistance accuracy of stencil printed resistors was markedly higher than that of the screen-printed resistors. The screen-printed resistor edge geometries were observed to be rough. Finite element method analyses revealed that the resistance tolerances were associated with edge roughness. Remedies to reduced variations were proposed and the relationship between resistance tolerances and aperture orientations was also outlined     

An assessment of the applicability of embedded resistor trimming and rework

The successful use of embedded resistors in many applications will require that the fabricated resistors be trimmed prior to lamination into printed circuit boards to attain required design tolerances. Depending on the application, the economic value of the board being fabricated, and the process used to create the embedded resistors, it may also be prudent to consider reworking resistors that are incorrectly trimmed or with initial values that are too large (untrimmable resistors). This paper uses a model of the resistor/board yield coupled with a cost model of the trim and rework processes to identify conditions under which applications should neither trim nor rework, trim but not rework, or perform both trimming and rework of embedded resistors, as a function of the design tolerance for the resistors and the accuracy with which the embedded resistors can be fabricated. Example results are presented for several applications ranging from small boards with a high density of embedded resistors to large boards with a low density of embedded resistors. Distinct regions of trimming and rework applicability that are nearly application independent can be identified as a function of design tolerance, printing/plating/etching variation, and the characteristics of the trimming process.     

Nitrogen implanted polysilicon resistor for high-voltage CMOStechnology application

A nitrogen-implanted polysilicon thin film resistor has been proposed to improve the electrical characteristics of resistors in high-voltage CMOS technologies. The SIMS profile shows the proposed nitrogen-implanted polysilicon resistor can raise 100 times of the concentration of nitrogen. Thereby, the temperature coefficient of resistance (TCR), voltage coefficient of resistance (VCR), and mismatch are improved 20.4%, 35.9%, and 23.5% in average, respectively. The improvements are attributed to the suppression of both hydrogen intrusion by the presence of high-nitrogen concentration in polysilicon     

Pulse trimming of thin-film resistors

Resistivity decreases can be induced in Cr-SiO films by current pulses of short duration. Precision resistance measurements between pulses permit trimming of film resistors to 0.1 percent in less than one second, provided pulse power, duration, and frequency are adjusted properly. A trimmer system that contacts several resistors through multiple probes and controls the process through a paper-tape reader is described. Pulse trimming has been applied to film resistors ranging from pure Cr up to Cr-40 mole % SiO. After annealing at 400°C, additional resistance decreases of at least 20 percent are possible with all compositions containing SiO. The interval between 15 and 30 mole % SiO is most suitable because substantial resistance changes are obtained at pulse powers well below the limits at which resistors burn out.     

New trim configurations for laser trimmed thick-film resistors—theoretical analysis, numerical simulation and experimental verification

In this paper a new approach to laser trimming is investigated and compared with traditional trimming. It relies on creating an additional contact for lowering resistance values thus simplifying the design and widening resistance trimming ranges. This enables to achieve a correction with shorter cut length of, so it can lead to a faster and cheaper fabrication process of hybrid integrated circuit. This paper analyses trimming range and trimming characteristics computed for different shapes of added contact using a new, very fast and easily programmable method. Moreover the experimental verification of such approach is presented. The relative trimming range and sensitivity are analyzed as a function of additional contact shape and cut length. Next long-term stability, pulse durability and low frequency noise are compared for two- and three-contact resistors versus trim pathway length.     

Band gap engineered resistor for mitigating linear energy transfer sensitivities in scaled submiron CMOS technology SRAM cells

Use of cross-coupling latch resistors is a prime method of mitigating single event upsets (SEU). Scaling has dramatically reduced ability of using this technique because of the large area needed as well as high temperature coefficient of resistance (TCR) of lightly doped polysilicon resistors. We present results of a study of the electrical properties of Al_1?xIn_xN films resistor which offers distinct advantage over polysilicon resistors. The films were grown on silicon nitride by magnetron sputter deposition at room temperature. Sheet resistance in the range of 8–10 kΩ/□ was reproducibly grown. The resistor film is thermally stable with TCR of less than minus 0.09%/°C for temperature range of minus 55 °C to +125 °C.     

A Random Trimming Approach for Obtaining High-Precision Embedded Resistors

Embedded resistors will potentially allow electronic applications to cost less and perform better. However, it is difficult to fabricate embedded resistors to the correct resistance value, so embedded resistors are often fabricated with a lower value and then trimmed to raise the resistance to the desired value. A computer simulation for the trimming process of an embedded resistor has been developed that has been verified and calibrated against experimental results. A study of embedded resistors containing random voids of varying size has been performed. A new trimming strategy in which the trims are made randomly (rather than conventional L-shaped trims) is proposed and the results of the analysis demonstrate that single-dive trimming combined with random trimming allows higher precision embedded resistors to be obtained than conventional trimming patterns.     

Characterization of polysilicon resistors in sub-0.25 μm CMOSULSI applications

The characteristics of polysilicon resistors in sub-0.25 μm CMOS ULSI applications have been studied. Based on the presented sub-0.25 μm CMOS borderless contact, both n⁺ and p⁺ polysilicon resistors with Ti- and Co-salicide self-aligned process are used at the ends of each resistor. A simple and useful model is proposed to analyze and calculate the essential parameters of polysilicon resistors including electrical delta W(ΔW), interface resistance R_interface, and pure sheet resistance R_pure . This approach can substantially help engineers in designing and fabricating the precise polysilicon resistors in sub-0.25 μm CMOS technology     

RuO_2基厚膜电阻电脉冲调阻工艺研究

用厚膜法制备了RuO2基厚膜电阻,研究了电阻值变化与脉冲电压的关系,分析了调阻工艺的特点;测量了电阻的可调整极限,目标值、偏差与初始电阻的特性,最佳阻值调整范围;研究了二次烧结对调整电阻值的影响规律。     

On the semi-insulating polycrystalline silicon resistor

The n-p neutralization reaction between phosphorus and boron incorporated in polysilicon films was investigated. A process for fabricating semi-insulating polysilicon resistors has been developed. It has been found that the I-V characteristics seem not to be so explicitly related to the resistor length as for resistors fabricated using conventional methods. The activation energies observed are from 0.24 to 0.31 eV which are very small compared with those of polysilicon resistors fabricated using conventional methods, i.e. the temperature coefficient of the semi-insulating polysilicon resistors in the present studies is significantly lowered.     

激光直写制备薄膜铂电阻技术研究

为了研究激光直写技术在制备薄膜铂电阻中的应用,采用激光直写制备了薄膜厚度为2m的铂电阻。探讨了激光直写技术制备薄膜铂电阻的原理,以条形铂电阻为例,研究了激光参量对铂电阻形状的影响,在最优的激光脉冲频率18kHz、激光扫描速率100mm/s的参量下,制备了实际电阻约为0.37的条形薄膜铂电阻,最后检验了薄膜铂电阻的电阻值。结果表明,铂电阻的宽度分别随激光脉冲频率和激光扫描速率的增大而增大;制备的电阻边缘整齐,表面平整,电阻实际值与理论值只有0.8%的相对误差,吻合很好。     

DC-18GHz微波功率薄膜电阻器的设计及制作

设计并仿真了频率范围为DC-18GHz,功率负载为20W的微波功率薄膜电阻器,根据仿真结果,采用反应磁控溅射法制备了TaN微波功率薄膜电阻器。仿真结果表明,所设计的薄膜电阻器在DC-18GHz频率范围内,电压驻波比均小于1.2,加载20W微波功率时,薄膜电阻器表面的最高温度为108℃。实验结果表明,所制备的TaN薄膜电阻器在DC-18GHz频率范围内,电压驻波比小于1.25;加载20W直流功率96小时,电阻器的阻值变化小于2%,表面最高温度为105℃;在25-125℃温度范围内电阻器的温度电阻系数为-40ppm/℃。     

Reliability of polysilicon thin film resistors with irreversible resistance transition

In this paper, the results of reliability testing (life testing at 125°C for 2000 h) and failure analysis of polysilicon thin film resistors with irreversible resistance transition are presented and discussed. The results of the life test show that electrical parameters of the polysilicon resistors (resistance before transition, transition voltage and resistance after transition) are satisfactorily stable during the life test. Also, calculated values of the mean time before failure (MTBF) and the mean time to failure (MTTF) on the basis of the life test data confirm that the polysilicon resistors have a satisfactory level of reliability for long-term applications. Finally, the results of failure analysis show that typical failure modes of the polysilicon resistors are open, while the responsible failure mechanism is electromigration of aluminum during the life test at the contact between the aluminum line and polysilicon film.     

A novel scaled-down oxygen-implanted polysilicon resistor forfuture static RAMs

A scaled-down high resistor (1 μm or less in length) for future static RAMs was realized by using slow arsenic diffusion in oxygen-implanted polysilicon, by which arsenic is partially doped to form a polysilicon interconnection layer. The current-voltage characteristics of the oxygen-doped polysilicon resistors were almost linear, and the marked decrease in resistance for higher applied voltage, observed in undoped polysilicon, was not found. The field-effect modulation of the resistance in the oxygen-doped polysilicon was much less than that of an undoped one     

用于功率放大器的随温度可调负压偏置电路

设计了一种应用于GaN功率放大器栅极调制的随温度可调负压偏置电路。电路由电压基准模块、温度传感器模块、比较器阵列以及误差放大器及其对应的功率管与反馈电阻等组成,通过基准电压与温度传感器输出电压的比较,输出数字控制信号到反馈电阻中的可变电阻模块,改变可变电阻阻值进而改变电路输出电压,实现芯片电压随温度可调。电路结构简单、易于实现、应用方便,同时电路中引入了修调电阻结构,极大提高了基准输出精度。电路芯片面积为1.10 mm×0.64 mm,采用0.5μm CMOS工艺进行了流片并完成了后期测试验证。结果表明,芯片可实现输出电压的随温度可调,有效解决了GaN功率放大器在相同的栅极偏置电压下输出功率随温度升高而减小的问题。     

High-temperature storage and thermal cycling studies of thick filmand wirewound resistors

The operating ambient temperature for underhood automotive and aerospace applications is increasing. This work was undertaken to evaluate the suitability of thick film and wirewound resistors for distributed aircraft control systems in a 200°C-225°C operating environment. High temperature stability testing of power wirewound and thick film resistors is reported. Dale power wirewound 1 Ω, 100 Ω, and 10 kΩ resistors with power ratings of 5 W and 25 W were tested. The TCR of the 100 Ω, and 10 kΩ resistors was very small, however, the 1 Ω resistor varied by 5% over the temperature range from 25°C to 300°C. Stability with long term storage (10000 h) at 300°C was measured for the wirewound resistors unpowered and powered at 20% of rated power. With the exception of the 10 kΩ/25W resistor, the change in resistance was less than 4%. Wirewound resistors were also thermal cycled 1000 times over a temperature range from -55°C to 225°C with only one failure due to a broken internal connection. Three 900 Series thick film resistor pastes from Heraeus-Cermalloy were studied: 100 Ω/sq., 1 kΩ/sq., 10 kΩ/sq. The temperature coefficient of resistance (TCR) was measured from 27°C to 500°C in 50°C increments. The change in resistance was <±6% up to 300°C. A 2 × 2 matrix of variables was included in the 300°C storage test: untrimmed resistors, resistors trimmed up 50% in value, unpowered, and powered at 1/8 W. Palladium/Silver was the initial termination choice for these 300°C studies, but silver migration under electrical bias lead to electrical shorts between conductor traces on the substrates with powered resistors. Gold terminated thick film resistors were used for powered storage testing at 300°C. The change in resistance after 10000 h at 300°C was < 3% for all test combinations