一种基于缩减伴随式集的QC-LDPC码级联译码算法

该文在研究缩减伴随式集译码(RLSD)算法和规则QC-LDPC码字结构的基础上,提出了一种新的针对中短QC-LDPC码的BP-RLSD级联译码算法。BP算法译码失败时的软输出对数信息,作为RLSD算法的输入。根据QC-LDPC码所具有的循环置换结构,给出一种根据伴随式的重量来确定候选错误模式搜索空间的算法,同时给出一种查表方法快速搜索出部分错误位置。结合接收序列的低可信度集合(LRIPs),可以实现最大似然(ML)码字的快速搜索。这些方法可以大幅减少计算时间。仿真显示该文提出的算法是有效的。与BP算法的级联译码,可以在计算复杂度和性能之间进行较好的折衷。     

系统RA码的基于WBF策略的改进BP译码算法

 针对重复累积(RA)码译码算法(BP算法和最小和算法)复杂度高或纠错性能下降的问题,将加权位翻转WBF的思想用于改进BP算法,提出了基于WBF策略的改进BP译码算法. 在每次迭代译码中若未能译出合法码字,则按一定规则进行位翻转操作,以期获得合法码字. 仿真结果表明,本算法能有效降低系统RA码的运算复杂度,且能保持优异的译码性能.     

一种简化的LDPC码BP译码算法的研究

低密度奇偶校验码(LDPC码)是一种逼近香农限的线性分组码,译码的复杂度较低;在LDPC码译码算法中性能较好的是置信传播译码(BP)算法,他能够在迭代译码过程中确定码字是否已译出,但是复杂度高,运算量大。采用一种改进的BP译码算法,在迭代译码过程中对校验节点的更新信息进行曲线拟合,以减小译码运算量,有利于硬件的并行实现,减少译码延时。仿真结果表明,改进的BP算法译码性能和原来的BP算法接近,而且复杂度较低。     

LDPC码的译码算法

介绍了LDPC(低密度奇偶校验码)码的BP算法和基于BP的简化译码算法，并在AWGN(加性白高斯噪声)环境下进行了各自的仿真。通过误码性能和译码复杂度两方面的比较表明BP算法的性能更优越，但简化算法的复杂度相对来说有大幅的下降。     

一种改进的无线光通信LDPC码译码算法

针对无线光通信中低密度奇偶校验码(LDPC)置信传播(BP)译码算法复杂度高及置信度振荡造成译码错误等缺点,基于对数BP算法提出了一种改进的译码算法。改进的译码算法在校验节点运算时,判断输入到校验节点消息的最小值与某个门限的大小,根据比较结果,分别用消息最小值或若干个最小值进行运算,在损失很少性能的情况下降低了运算复杂度;同时在比特节点采用振荡抵消处理运算,提高了算法的性能增益。最后在对数正态分布湍流信道模型下,分别对比特充分交织和交织深度为16的情况进行了仿真实验。仿真结果表明,改进的译码算法与BP算法相比,大幅度降低了计算复杂度,而且译码性能有一定的优势,收敛速度损失很少;而相对于最小和算法,改进的算法虽然译码复杂度有所增加,但误码率性能有明显的优势,并且收敛速度也优于最小和算法。因此,改进的译码算法是无线光通信中LDPC码译码算法复杂度和性能之间一个较好的折中处理方案。     

光纤通信中序列估计与纠错译码的级联的研究

使用误码率仿真的方法,比较了基于Viterbi算法(VA)的最大似然序列估计(MLSE)电色散补偿技术和低密度奇偶校验(LDPC)纠错译码技术的VA+BF译码、VA+BP译码简单级联和VA+BP译码置信级联3种级联方法。仿真结果表明,本文提出的置信级联能够有效地判断出VA给出的序列估计值是否可信,并在此基础上进行LDPC译码需要的对数似然比(LLR)信息的初始化。与简单级联方式相比,置信级联的方法能够获得更好的LDPC软译码性能,而且随着光纤传输距离的增加和码间串扰(ISI)效应的恶化,置信级联比简单级联具有更高的性能增益。     

光传输系统中一种分组Turbo码的新颖译码算法分析

基于遗传算法与Chase译码算法的各自优势,提出了一种降低运算复杂度并加快译码速度的新颖分组Turbo码(BTC)译码算法.与传统的Chase译码算法相比,该译码算法降低了译码复杂度且加快了译码速度.仿真分析表明,该算法较传统的Chase译码算法在误码率为10-6时提高了约1.15 dB的净编码增益(NCG),具有良好的纠错性能.因而它是一种适用于光传输系统且实用性较强的新颖BTC译码算法.     

4×4 V-BLAST系统分组最大似然检测算法

对于V-BLAST系统的检测,最大似然(ML)算法有着最优的性能却也有最大的计算复杂度;经典的排序连续干扰抵消(OSIC)算法复杂度较低,但数值稳定性差,且性能与ML差距较大.因此,本文基于检测性能和计算复杂度折中的思想,针对4×4 V-BLAST系统提出了一种分组最大似然(Group ML,GML)检测算法,在保证较好检测性能的基础上,通过将四维ML检测器分成两组二维ML检测器来降低计算复杂度.此外,本文还提出了一种简化的最大似然(Simpli-fled ML,SML)检测算法,通过将每组中的二维ML检测器的搜索空间从二维降至一维,进一步降低了计算复杂度,并证明其与ML算法具有一致的性能.仿真表明,在误符号率为10~(-3)时GML算法相比OSIC算法有约7dB的性能提升.经分析知.GML算法复杂度与ML-OSIC算法相比在高阶调制方式下有着显著的降低,易于硬件实现.     

IRA码最小和译码算法的改进算法

研究了重复累积(IRA)码的简化译码算法.IRA码的BP译码算法具有较高的复杂度,为了降低复杂度,首先提出将最小和算法应用于IRA码.然而,最小和算法使译码性能降低约1.2 dB.为了在复杂度和译码复杂度之间取得较好的折衷,提出了对IRA码的最小和算法的改进算法:归一化算法和偏移算法.仿真结果表明,IRA码归一化算法和偏移算法在复杂度略有增加的情况下,性能得到明显改善.     

基于MIMO系统的球形译码算法的改进

在最大似然检测中,球形译码算法是一种有效的快速算法。提出一种基于MIMO系统的新的快速球形译码算法,它的复杂度比传统的算法要小的多。在提出的方法中,初始半径的选择并不重要。这种改进算法的译码性能和复杂度由两个参数来控制。因此,该方法存在着译码性能和复杂度的均衡。通过计算机仿真,可以看到,提出改进算法的译码性能得到了较大的提高。     

对LDPC码的LLRBP算法研究

在LDPC译码时,使用IJLRBP算法其校验节点的计算复杂度十分高,而且当LDPC码中有许多的短环时,译码性能也会降低。基于以上的这些问题提出了一个新的混合校验变量过程,通过调整校验节点的处理振幅和变量节点的信息相关性来降低计算复杂度,其仿真过程表明在译码性能和运算复杂度上与LLRBP算法都有较大的提高。     

基于原型图的低码率LDPC码最小和译码算法改进方案

低密度奇偶校验(LDPC)码的译码硬件实现方案大多采用计算复杂度较低的修正最小和(NMS)算法,然而对于低码率LDPC码,由于校验节点度数低,NMS算法的修正误差较大,导致其译码性能和标准的置信传播(BP)算法相比有较大差异。该文针对基于原图构造的一类低码率LDPC码,提出了在NMS迭代译码中结合震荡抵消(OSC)处理和多系数(MF)修正技术的方案。结合低码率原型图LDPC码行重分布差异较大的特点,MF修正算法可以有效地减少计算误差,从而改善译码性能。另外低码率原型图LDPC码的收敛较慢,而OSC处理则可以较好地抑制正反馈信息,进一步提高NMS算法的性能增益。仿真结果表明,对于此类低码率LDPC码, MF-OSC-NMS算法可以达到接近BP算法的性能。OSC处理和MF修正技术硬件实现简单,与NMS算法相比几乎没有增加计算复杂度,因此MF-OSC-NMS算法是译码算法复杂度和性能之间一个较好的折中处理方案。     

LDPC编译码算法分析

低密度奇偶校验(LDPC)码是一种线性分组码,其纠错能力可以接近香农极限。针对LDPC码的编译码问题,分析了校验矩阵的构造方法。给出了LDPC码的编码算法以及算法的实现结构。分析了基于软判决的置信传播(BP)译码算法,并给出了可以进一步降低计算复杂度的简化译码方法。通过仿真对比了不同的译码算法在高斯信道下的译码性能。     

Low-Density Parity-Check Codes with 2-State Trellis Decoding

A class of low-density parity-check (LDPC) codes with a simple 2-state trellis structure is presented. For LDPC decoding, the conventional belief propagation (BP) algorithm consists of numerous sub-decoders of single-parity check codes and exchanges information between sub-decoders in an iterative manner. If the single-parity check codes can be constructed and grouped in a proper way, the decoder can be decomposed into few identical 2-state trellis decoders. Therefore, instead of numerous sub-decoders of single-parity check codes, an iterative decoding algorithm based on few sub-decoders over 2-state trellis is proposed. The proposed decoding algorithm improves the efficiency of message passing between sub-decoders and hence provides a fast convergent rate as compared to the standard BP algorithm. Simulation results show that the proposed scheme provides a better performance and a fast convergent rate as compared to those of standard BP algorithm. The result also shows that the proposed algorithm has a similar performance as that of asynchronous replica shuffled BP algorithm and has a slightly inferior performance than that of synchronous replica shuffled BP algorithm. However, complexity analysis shows that our proposed algorithm has complexity that is lower than that of the replica shuffled BP algorithm.     

Reduced-Complexity Decoding of LDPC Codes

Reduced-Complexity Decoding of LDPC Codes Various log-likelihood-ratio-based belief-propagation (LLR- BP) decoding algorithms and their reduced-complexity derivatives for low-density parity-check (LDPC) codes are presented. Numerically accurate representations of the check-node update computation used in LLR-BP decoding are described. Furthermore, approximate representation of the decoding computations are shown to achieve a reduction in complexity, by simplifying the check-node update or symbol-node update, or both. In particular, two main approaches for simplified check-node updates are presented that are based on the so-called min-sum approximation coupled with either a normalization term or an additive offset term. Density evolution is used to analyze the performance of these decoding algorithms, to determine the optimum values of the key parameters, and to evaluate finite quantization effects. Simulation results show that these reduced-complexity decoding algorithms for LDPC codes achieve a performance very close to that of the BP algorithm. The unified treatment of decoding techniques for LDPC codes presented here provides flexibility in selecting the appropriate scheme from a performance, latency, computational complexity, and memory-requirement perspective.     

Iterative reliability-based decoding of low-density parity checkcodes

In this paper, reliability based decoding is combined with belief propagation (BP) decoding for low-density parity check (LDPC) codes. At each iteration, the soft output values delivered by the BP algorithm are used as reliability values to perform reduced complexity soft decision decoding of the code considered. This approach allows to bridge the error performance gap between belief propagation decoding which remains suboptimum, and maximum likelihood decoding which is too complex to be implemented for the codes considered. Trade-offs between decoding complexity and error performance are also investigated. In particular, a stopping criterion which reduces the average number of iterations at the expense of very little performance degradation is proposed for this combined decoding approach. Simulation results for several Gallager (1963, 1968) LDPC codes and different set cyclic codes of hundreds of information bits are given and elaborated     

FPGA implementation of low complexity LDPC iterative decoder

Low-density parity-check (LDPC) codes, proposed by Gallager, emerged as a class of codes which can yield very good performance on the additive white Gaussian noise channel as well as on the binary symmetric channel. LDPC codes have gained lots of importance due to their capacity achieving property and excellent performance in the noisy channel. Belief propagation (BP) algorithm and its approximations, most notably min-sum, are popular iterative decoding algorithms used for LDPC and turbo codes. The trade-off between the hardware complexity and the decoding throughput is a critical factor in the implementation of the practical decoder. This article presents introduction to LDPC codes and its various decoding algorithms followed by realisation of LDPC decoder by using simplified message passing algorithm and partially parallel decoder architecture. Simplified message passing algorithm has been proposed for trade-off between low decoding complexity and decoder performance. It greatly reduces the routing and check node complexity of the decoder. Partially parallel decoder architecture possesses high speed and reduced complexity. The improved design of the decoder possesses a maximum symbol throughput of 92.95 Mbps and a maximum of 18 decoding iterations. The article presents implementation of 9216 bits, rate-1/2, (3, 6) LDPC decoder on Xilinx XC3D3400A device from Spartan-3A DSP family.     

基于SISO的LDPC码盲译码算法研究

针对传统BP译码算法需要初始条件的缺点,本文提出了一种基于软输入软输出(SISO)的LDPC码盲译码算法,所提算法采用类似BP迭代译码算法步骤,通过对距离信息进行迭代处理,实现无需接收信号的信噪比和信道状态即可译码;同时,还将所提盲译码算法推广到多进制LDPC码的译码应用中。本文所提盲译码算法在初始状态难以确定以及接收信号信噪比难以估计的通信信道中具有重要价值。仿真结果表明,所提算法不论是在AWGN信道还是在瑞利衰落信道上都能取得优良的性能,不论是与标准BP译码算法还是与分层BP译码算法相比,在性能相近的情况下,计算复杂度都有所降低。     

应用于40Gb/s DQPSK光通信系统的LDPC译码算法研究

针对40Gb/s差分正交相移键控(DQPSK)光通信传输系统,提出了低密度奇偶校验(low-density parity-check,LDPC)码译码算法的信息初始化公式,改进了基于置信度传播(belief propagation,BP)的译码算法,并进行了相应的数值仿真和性能分析比较,得到了兼顾性能和译码复杂度的改进型译码算法。