Reliability of 80 μm pitch flip chip attachment on flex

The interest toward flip chip technology has increased rapidly during last decade. Compared to the traditional packages and assembly technologies flip chip has several benefits, like less parasitics, the small package size and the weight. These properties emphasize especially when flip chip component is mounted direct to the flexible printed board. In this paper flip chip components with Kelvin four point probe and daisy chain test structure were bonded to the polyimide flex with two different types of anisotropically conductive adhesive films and one anisotropically conductive adhesive paste. The reliability of small pitch flip chip on flex interconnections (pitch 80 μm) was tested in 85°C/85% RH environmental test and −40↔+125°C thermal shock test. According to the results it is possible to achieve reliable and stable ohmic contact, even in small pitch flip chip on flex applications.     

Anisotropic conductive film flip chip joining using thin chips

In this study, flip chip interconnections were made on very flexible polyethylene naphthalate substrates using anisotropic conductive film. Two kinds of chips were used: chips of normal thickness and thin chips. The thin chips were very thin, only 50 μm thick. Due to the thinness of the chips they were flexible and the entire joint was bendable. The reliability properties of the interconnections established with these two different kinds of chips were compared. In addition, the effect of bending of the chip and joint area on the joint reliability was studied. Furthermore, part of the substrates was dried before bonding and the effect of that on the joint performance was investigated.The pitch of the test vehicles was 250 μm and the chips had 25 μm high gold bumps. For resistance analysis there were two four-point measuring positions in each test vehicle. For finding the optimal bonding conditions for the test vehicles, the bonding was done using two different bonding pressures, of which the better one was chosen for the final tests.Furthermore, the test vehicles were subjected to thermal cycling tests between −40 and +125 °C (half-an-hour cycle) and to a humidity test (85%/85 °C). Part of the test vehicles were bent during the tests. Finally, the structures of the joints were studied using scanning electron microscopy.     

Effect of microwave preheating on the bonding performance of flip chip on flex joint

A microwave (MW) preheating mechanism of anisotropic conductive adhesive film (ACF) has been introduced in order to reduce the bonding temperature for flip chip technology. Thermal curing of epoxy shows a very sluggish and non-uniform curing kinetics at the beginning of the curing reaction, but the rate increases with time and hence requires higher temperature. On the other hand MW radiation has the advantage of uniform heating rate during the cycle. In view of this, MW preheating (for 2/3 s) of ACF prior to final bonding has been applied to examine the electrical and mechanical performance of the bond. Low MW power has been used (80 and 240 W) to study the effect of the MW preheating. It has been found that 170 °C can be used for flip chip bonding instead of 180 °C (standard temperature for flip chip bonding) for MW preheating time and power used in this study. The contact resistance (0.015–0.025 Ω) is low in these samples where the standard resistance is 0.017 Ω (bonded at 180 °C without prior MW preheating). The shear forces at breakage were satisfactory (152–176 N) for the samples bonded at 170 °C with MW preheating, which is very close and even higher than the standard sample (173.3 N). For MW preheating time of 2 s, final bonding at 160 °C can also be used because of its low contact resistance (0.022–0.032 Ω), but the bond strength (137.3–145 N) is somewhat inferior to the standard one.     

Microwave preheating of anisotropic conductive adhesive films for high-speed flip chip on flex bonding

Anisotropic conductive adhesive film (ACF) can be preheated by microwave (MW) radiation in order to reduce the bonding time for flip-chip technology. Due to sluggish and nonuniform curing kinetics at the beginning of the curing reaction, thermal curing of epoxy is more time consuming. Therefore, MW radiation may be more effective, due to its uniform heating rate during the cycle. In this paper, MW preheating (for 1–4 sec) of ACF prior to final bonding has been applied to determine the electrical and mechanical performance of the bond. Powers of 80 and 240 W MW were used to study the effect of the MW preheating. A final bonding time of 6–7 sec can be used for flip chip on flex bonding instead of 10–15 sec (standard time for flip chip bonding) for MW preheating time and power used in this study. The contact resistance (as low as 0.01) is low in these samples, whereas the standard resistance is 0.017 ohm (bonded at 180°C for 10 sec without prior MW preheating). The shear forces at breakage were satisfactory (0.167–0.183 KN) for the samples bonded for 6–7 sec with MW preheating. This is very close and even higher than the standard sample (0.173 KN). For MW preheating power of 80 W and sweeping time of 2 sec, final bonding at 6 sec can also be used because of its low contact resistance (0.019 ohm). Scanning electron microscope (SEM) investigation of microjoints and fracture surface shows uneven distribution of conductive particles and thick bond lines in samples bonded for 5 sec (with MW preheating). Samples treated with MW radiation (80 W and 2–3 sec time) serve as evidence that well-distributed particles along with thin bond lines cause low contact resistance and high joint strength.     

Technical challenges of stencil printing technology for ultra fine pitch flip chip bumping

Stencil printing remains the technology route of choice for flip chip bumping because of its economical advantages over traditionally costly evaporation and electroplating processes. This paper provides the first research results on stencil printing of 80 and 60 μm pitch peripheral array configurations with Type 7 Sn63/Pb37 solder paste. In specific, the paste particle size ranges from 2 to 11μm with an average particle size of 6.5 μm taken into account for aperture packing considerations. Furthermore, the present study unveils the determining role of stencil design and paste characteristics on the final bumping results. The limitations of stencil design are discussed and guidelines for printing improvement are given. Printing of Type 7 solder paste has yielded promising results. Solder bump deposits of 25 and 42 μm have been demonstrated on 80 μm pitch rectangular and round pads, respectively. Stencil printing challenges at 60 μm pitch peripheral arrays are also discussed.     

Chip on paper technology utilizing anisotropically conductive adhesive for smart label applications

Smart labels are a new generation of low cost transponders consisting of a transponder chip and a flexible type of antenna. Applying a flip chip assembly technology yields a new generation of low cost radio frequency identification (RFID) system that is a paper-thin smart label. Anisotropically conductive adhesive (ACA) is utilized to attach a flip chip onto a paper substrate to form the BiStatix RFID tag. Unlike bar codes, which are passive tags, smart labels can dynamically transmit and receive information to help identify, track and route packages remotely. The concept of flipping or inverting a silicon chip to be mounted on a paper substrate offers distinct advantages and enables achieving the cost and performance goals of this new product technology.Significant process development and reliability assessment was required to develop this smart label application. This paper discusses the process development and reliability assessment that was completed to achieve a low cost flip chip on paper assembly process. The various characteristics of ACA made it an enabling technology for this smart label application. A bare (unbumped) flip chip––without a dielectric layer and conductive polymer bumps––was aligned and placed on the paper substrate with compressive force. A thin layer of anisotropically conductive adhesive was used to attach the IC chip to the conductive ink antenna on the paper substrate. The conductive adhesive underfills and cures in only seconds. Advantages of this environmentally preferred process include the elimination of additional curing processes and reduced equipment requirements as well as the reduction of total IC packaging thickness.     

Flip chip attachment on flexible LCP substrate using an ACF

In this study the reliability of a flip chip bonding process using anisotropic conductive adhesives (ACA) was evaluated. The flexible substrates used were made of liquid crystal polymer (LCP), which is an interesting new material having excellent properties for flexible printed circuit boards. The test samples were prepared using two different anisotropic conductive films (ACF) having the same fast-cure resin matrix, but different conductive particles. The reliability of the test samples was studied by accelerated environmental tests. In the constant humidity test the temperature was 85 °C and the relative humidity was 85%. The temperature cycling test was carried out between temperatures of −40 °C and 85 °C. To determine the exact time of a failure the resistance of each test sample was measured using continuous real-time measurement. A clear difference between the behaviour of the conductive particles was seen in the test. While the adhesive having polymer particles had only one failure during testing, the adhesive having nickel particles had a considerable number of failures in both tests. Cross sections of the samples were made to analyze the failure mechanisms.     

Particle on Bump (POB) technique for ultra-fine pitch chip on glass (COG) applications by conductive particles and adhesives

Chip on glass (COG) technology is widely used in liquid crystal display (LCD) modules for connecting driver ICs to the displays especially for middle and small size panels. The most common COG technology currently used in display applications is based on anisotropic conductive films (ACF). As the increasing demand in higher resolution and cost reduction, the bump pitch of the driver ICs becomes finer and finer. With the reduction of bump pitch, the current ACF based COG technology is confronted with two issues: one is the increase of the chances of open circuit; the other is the increase of the chances of forming shorts. A new approach for ultra-fine pitch chip on glass (COG) bonding, named ”Particle on Bump (POB)”, is proposed in this paper. In this technique, conductive particles are planted on the top surface of bumps of a driver IC through Au–Sn intermetallic connection. The driver IC is then assembled on the glass substrate of a LCD panel with an insulated adhesive by thermal press. The new method ensures that electrical connections are established only between bumps and corresponding pads. The Au–Sn reflow process for particle planting and corresponding COG bonding process were investigated in detail. The results showed that reliable connections were formed between particles and bumps through an Au–Sn intermetallic layer and final COG interconnections thus formed performed well in reliability tests. It is concluded that the POB technique overcomes the shortcomings of current ACF technique and has good potential to provide a viable ultra-fine pitch flip chip on glass solution for display applications.     

A study on thermal cycling (T/C) reliability of anisotropic conductive film (ACF) flip chip assembly for thin chip-on-board (COB) packages

In this work, thermal cycling (T/C) reliability of anisotropic conductive film (ACF) flip chip assemblies having various chip and substrate thicknesses for thin chip-on-board (COB) packages were investigated. In order to analyze T/C reliability, shear strains of six flip chip assemblies were calculated using Suhir’s model. In addition, correlation of shear strain with die warpage was attempted.The thicknesses of the chips used were 180 μm and 480 μm. The thicknesses of the substrates were 120, 550, and 980 μm. Thus, six combinations of flip chip assemblies were prepared for the T/C reliability test. During the T/C reliability test, the 180 μm thick chip assemblies showed more stable contact resistance changes than the 480 μm thick chip assemblies did for all three substrates. The 550 μm thick substrate assemblies, which had the lowest CTE among three substrates, showed the best T/C reliability performance for a given chip thickness.In order to investigate what the T/C reliability performance results from, die warpages of six assemblies were measured using Twyman–Green interferometry. In addition, shear strains of the flip chip assemblies were calculated using measured material properties of ACF and substrates through Suhir’s 2-D model. T/C reliability of the flip chip assemblies was independent of die warpages; it was, however, in proportion to calculated shear strain. The result was closely related with material properties of the substrates. The T/C reliability of the ACF flip chip assemblies was concluded to be dominatingly dependent on the induced shear strains of ACF layers.     

New encapsulation development for fine pitch IC devices

The continuous reduction of chip size driven by the market demand has a significant impact on circuit design and assembly process of IC packages. Shrinking chip size and increasing I/O counts require finer bond pad pitch and bond pad size for circuitry layout. As a result, serious wire deflection during transfer molding process could make adjacent wires short, and this issue becomes more critical as a smaller wire diameter has to be applied for the finer pitch wire bonded IC devices.This paper presents a new encapsulation process development for 50 μm fine pitch plastic ball grid array package. Since reduced wire diameter decreases the bending strength of bonded wires significantly, wire deflection during molding process becomes quite serious and critical. Experiments on conventional transfer molding were conducted to evaluate wire span threshold with 23.0 μm diameter gold wire. The results show that the wire span threshold is about 4.1 mm, which is much shorter than the wire span threshold of over 5.0 mm for wire with 25.4 μm diameter. Finite element analysis shows there is a significant difference in the wire deflection between 23.0 μm gold wire and 25.4 μm gold wire diameter under the same action of mold flow. A novel encapsulation method is introduced using non-sweep solution. The wire span could be extended to over 5.0 mm with wire sweep less than 1%. Reliability tests conducted showed that all the units passed 1000 temperature cycles (−55 to 125 °C) with JEDEC moisture sensitivity level 2a (60 °C/60% relative humidity for 120 h) and 3 times reflow (peak temperature at 220–225 °C). It is believed that this solution could efficiently overcome the risk of wire short issues and improve the yield of ultra fine pitch wire bonds in high-volume production.     

Studies on various chip-on-film (COF) packages using ultra fine pitch two-metal layer flexible printed circuits (two-metal layer FPCs)

Various fine pitch chip-on-film (COF) packages assembled by (1) anisotropic conductive film (ACF), (2) nonconductive film (NCF), and (3) AuSn metallurgical bonding methods using fine pitch flexible printed circuits (FPCs) with two-metal layers were investigated in terms of electrical characteristics, flip chip joint properties, peel adhesion strength, heat dissipation capability, and reliability. Two-metal layer FPCs and display driver IC (DDI) chips with 35 μm, 25 μm, and 20 μm pitch were prepared. All the COF packages using two-metal layer FPCs assembled by three bonding methods showed stable flip chip joint shapes, stable bump contact resistances below 5 mΩ, good adhesion strength of more than 600 gf/cm, and enhanced heat dissipation capability compared to a conventional COF package using one-metal layer FPCs. A high temperature/humidity test (85 °C/85% RH, 1000 h) and thermal cycling test (T/C test, ?40 °C to + 125 °C, 1000 cycles) were conducted to verify the reliability of the various COF packages using two-metal layer FPCs. All the COF packages showed excellent high temperature/humidity and T/C reliability, however, electrically shorted joints were observed during reliability tests only at the ACF joints with 20 μm pitch. Therefore, for less than 20 μm pitch COF packages, NCF adhesive bonding and AuSn metallurgical bonding methods are recommended, while all the ACF and NCF adhesives bonding and AuSn metallurgical bonding methods can be applied for over 25 μm pitch COF applications. Furthermore, we were also able to demonstrate double-side COF using two-metal layer FPCs.     

Failure mechanism of anisotropic conductive adhesive interconnections in flip chip ICs on flexible substrates

In this work we study how the endurance performance of electrically conductive adhesive interconnections of flip chip integrated circuits with a pitch of 200 and 150/spl mu/m on flexible substrates is affected by varying environmental conditions. This is accomplished by comparison of offline and online control measurements that are carried out to monitor the electrical resistance in temperature-humidity and temperature cycling stress tests. From the gradual degradation of the resistance with time and the failure analysis, it is conjectured that periodic absorption and desorption of moisture forms one of the more important failure mechanisms in this type of assembly.     

Microstructure and creep behaviour of eutectic SnAg and SnAgCu solders

The paper presents creep data, that was gained on specimens of different microstructures. The three specimen types have been flip chip solder joints, pin trough hole solder joints and standard bulk solder specimens. The bulk solder specimen was a dog-bone type specimen (diameter=3 mm, LENGTH=117 mm). The pin trough hole solder joint consisted on a copper wire that was soldered into a hole of a double sided printed circuit board (thickness 1.5 mm). The flip chip solder joint specimen consisted of two silicon chips (4 mm × 4 mm), which were connected by four flip chip joints (one on each corner). SnAg and SnAgCu flip chip bumps (footprint 200 μm × 200 μm, joint height 165–200 μm, centre diameter 90…130 μm) were created by printing solder paste.Constant–load creep tests were carried out on all three specimen types at temperatures between 5 and 70 °C. Creep data was taken for strain rates between 10⁻¹⁰ and 10⁻³ s⁻¹. The specimens were tested in “as cast” condition and after thermal storage.The microstructural properties of the bulk specimens and real solder joints were examined using metallographic sectioning, optical microscopy techniques, and SEM-microprobe analysis. The results of the microstructural analysis were related to the investigated mechanical properties of the solders. Models of SnAg3.5 and SnAg4Cu0.5, that can be used with the ANSYS FEM software package, will be presented.     

Evaluation of displacement rate effect in shear test of Sn–3Ag–0.5Cu solder bump for flip chip application

An experimental investigation was combined with a non-linear finite element analysis using an elastic–viscoplastic constitutive model to study the effect of ball shear speed on the shear forces of flip chip solder bumps. A solder composition used in this study was Sn–3mass%Ag–0.5mass%Cu. A low cost bumping process has been employed using electroless Ni and immersion Au followed by solder paste stencil printing. A thin layer of intermetallic compound, (Ni_1−xCu_x)₃Sn₄, was formed by the reaction between the solder and electroless Ni with a thickness of about 1.4 μm, while some discontinuous (Cu_1−yNi_y)₆Sn₅ particles were also formed at the interface. The compositions of the resulting compounds were identified using energy dispersive spectrometer (EDS) and electron microprobe analysis (EPMA). Shear tests were carried out over a shear speed range from 20 to 400 μm/s at a shear ram height of 20 μm. The shear force was observed to linearly increase with shear speed and reach the maximum value at the fastest shear speed in both experimental and computational results. The optimum shear speeds for the shear test of solder bumped flip chip were recommended to be not exceeding 200 μm/s. The failure mechanisms were discussed in terms of von Mises stresses and plastic strain energy density distributions.     

Effects of bonding temperature on the properties and reliabilities of anisotropic conductive films (ACFs) for flip chip on organic substrate application

The effects of bonding temperatures on the composite properties and reliability performances of anisotropic conductive films (ACFs) for flip chip on organic substrates assemblies were studied. As the bonding temperature decreased, the composite properties of ACF, such as water absorption, glass transition temperature (T_g), elastic modulus (E′) and coefficient of thermal expansion (α), were improved. These results were due to the difference in network structures of cured ACFs which were fully cured at different temperatures. From small angle X-ray scattering (SAXS) test result, ACFs cured at lower temperature, had denser network structures. The reliability performances of flip chip on organic substrate assemblies using ACFs were also investigated as a function of bonding temperatures. The results in thermal cycling test (−55 °C/+150 °C, 1000 cycles) and PCT (121 °C, 100% RH, 96 h) showed that the lower bonding temperature resulted in better reliability of the flip chip interconnects using ACFs. Therefore, the composite properties of cured ACF and reliability of flip chip on organic substrate assemblies using ACFs were strongly affected by the bonding temperature.     

A new COG technique using low temperature solder bumps for LCD driver IC packaging applications

A new chip on glass (COG) technique using flip chip solder joining technology has been developed for excellent resolution and high quality liquid crystal display (LCD) panels. The flip chip solder joining technology has several advantages over the anisotropic conductive film (ACF) bonding technology: finer pitch capability, better electrical performance, and easier reworkability. Conventional solders such as eutectic Pb-Sn and Pb-5Sn require high temperature processing which can lead to degradation of the liquid crystal or the color filter in LCD modules. Thus it is desirable to develop a low temperature process below 160/spl deg/C using solders with low melting temperatures for this application. In our case, we used eutectic 58 wt%Bi-42 wt%Sn solder for this purpose. Using the eutectic Bi-Sn solder bumps of 50-80/spl mu/m pitch sizes, an ultrafine interconnection between the IC and glass substrate was successfully made at or below 160/spl deg/C. The average contact resistance of the Bi-Sn solder joints was 19m/spl Omega/ per bump, which is much lower than the contact resistance of conventional ACF bonding technologies. The contact resistance of the underfilled Bi-Sn solder joints did not change during a hot humidity test. We demonstrate that the COG technique using low temperature solder joints can be applied to advanced LCDs that lead to require excellent quality, high resolution, and low power consumption.     

SMT-compatibility of adhesive flip chip on foil interconnections with 40-/spl mu/m pitch

The manufacturing and reliability of a novel type of first-level interconnections is described. Anisotropic conductive and nonconductive adhesives are used to electrically bond flip chip ICs with a pitch of 60 and 40 /spl mu/m to flexible substrates. Analyses cover the initial state of the samples as well as their performance in the JEDEC moisture sensitivity level assessment and subsequent life testing. From the different behavior of the two types of adhesives a failure mechanism issues for the reflow-soldering test.     

Inkjettable conductive adhesive for use in microelectronics and microsystems technology

Ink jet is an accepted technology for dispensing small volumes of material (50–500 picolitres). Currently traditional metal-filled conductive adhesives cannot be processed by ink jetting (owing to their relatively high viscosity and the size of filler material particles). Smallest droplet size achievable by traditional dispensing techniques is in the range of 150 μm, yielding proportionally larger adhesive dots on the substrate. Electrically conductive inks are available on the market with metal particles (gold or silver) <20 nm suspended in a solvent at 30–50 wt%. After deposition, the solvent is eliminated and electrical conductivity is enabled by a high metal ratio in the residue. Some applications include a sintering step. These nano-filled inks do not offer an adhesive function. Work reported here presents materials with both functions, adhesive and conductive. This newly developed silver filled adhesive has been applied successfully by piezo-ink jet and opens a new dimension in electrically conductive adhesives technology.The present work demonstrates feasibility of an inkjettable, isotropically conductive adhesive in the form of a silver loaded resin with a two-step curing mechanism: In the first-step, the adhesive is dispensed (jetted) and precured leaving a ‘dry’ surface. The second step consists of assembly (wetting of the 2nd part) and final curing.     

Anisotropic conductive adhesives with enhanced thermal conductivity for flip chip applications

This paper presents the development of new anisotropic conductive adhesives (ACAs) with enhanced thermal conductivity for improved reliability of adhesive flip chip assembly under high current density condition. As the bump size in the flip chip assembly is reduced, the current density through the bump also increases. This increased current density causes new failure mechanisms, such as interface degradation due to intermetallic compound formation and adhesive swelling resulting from high current stressing. This process is found especially in high current density interconnection in which the high junction temperature enhances such failure mechanisms. Therefore, it is necessary for the ACA to become a thermal transfer medium that allows the board to act as a new heat sink for the flip chip package and improve the lifetime of the ACA flip chip joint. We developed the thermally conductive ACA of 0.63 W/m·K thermal conductivity by using a formulation incorporating the 5-μm Ni-filled and 0.2-μm SiC-filled epoxy-based binder system. The current carrying capability and the electrical reliability under the current stressing condition for the thermally conductive ACA flip chip joints were improved in comparison to conventional ACA. This improvement was attributed to the effective heat dissipation from Au stud bumps/ACA/PCB pad structure by the thermally conductive ACA.     

Single chip bumping and reliability for flip chip processes

Processes of bump deposition based on mechanical procedures together with their reliability data are summarized in this paper. The stud bumping of gold, palladium, and solder is described and also a novel bumping approach for fine pitch solder deposition down to 100 μm pitches using thermosonic bonding on a modified wedge–wedge bonding machine. This wedge bumping doesn’t require a wire flame-off process step. Because of this, no active atmosphere is necessary. The minimum pad diameter which can be bumped using the solder wedge bumping is 50 μm, up to now. This bumping process is highly reproducible and therefore well-suited for different flip chip soldering applications. Palladium stud bumps provide a solderable under bump metallization. Results from aging of lead/tin solder bumps on palladium are shown. The growth of intermetallics and its impact on the mechanical reliability are investigated.