共查询到19条相似文献,搜索用时 109 毫秒
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数据信道调度是OBS核心路由器的关键技术之一,文章对数据信道的几种调度算法进行了分析.在此基础上,介绍了一种改进的波长调度算法.网络仿真结果表明,该算法可以有效改善网络性能. 相似文献
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本文分析了目前制播网IP化边缘调度和核心调度的几种方案,并研究一种基于通用交换机实现无压缩媒体流无阻塞调度的实现方法。同时探讨交换机和路由器混合组网的可能性,在得到路由器制播网优势特性的同时,降低整体成本。以SDN集中管控方式实现IP媒体流的无阻塞、逐流调度,为中小型演播室、转播车、外场制播等应用场景提供一种新的IP信号调度交换组网方案。 相似文献
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面向虚拟路由器的基于历史转发开销的资源调度算法 总被引:1,自引:0,他引:1
通过研究以Xen为代表的虚拟工具中资源调度算法,得知它们无法保证虚拟路由器中资源共享的公平性。该文提出一种基于历史转发开销的资源调度算法,用来确保路由器实例占用资源的公平性,尤其物理平台的输入/输出(I/O)资源。该算法通过统计路由器实例最近的报文转发开销来计算出路由器实例调度的优先级,确保平均吞吐量较低的路由器实例获得被调度的机会。同时,该算法通过设置优先级计算公式中处理延迟的值,达到对延迟敏感强的路由器实例的支持,以及通过预测报文处理时间决定待处理报文是否丢弃,避免不必要的系统开销。通过实验测试,相对于Credit算法,该文算法在确保虚拟路由器资源共享的公平性方面存在明显优势,并且能为延迟敏感的路由器实例提供支持。 相似文献
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未来网络体系结构创新和验证亟需建设虚拟化网络实验平台,虚拟路由器作为其中的核心组网设备,其结构和性能决定了实验平台的灵活性和承载能力.本文提出基于并行流水线的虚拟路由器数据平面结构,结合并行包分类和异步多指针轮询调度机制,在同一物理底层上实现了多个相互隔离的并行异构路由器.本设计在可编程硬件上进行了原型实现,并结合商用及软件路由器在真实的网络环境中部署、测试与实验.实验结果表明与传统单流水线结构相比,本设计能以更高灵活性和并行性支持异构的路由器实例独立运行;在逻辑资源开销和延时特性未显著增加的情况下,并行虚拟路由器可以达到与硬件可比的线速转发能力. 相似文献
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《Latin America Transactions, IEEE (Revista IEEE America Latina)》2007,5(6):417-424
In this paper we present a study about the utilization of one-way delay measurements to detect and characterize network congestion in the european Internet. The experiments have been made using the ETOMIC platform that allows one-way delay measurement with high precision timestamps. We have found a peculiar router behaviour in which the bottleneck is not the available bandwidth but it is the packet processing power of the router (backplane and CPU constraints). This router has been characterized with several network parameters. Some of them are the dependency of this limitation with the input data rate in packets per second, the size of burst packet losses measured in packets or time and the absence of specific scheduling algorithms in the router that could affect to larger flows. 相似文献
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Deficit round-robin scheduling for input-queued switches 总被引:3,自引:0,他引:3
We address the problem of fair scheduling of packets in Internet routers with input-queued switches. The goal is to ensure that packets of different flows leave a router in proportion to their reservations under heavy traffic. First, we examine the problem when fair queuing is applied only at output link of a router, and verify that this approach is ineffective. Second, we propose a flow-based iterative deficit-round-robin (iDRR) fair scheduling algorithm for the crossbar switch that supports fair bandwidth distribution among flows, and achieves asymptotically 100% throughput under uniform traffic. Since the flow-based algorithm is hard to implement in hardware, we finally propose a port-based version of iDRR (called iPDRR) and describe its hardware implementation. 相似文献
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Deo Prakash Vidyarthi Mohammad Anbar 《International Journal of Network Management》2011,21(2):120-129
Providing good quality of service (QoS) in cellular IP networks is an important requirement for performance improvement of the cellular IP network. Resource reservation is one of the methods used in achieving this goal and is proven to be effective. The main resources to be reserved in a cellular IP network are bandwidth, buffer and central processing unit (CPU) cycles. Router CPU cycle is the time taken by the router to process the packet of the flow before forwarding it to the next router (hop). This paper proposes a model for CPU cycle optimization of routers for real‐time flows in a cellular IP network. The model applies both genetic algorithm (GA) and particle swarm optimization (PSO) as soft computing tools to optimize the CPU cycles and reduces the flow processing time at each router in the route taken by a flow. Simulation experiments illustrate a comparative study of the model. 相似文献
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K. Vimala Devi K. M. Mehata S. Radhakrishnan 《International Journal of Network Management》2009,19(1):57-74
Active networks provide a programmable user–network interface that supports dynamic modification of the network's behavior. Network nodes, in addition to forwarding packets, perform customized computation on the messages flowing through them. Resources in an active network mainly consist of CPU and bandwidth. The inherent unpredictability of processing times of active packet poses a significant challenge in CPU scheduling. It has been identified that prior estimation of the resource requirements of a packet is very difficult since it is platform dependent and also depends on processing load at the time of execution, operating system scheduling, etc. An efficient allocation is required for the optimal utilization of resources. In this paper, resources are estimated using prediction techniques such as single exponential smoothing (SES), adaptive‐response‐rate single exponential smoothing (ARRSES) and Holt's two‐parameter estimation models. The estimated results agreed most with the actual requirements. The estimation models were compared with model criteria. An algorithm was also designed for the allocation of resources. Effectiveness of the algorithm was measured through simulation and achieved almost perfect fairness for all flows and also provided much superior delay guarantees under a highly dynamic environment. Copyright © 2008 John Wiley & Sons, Ltd. 相似文献
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为了改进目前IP路由器的可扩展性和灵活性等特点,研究基于开放可编程的新一代路由器架构.介绍了控制和转发相分离的ForCES协议框架和Intel IXA结构,提出了一种基于网络处理器IXP2400并支持ForCES协议的开放可编程的路由器框架.详细地分析了转发件中Xscale层的设计和实现.在此基础上设计了相应的测试平台,实验结果表明了这种路由器框架的可行性. 相似文献
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Trimedia is a family of programmable multimedia processors from the Trimedia product group of Philips Semiconductors. This architecture is based upon a high-performances VLIW CPU core. TM-1000 is the first product from a family of multimedia processors based upon the Trimedia architecture. TM-1000 is designed to concurrently process video, audio, graphics, and communication data. TM-1000 consists of a high-performance VLIW-based CPU core, large instruction and data caches, main memory interface, and video, audio and communication related peripherals. TM-1000 is a multimedia system on a chip: high-quality video and audio applications can be implemented in TM-1000 using high-level languages such as “C” and “C++”. The authors mainly focus on the VLIW CPU architecture 相似文献