TD-LTE系统DRX跨层优化视频传输机制的研究

为解决TD-LTE系统中视频传输的功耗效率和实时性问题,提出了一种保证QoS的基于预测功能的基站架构和视频传输非连续接收(DRX)跨层优化算法。通过在基站架构中添加预测功能块,并结合对视频帧尺寸信息的建模、参数估计和预测,实现DRX周期的优化,在减小功耗的同时保证视频传输的实时性。通过大量的模拟,仿真结果证明可以在省电和视频传输质量两者之间权衡找到最佳工作区域,节省终端设备约40%~70%的功率。     

电信C网基站传输网络优化探讨

中国电信承接C网业务后,c网基站传输网络做为基站传输系统的主要组成部分,随着传输技术的发展和3G基站建设需要,C网基站传输大量采用了MSTP传输设备,为保证C网基站传输的安全性、可靠性,基站传输网络的优化就显得格外重要,本文主要探讨多种基站传输优化的常用方法。     

星地融合网络中基于层分复用的广播和单播传输鲁棒波束赋形

星地融合网络(STIN)为解决下一代无线通信中地面基站存在的覆盖范围约束和频谱短缺瓶颈提供一种有效架构。针对该融合网络中下行广播和单播单独传输性能受限问题，该文建立基于服务质量(QoS)约束的最小化传输功率优化模型，提出基于层分复用(LDM)的鲁棒联合波束赋形传输方案。且根据最差情况准则，采用S-Procedure及半正定松弛(SDR)方法将具有无穷维约束的鲁棒优化问题转化为具有线性矩阵不等式(LMI)的确定性优化形式，并提出一种基于罚函数的迭代算法求解该问题。仿真结果表明，所提方案在传输功耗方面比传统正交时分复用(TDM)传输方案降低约6 dBm，且用户平均速率相较于非协作传输方案提升明显。     

绿色基站解决方案与实现技术

基站功耗是无线通信系统功耗的主体。基站绿色节能解决方案是无线网络绿色节能的首要目标。基于绿色基站解决方案涉及基站架构、基站形态、绿色基站节能技术及绿色站点应用等多个方面,文章提出绿色基站解决方案,探求基站节能降耗的有效途径。     

TD-LTE系统下的DRX过程的改进与实现

随着移动终端业务的丰富以及智能手机的普及,移动终端电池的续航能力在成为业界关注热点的同时也遇到了严峻的挑战.在LTE系统无线高层协议中,为进一步支持多种业务和大量数据的传输,DRX(非连续接收)机制作为降低终端功耗的重要方法被引入.本文不仅详细描述了DRX在空闲状态和连接状态下的不同原理和机制,而且给出了相应的实现流程与算法,并在此基础上优化了连接态下的DRX算法,从而避免了因无效配置造成的信令开销增大等问题.最后根据不同业务的特性,给出了DRX机制在不同移动业务中的实现,从而更好地改善了终端能耗和信令开销等性能.     

基于Web架构的视频监控系统研究与实现

为了实现视频监控的实时传输和网络控制功能,提出基于Web架构拓扑控制的视频监控系统。该系统分为三层体系结构,分别为感知控制层、网络传输层和应用服务层。采用自适应差分调制技术进行视频的量化编码,设计优化的视频编码算法降低视频传输延时和保证良好的输出品质。采用集中式拓扑和分布式拓扑相结合的方式进行视频监控多媒体拓扑控制,构建Web服务器的信令,进行服务器结构优化设计,在RTP协议栈下进行Web视频监控系统的API接口设计,实现视频监控的输出控制。实验结果表明,该系统能提高监控视频传输的保真率,丢包率较低,输出延时较小,保证了视频监控输出的质量和实时性。     

视频流报文优化的实时视频传输带宽探测方法

传统无线网络呈现高度波动变化的可用带宽和延迟,当视频流报文的发送速率超过可用带宽时,可能会使得视频帧延迟变大,从而导致视频质量下降。本文提出了一种基于视频流报文优化的带宽测量方法,不会导致添加额外流量,而是通过将视频帧作为探测序列传入网络中,主动实时测量可用带宽,使用线性滤波器对未来容量进行预测。为保证视频传输的低时延,避免发生拥塞,本文进一步提出了主动拥塞控制的速率自适应方法,解决了在视频传输时测量带宽导致的链路拥塞问题。经过半实物平台的仿真测试,本文提出的算法在实时视频传输时可以进行有效的带宽探测,颗粒度更小。     

面向5G-A的无线网络节能关键技术

建立网络能耗模型，对基站在数据发送状态、接收状态、休眠模式及模式转换的相对功耗进行建模，可以评估各种网络节能技术的节能增益。面向5G-A，从时域、空域、频域和功率域等方面，研究包括公共信号轻量化设计、极简小区架构、小区不连续发送/接收模式、基站唤醒机制、节能测量上报增强等网络节能的关键技术，使能更动态、高效、精准的无线传输，并通过终端和基站间信息交互的方式提升节能效果。随后，仿真验证了这些技术的正确性和有效性。     

5G上行带宽探测与应用研究

提出了一种5G上行带宽探测与应用的方案,能够有效解决视频监控数据在5G网络传输过程中遇到的网络波动问题,助力5G视频监控应用的实际落地部署。该方案在终端侧获取5G基站的无线资源调度信息,通过统计传输资源,估算出上行带宽变化趋势,结合流媒体应用的智能编码技术和码流自适应技术,在损失一定视频清晰度的代价下,保证视频不卡顿、画面连续,保障客户的整体感知。该方案可以广泛应用在校园视频监控等5G公共业务多、网络波动大、覆盖范围广的场景。     

多级缓存架构CDN在融合媒体互动直播中的时延分析及应用

网络互动直播、4K高清视频的大规模应用导致传输流量需求急速增加,现有网络流量的局限性有时无法保证直播流的稳定传输,画面延迟抖动问题造成用户不良体验.基于此,本文提出了多级缓存CDN架构模型,研究了其上的时延变量因素,并通过设计优化实验,推导出时延变量最优值,用在实际的互动直播活动,传输质量提升显著,在一定程度上满足了直...     

Efficient 45nm ASIC Architecture for Full-Search Free Intra Prediction in Real-Time H.264/AVC Decoder

The standard H.264/AVC Intra frame encoding process has several data dependent and computational intensive coding methodologies that limit the overall encoding speed. It causes not only a high degree of computational complexity but also an unacceptable delay especially for the real-time video applications. Based on DCT properties and spatial activity analysis, low power hardware architecture for high throughput Full-Search Free (FSF) Intra mode selection and direction prediction algorithm is proposed. The FSF Intra prediction Algorithm significantly reduces the computational complexity and the processing run-time required for the H.264/AVC Intra frame prediction process. The ASIC implementation for the proposed architecture is carried out and synthesizing results are obtained. The heavily tested 45nm ASIC design is able to achieve an operating frequency of 140 MHz while limiting the overall power consumption to 9.01 mW, which nominates our proposed FSF Intra prediction architecture for interactive real-time H.264/AVC mobile video decoders.     

Predictive dynamic bandwidth allocation for efficient transport ofreal-time VBR video over ATM

This paper presents a novel approach to dynamic transmission bandwidth allocation for transport of real-time variable-bit-rate video in ATM networks. Video traffic statistics are measured in the frequency domain. The low-frequency signal captures the slow time-variation of consecutive scene changes while the high-frequency signal exhibits the feature of strong frame autocorrelation. Our queueing study indicates that the video transmission bandwidth in a finite-buffer system is essentially characterized by the low-frequency signal. We further observe in typical JPEG/MPEG video sequences that the time scale of video scene changes is in the range of a second or longer, which localizes the low-frequency video signal in a well-defined low-frequency band. Hence, in a network design it is feasible to implement dynamic allocation of video transmission bandwidth using on-line observation and prediction of scene changes. Two prediction schemes are examined: recursive least square method and time delay neural network method. A time delay neural network with low-complexity high-order architecture, called “pi-sigma network,” is successfully used to predict scene changes. The overall dynamic bandwidth-allocation scheme presented is shown to be promising and practically feasible in obtaining efficient transmission of real-time video traffic     

小型化高清视频压缩传输系统设计

针对炮射/弹载微小型飞行器有效空间对任务载荷的要求,设计了一种以DM368为核心处理器的低功耗高清视频压缩传输系统。依赖DM368内嵌的视频协处理器,对开源高清视频编码器X264进行移植优化,使得系统具有功耗低、处理延迟小等优势,编码延时缩短了66%,为实时传输战场图像提供了一种有效解决途径。     

基于OMAP4460低带宽无线传输控制的设计与实现

移动监控系统面临功耗低、体积小、实时性强和带宽低的要求,提出了基于OMAP4460平台实现高清码流的实时传输和显示,采用低码率传输算法解决恶劣环境下的图像抖动和时延问题。充分利用OMAP4460功耗低、体积小的特性,双核架构的ARM核完成系统管理和控制,DSP核进行编解码发挥传输算法的网络友好性优势。实验结果表明,基于OMAP4460设备能在低带宽无线通道中,获得低时延、较小丢包率的音视频质量,实现低带宽下媒体流的流畅播放和实时性的要求。     

A 212 MPixels/s 4096 $times$ 2160p Multiview Video Encoder Chip for 3D/Quad Full HDTV Applications

Multiview video coding (MVC) plays an important role in a 3-D video system. In addition, the resolution of HDTV is increasing to present more vivid perception for users. To realize real-time processing of dozens of TOPS, VLSI solution is necessary. However, ultra high computational complexity, a large amount of external memory bandwidth and on-chip SRAM size, and complex MVC prediction structures are three main design challenges of implementation of MVC hardware architecture. In this paper, an MVC single-chip encoder is proposed for H.264/AVC Multiview High Profile and High Profile for 3-D and quad full high definition (QFHD) TV applications, respectively. The 4096 × 2160 p multiview video encoder chip is implemented on a 11.46 mm² die with 90 nm CMOS technology. An eight-stage macroblock pipelined architecture with proposed system scheduling and cache-based prediction core supports real-time processing from one-view 4096 × 2160 p to seven-view 720 p videos. The 212 Mpixels/s throughput is 3.4 to 7.7 times higher than previous work. The 407 Mpixels/W power efficiency is achieved, and 94% on-chip SRAM size and 79% external memory bandwidth are saved by the proposed techniques.     

基于SOPC的双目视频采集及显示系统设计

针对双目视频传输数据量大、实时性及同步性要求严的问题,给出了一种以SOPC为核心的双目同步视频采集及显示系统设计实例.采用软硬件协同设计的方法,将视频采集控制器、视频输出控制器及DMA控制器集组成数据传输快速通道集成在SOPC中,并结合OpenCV开发上位机应用软件.结果证明,该设计方法在保证双目视频数据同步性和实时性的同时,极大的提升了系统集成度,并降低了设计复杂度,具有较高的实用价值.     

Visual Hysteresis Based Dynamic Interference Shaping for Real-Time Video Services in Dense Deployed Cellular Networks

Due to the dense deployed base stations and the growing traffic of best effort (BE) services, frequent bursty interference becomes one of major challenges to assure quality of experience (QoE) for real-time video services. Considering those situations, a novel dynamic interference shaping method has been proposed in this paper, to assure the QoE for real-time video services. Firstly, to evaluate the quality impairment induced by bursty interference, we proposed a new QoE prediction model with content-adaptive and hysteresis effect. Secondly, the cellular interference traffic model is proposed in the framework of interference shaping. By this traffic model, the interference characteristic of best effort services is analyzed and the rate scaling factor (RSF) is introduced to adjust the transmission power of BE service, thus to neutralize the interference of real-time video service. Finally, the utility function with QoE for real-time video services and BE services is presented, and we utilize particle swarm optimization method to obtain the optimal RSF. Simulation results show that proposed method greatly improves QoE for real-time video services.     

AVS编码器中帧内预测模块的硬件设计

根据AVS标准中帧内预测算法的特点,提出了一种应用于AVS高清实时编码器的帧内预测硬件设计方案.该设计中将亮度和色度预测共用一个预测单元,采用6路数据并行流水处理的结构,提高了处理速度.同时在分析AVS帧内预测各模式算法的基础上,结合移位寄存器操作实现各模式运算单元的进一步资源共享,简化了参考数据选择机制,减少资源消耗.实验结果表明,该设计完全能够满足高清视频图像(1 920×1 080,30 f/s(帧/秒))实时编码要求.     

Modification and implementation of an edge-based fast intra prediction mode decision algorithm for H.264/AVC high resolution real-time systems

In this paper, we propose an architecture for H.264/AVC fast intra-prediction-mode decision making in high resolution real-time applications. Intra-prediction-mode decision making requires many computations of H.264/AVC video coding, and also extra time for mode generation for intra prediction mode decisions. Hence, there exists a bottleneck in the execution of high resolution real-time applications. To improve the operation of intra prediction mode decision, we use an algorithm which, based on the edge information of an object, will reduce estimations of mode predictions by 66%; with negligible loss of video quality and a small increase in bit-rate of video stream. We propose a low cost architecture, with gate counts reduced by 50% compared with former design. The total gate count is 86,671 and the maximum operating frequency is 250 MHz using TSMC 0.18 μm cell-based technology. The experimental results show our design is a strong competitor with most modern high resolution, real-time video processing.     

Low complexity distributed video coding

ContextConventional video encoding is a computationally intensive process that requires a lot of computing resources, power and memory. Such codecs cannot be deployed in remote sensors that are constrained in terms of power, memory and computational capabilities. For such applications, distributed video coding might hold the answer.ObjectiveIn this paper, we propose a distributed video coding (DVC) architecture that adheres to the principles of DVC by shifting the computational complexity from the encoder to the decoder and caters to low-motion scenarios like video conferencing and surveillance of hallways and buildings.MethodThe architecture presented is block-based and introduces a simple yet effective classification scheme that aims at maximizing the use of skip blocks to exploit temporal correlation between consecutive frames. In addition to the skip blocks, a dynamic GOP size control algorithm is proposed that instantaneously alters the GOP size in response to the video statistics without causing any latency and without the need to buffer additional frames at the encoder. To facilitate real-time video delivery and consumption, iterative channel codes like low density parity check codes and turbo codes are not used and in their place a Bose–Chaudhuri–Hocquenghem (BCH) code with encoder rate control is used.ResultsIn spite of reducing the complexity and eliminating the feedback channel, the proposed architecture can match and even surpass the performance of current DVC systems making it a viable solution as a codec for low-motion scenarios.ConclusionWe conclude that the proposed architecture is a suitable solution for applications that require real-time, low bit rate video transmission but have constrained resources and cannot support the complex conventional video encoding solutions.Practical implicationsThe practical implications of the proposed DVC architecture include deployment in remote video sensors like hallway and building surveillance, video conferencing, video sensors that are deployed in remote regions (wildlife surveillance applications), and capsule endoscopy.