太阳电池用多晶硅及其吸杂研究现状

综述了几类主要的太阳电池用多晶硅及其吸杂研究现状.评述了当前太阳电池领域涉及到的几类多晶硅如铸造多晶硅、冶金法多晶硅、西门子法多晶硅等的优缺点.详细描述了多晶硅的吸杂类型、吸杂过程、吸杂影响因素等.给出了本课题组关于冶金法多晶硅吸杂实验的一些初步研究结果.展望了多晶硅及其吸杂技术的发展.     

多孔硅的制备及其吸杂处理对电学性能的影响

多孔硅吸杂是减少晶体硅中杂质和缺陷,提高太阳能电池转换效率的有效方法。采用电化学腐蚀方法在单晶硅片上制备多孔硅,通过观察多孔硅的形貌、结构及单晶硅片的电阻率变化,研究不同电流密度制备的多孔硅对吸杂效果的影响,并从多孔硅的结构出发探究多孔硅吸杂的机理。结果表明,随电流密度增加,孔隙率明显增加,多孔硅在电流密度为100mA/cm2时,孔隙率最大;电流密度越大,多孔硅伴随所产生的弹性机械应力增加,晶格常数相应增加,这两个因素都有利于缺陷和金属杂质在多孔硅层-基底界面处迁移和富集,导致单晶硅吸杂后电阻率增大。     

多晶硅/氧化硅/多晶硅非平面结构中Fowler-Nordheim隧穿及氧化层退化研究(英文)

Fowler-Nordheim隧穿被广泛应用于EEPROM和闪存中的擦除操作。多晶硅到多晶硅的F-N隧穿具有较高的隧穿效率。本论文基于分栅闪存存储器的结构,对于多晶硅/隧穿氧化层/多晶硅非平面结构的F-N隧穿及其引起的氧化层退化进行了研究。相比于平面结构,非平面结构显示出更高的F-N隧穿效率,且隧穿效率还可通过降低氧化层厚度或者增加预热氧化处理的方法进一步提高。较低的F-N隧穿电流密度显示出较慢的隧穿氧化层退化速率。降低氧化层厚度或者增加热氧化处理也可减缓隧穿氧化层的退化。另外,论文还讨论了研究结果对于改善分栅闪存擦除特性以及耐久性的意义。     

Nb掺杂对Ti-Al合金化层抗高温氧化性能的影响

为提高钛合金TC4的抗高温氧化性能,采用激光表面合金化技术在钛合金表面制备不同Nb掺杂量的Ti-Al合金化层。采用X射线衍射仪(XRD)、扫描电子显微镜(SEM)、能谱仪(EDS)、箱式电阻炉等对合金化层的组织结构和高温氧化行为进行分析测试。结果表明,合金化层主要组成物相为TiAl以及少量的Ti_3Al相。Nb主要以置换溶质原子的形式固溶于合金化层中。合金化层组织均匀,与基体呈典型的冶金结合,在不含Nb的Ti-Al合金化层中发现大量的表层裂纹及少量的贯穿性裂纹,而在Nb掺杂的合金化层中未发现明显的宏观裂纹。合金化层在800℃保温1000h的氧化增重显著低于基体,表现出优异的抗高温氧化性能。相比而言,随着Al含量和Nb掺杂量的提高,合金化层的抗高温氧化能力也随之提高。Nb掺杂提高Ti-Al合金化层抗高温氧化性能的作用机理包括减少TiO_2中的空位缺陷、细化氧化物颗粒及促进Al_2O_3的形成。     

多晶硅扩散氧化层对太阳电池性能的影响

重点研究了多晶硅扩散氧化层对电池性能的影响,并对大规模生产多晶硅扩散工艺进行了优化研究。采用少子寿命测试仪分析了扩散前后的硅片少子寿命,发现当扩散氧化时的干氧流量控制在2800sccm,扩散后的方块电阻控制在60～70Ω/□时,扩散后硅片少子寿命最高达到了10.45μs,与扩散前的硅片少子寿命相比延长了5倍多;此时的太阳电池并联电阻和短路电流分别高达40.4Ω和8522mA,光电转换效率也由16.69%(干氧流量2000sccm)提高到了16.83%。此外,主要针对扩散氧化层对片内方阻均匀性及少子寿命的影响做了解释。     

镍基单晶合金高温氧化的动力学特征

通过对镍基单晶合金高温氧化后的组织结构观察和内氧化层深与循环氧化质量变化动力学曲线的测定，研究了合金的高温氧化特性，结果表明：在大气环境条件下，无保护涂层合金发生明显的氧化和内氧化；在近异形大颗粒内氧化物处于现贫Al区，使区内γ′强化相消失，内氧化层的深度随时间的变化服从抛物线规律。外加拉伸应力使内氧化加剧，在循环氧化初期，由于形成以Al为主的氧化膜易剥落，质量变化动力学曲线表现出较快的减重趋势，合金在20－80h的循环变化期间，在1040℃和1070℃分别呈较缓的增，减重趋势。     

超大规模集成电路硅片的内吸杂

介绍了吸杂的分类与效果以及内吸杂工艺，并综述了金属在硅中的性质，主要阐明了乳在内吸杂中的作用，简述了氮对吸杂的影响，并讨论了内吸杂的物理机理。最后探讨了今后吸杂的发展方向。     

Al4SiC4陶瓷的高温抗氧化性能和高温力学性能的研究

对Al4SiC4陶瓷的高温抗氧化性能及高温力学性能进行了研究.结果表明,Al4SiC4陶瓷具有优良的高温抗氧化性能,其高温氧化动力学符合抛物线氧化规律.氧化层由三层构成:致密的外氧化层,具有较大孔洞的内氧化层和具有较多细小孔洞的反应层.该陶瓷显示了独特的高温弯曲强度特性,即在1000～1300℃的测试温度范围内,Al4SiC4陶瓷的高温弯曲强度随温度的升高而升高.1300℃时其值为449.73MPa,与室温弯曲强度(297.10 MPa)相比,其增幅为50%左右.     

工业纯钛TA1的高温摩擦与磨损行为

工业纯钛(TA1)表面塑性剪切抗力较低且氧化膜保护作用有限,在滑动摩擦时会产生严重的磨损行为。经高温氧化处理的TA1圆盘试样通过高温摩擦磨损试验机以及扫描电镜(SEM)和能谱(EDS)分析,研究实验温度、氧化膜及富氧α层对TA1摩擦磨损行为的影响规律。结果表明,由于磨屑的润滑作用,在相同的载荷和磨损时间下,有氧化层TA1的摩擦因数范围在0.07~0.3,无氧化层TA1摩擦因数范围在0.55~0.9之间。摩擦磨损实验温度越高,有氧化层的TA1摩擦处的犁沟形貌分布越多、越深。对于无氧化层TA1试样,随温度升高和对磨时间的延长,裂纹更易扩展形成剥层磨损。TA1材料的主要磨损方式为剥层磨损、黏着磨损以及氧化磨损,无氧化膜及富氧α层的TA1材料黏着磨损更为严重。表面硬度和磨损机制不同造成高温下摩擦磨损性能的差异。     

FeCrAl-ODS合金的高温水蒸气氧化行为

目前有关FeCrAl-ODS钢在高温水蒸汽下的氧化过程中氧化膜结构的演变少有分析研究.以FeCrAl-ODS合金为研究对象,采用XRD、SEM、EPMA、EDS等分析手段,在700～1100℃条件下开展了高温水蒸气氧化试验,从氧化动力学和氧化层结构形貌、物相、成分等方面研究了其高温水蒸气氧化行为.研究结果表明:在700...     

多晶硅微构件拉伸破坏特性的测量

硅表面工艺是微型机械制造的重要工艺。而多晶硅是表面工艺中的主要结构层,它的机械特性直接关系到微型机电系统的可靠性和使用寿命,因此对其破坏特性的研究是非常必要的。本文在描述了国外对体硅工艺和表面工艺形成的材料破坏特性研究情况的基础上,提出了利用旋转台对表面工艺形成的多晶硅微粱进行拉伸破坏实验的方法。     

A Grain Orientation-Independent Single-Step Saw Damage Gettering/Wet texturing Process for Efficient Silicon Solar Cells

Improving electrical and optical properties is important in manufacturing high-efficiency solar cells. Previous studies focused on individual gettering and texturing methods to improve solar cell material quality and reduce reflection loss, respectively. This study presents a novel method called saw damage gettering with texturing that effectively combines both methods for multicrystalline silicon (mc-Si) wafers manufactured using the diamond wire sawing (DWS) method. Although mc-Si is not the Si material currently used in photovoltaic products, the applicability of this method using the mc-Si wafers as it contains all grain orientations is demonstrated. It utilizes saw damage sites on the wafer surfaces for gettering metal impurities during annealing. Additionally, it can crystallize amorphous silicon on wafer surfaces generated during the sawing process to allow conventional acid-based wet texturing. This texturing method and annealing for 10 min allow for the removal of metal impurities and effectively forms a textured DWS Si wafer. The results show that the open-circuit voltage (ΔV_oc = +29 mV), short-circuit current density (ΔJ_sc = +2.5 mA cm⁻²), and efficiency (Δη = +2.1%) improved in the p-type passivated emitter and rear cells (p-PERC) manufactured using this novel method, as compared to those in the reference solar cells.     

Improvements to the solar cell efficiency and production yields of low-lifetime wafers with effective phosphorus gettering

This research focuses on the improvement of solar cell efficiencies in low-lifetime wafers by implementing an appropriate gettering method of the diffusion process. The study also considers a reduction in the value of the reverse current at −12 V, an important electrical parameter related to the hot-spot heating of solar cells and modules, to improve the product's quality during commercial mass production. A practical solar cell production case study is examined to illustrate the use of the proposed method. The results of this case study indicate that variable-temperature gettering significantly improves solar cell efficiencies by 0.14% compared to constant-temperature methods when the wafer quality is poor. Moreover, this study finds that variable-temperature gettering raises production yields of low quality wafers by more than 30% by restraining the measurement value of the reverse current at −12 V during solar cell manufacturing.     

Ni-Re intermetallic oxygen getters

Two binary intermetallic compounds PrNi₅ and Nd₂Ni₁₇ have been tested as getters for reducing the oxygen content in a stream of pure argon. Both the intermetallics used are the Ni richest phase in the respective rare-earth (RE)-Ni phase diagrams. The gettering efficiency has been evaluated through the quantities MTGA and OPP_g. The former is the minimum temperature of the getter activity, i.e., the temperature at which the gettering action becomes detectable, and OPP_g is the oxygen partial pressure in the gas stream after reaction. The best MTGA values found are 242 and 287 °C for PrNi₅ and Nd₂Ni₁₇, respectively, with OPP_g minimum values equal to 1×10⁻¹⁶ and 1×10⁻¹⁵ Pa. Though these values are produced for a relatively short time, the average OPP_g values are satisfactory for practical purposes. It has been shown that the oxidation produces the rare-earth oxide (RE₂O₃) and Ni. The rate-determining step has been found to be the transport of oxygen in the gas phase and its transport constant has been also calculated.     

High polysilicon TFT field effect mobility reached thanks to slight phosphorus content in the active layer

The paper deals with the effect of slightly phosphorus atoms introduced during deposition of polysilicon films. Polysilicon films are used as an active layer in thin film transistors (TFTs) fabricated on glass substrates at a maximum temperature of 600 °C.Three phosphorus atoms contents, determined by the value of the phosphine to silane ratio: Γ (3.7 × 10^− 7, 8 × 10^− 7, 26 × 10^− 6), are used to optimize the active layer quality. The in-situ doped layers induce a better stability of the electrical characteristics, a higher mobility and lower value of the threshold voltage for the slightly doped active layers [M. Zaghdoudi, M.M. Abdelkrim, M. Fathallah, T. Mohammed-Brahim and F. Le-Bihan Control of the weak phosphorus doping in polysilicon, Materials Science and Forum, Vols. 480–481 (2005) pp.305.]. The present work shows that the effect of slightly phosphorus content improves the quality of oxide/polysilicon interface and decreases the defects density. Degradation of electrical properties is shown to originate from the creation of defect at the channel-interface oxide and in the grain boundaries. The effect of temperature change on the electrical properties was studied and the behaviour was also analyzed.     

Polysilicon high frequency devices for large area electronics: Characterization, simulation and modeling

Laser Crystallised Polysilicon Thin Film Transistors have now sufficient good conduction properties to be used in high-frequency applications. In this work, we report the results for 5 μm long polysilicon TFTs obtained at frequencies up to several hundred MHz for applications such as RFID tags or System-On-Panel. In order to investigate the device operation, DC and AC two-dimensional simulations of these devices in the Effective Medium framework have been performed. In the light of simulation results, the effects of carrier trapping and carrier transit on the device capacitances as a function of dimensions are analysed and compared. An equivalent small-signal circuit which accounts for the behaviour of these transistors in all regions of operation is proposed and a model for the most relevant elements of this circuit is presented. To validate our simulation results, scattering-parameters (S-parameters) measurements are performed for several structures such as multi-finger, serpentine and linear architectures and the most meaningful parameters will be given. Cut-off frequencies as high as 300 MHz and maximum oscillation frequencies of about 600 MHz have been extracted.     

Micro-structures of BF2- and As-implanted polycrystalline silicon thin films of various thicknesses and heat treatments

Characterization of annealed BF₂⁺- and As⁺-doped polycrystalline silicon (polysilicon) films is presented. Effects of heat treatment, doping concentration, and thickness of film on the grain size and mobility of polysilicon films are investigated and discussed. By using transmission electron microscopy (TEM), it is found that the grain size, effective carrier concentration, and carrier mobility of a polysilicon thin film increases with increasing film thickness. Our results show that a high concentration of As dopant could enhance the recrystallization of the polysilicon films. Heavily As⁺-doped samples were seen to have a relatively larger grain size compared to the lightly doped film. The maximum grain size of about 278 nm can be realized in a polysilicon film with 150 nm in thickness. In contrast, the B dopant has a negligible effect on the recrystallization of polysilicon films. With increasing film thickness and thermal annealing temperature, a high performance polysilicon film with high mobility and grain size can be obtained.     

Combined impurity gettering effects of helium-induced cavities and oxygen precipitates created by plasma immersion ion implantation

Helium bubbles are formed in silicon by high dose implantation using the plasma immersion ion implantation technique. Thermal annealing of the implanted samples at a temperature above 700 °C causes the helium to diffuse out of silicon and form cavities which can be observed by cross-sectional transmission electron microscopy. The well-defined band of helium-induced cavities both with and without oxygen precipitates (formed by subsequent oxygen implantation and annealing) have been studied as gettering layers for copper and gold. Our secondary ion mass spectrometry and Rutherford backscattering spectrometry results demonstrate that the presence of oxygen does not increase significantly the gettering efficiency of these cavities. The combined cavity/oxygen gettering sites also remain stable up to 1200 °C