Tunable mixed-mode OTA-C universal filter

A novel electronically tunable mixed-mode universal biquad by using four single-output and one dual-output-operational transconductance amplifiers, two grounded capacitors is proposed. The proposed circuit has ability to realize voltage, current, transconductance, and transresistance mode, and can the following advantageous features: (i) realization of low-pass, band-pass, high-pass, notch, and all-pass filter responses from the same configuration, (ii) employment of only grounded capacitors ideal for integrated circuit implementation, (iii) orthogonal controlling of ω _o and Q for easily electronic tunability, and (iv) low active and passive sensitivity performance. Finally, to verify our architecture, we have designed this analog filter chip with TSMC 0.35-μm 2P4M CMOS technology. This chip operates to 1 MHz and consumes 30.95 mW. The chip area of the analog filter is about 0.823 mm².     

A high-quality digital audio filter set designed by silicon compiler CATHEDRAL-1

The semi-automatic design and custom integration of a high-quality digital audio preamplifier filter set are described. The set consists of an offset filter, ten graphic equalizer sections, and a scratch filter with a worst-case overall signal-to-noise ratio of 10 dB. The silicon compiler CATHEDRAL-1 supports the design from specifications to layout. The combination of efficient synthesis tools with optimisation at all design levels leads to a very compact silicon integration, compared with a general-purpose signal processor approach. An experimental chip is described on which the offset filter, three equalizer sections, and the scratch filter are integrated. The silicon area is 243 mm/SUP 2/ in a conservative 6-/spl mu/m NMOS technology or 8 mm/SUP 2/ when scaling down to 3-/spl mu/m technology, allowing for functional densities up to 0.2 mm/SUP 2/ pole zero, comparable with area requirements for typical switched-capacitor filters. The total filter set requires only 20 mm/SUP 2/ in a 3-/spl mu/m NMOS technology, which demonstrates the potential for low-cost digital high-fidelity signal processing.     

The realization of high-order OTA-C filter

A new high-order OTA-C active filter using operational transconductance amplifiers (OTAs) and capacitors is presented. The filter has low sensitivity performance and high cut-off frequencies. Its cut-off frequencies can be controlled by a DC voltage or current. In addition, this filter is suitable for integration. Experimental results are given to show its feasibility.     

A novel mixed-mode OTA-C universal filter

A novel mixed-mode biquad circuit is presented. The circuit uses six single-output- and one dual-output-operational transconductance amplifiers, two grounded capacitors; and can realize lowpass, highpass, bandpass, notch, lowpass-notch, highpass-notch and allpass responses from the same topology. The circuit can be driven by voltage or current and its output can be voltage or current. The parameters ω_o and ω_o/Q _o enjoy independent electronic tunability. Simulation results are included.     

Current-mode OTA-C realisation of arbitrary filter characteristics

Two universal current-mode integrator-based OTA-C filter structures are presented. General explicit design formulas are derived. The filter architectures proposed are constructed using a canonical FLF configuration with an input distribution or output summation network. They are comprehensive in function. By setting any particular input distributing or output summing weights (transconductances), we can realise arbitrary approximation characteristics. It is also straightforward to obtain universal filter architectures and the corresponding design formulae of any particular order. The universal second and third order filters and design formulas are discussed in detail     

Minimum parasitic effects biquadratic OTA-C filter architectures

This paper presents a systematic analysis to determine the tuning range limitations of biquadratic OTAC filter architectures, as well as a strategy for the selection of minimum parasitic effects filter structures for a given transfer function (filter type). The analysis uses an OTA macromodel that includes finite input and output impedances along with frequency-dependent transconductance. Experimental data of the macromodel parameters of real OTAs along with analytical results are used to estimate the practical tuning (bounds) limitations of the different biquadratic filter structures. Some of the available transfer functions from these filter architectures present minimum parasitic effects. Experimental results from CMOS chip tests showed agreement with the minimum parasitic effects theoretical results.     

一种新颖的电流模式双二阶OTA-C滤波器设计

提出了一种新颖OTA-C实现的电流模式双二阶通用滤波器。该滤波器具有三个输入端和一个输出端,通过选择不同的输入信号即能实现低通、高通、带通、带阻和全通五种滤波器功能。电路结构简单、中心频率和品质因数可调,灵敏度低,均为0.5。理论分析和SPICE仿真表明所提电路方案正确可行。     

Compact sub-hertz OTA-C filter design with interface-trap charge pump

Single-ended and differential operational transconductance amplifier (OTA) configurations are biased with MOSFET interface-trap charge-pumping (ITCP) current generators to achieve very low transconductances for tunable sub-hertz operational transconductance amplifier-capacitor (OTA-C) filter implementation. This paper reviews the basics of ITCP current generation and presents the transconductors and the OTA-C filter configurations based on these transconductors. One of the filters is a low-pass with an experimentally determined lowest cutoff frequency of 0.18 Hz, and the other is a fully differential bandpass with individually tunable lower and upper cutoff frequencies measured down to 0.3 Hz. The former has one 15-pF filter capacitor, and measures 0.0346 mm/sup 2/, whereas the latter contains four such capacitors and occupies 0.188 mm/sup 2/ silicon. Experimental evaluation also includes offset, harmonic distortion, and noise performance.     

OTA-C filter design using inductor substitution and Bruton transformation methods

Operational transconductance amplifier-capacitor (OTA-C) filters are normally designed by simulating low sensitivity LC filters. The evaluation of parasitic effects on OTA-C filters for the inductor substitution method is usually by direct circuit analysis, which is too complex for high order filters. The practical performance of the Bruton transformation method in OTA-C filter design has not previously been investigated. The author presents a method for evaluating the parasitic effect in OTA-C filters based on the inductor substitution method, which uses very simple formulas for the magnitude and phase sensitivities of the passive LC ladder and the equivalent loss resistance and the change in the equivalent inductance of each OTA-C inductor due to nonidealities in its constituent OTAs. The Bruton transformation method is discussed and demonstrated not to be attractive for OTA-C filter design due to the large component numbers and parasitic effects     

A C-T filter compiler - from specifications to layout

This paper presents an analog Design Automation tool implemented within the Cadence Edge system, using the Cadence programming language Skill and other useful Cadence tools. Given standard filter specifications, the tool generates Continuous-Time filter blocks implementing the desired function. A numerical optimization technique is used to cancel response errors, introduced by the non-ideal circuit elements available for real filter realizations. Except for an operational amplifier which must be provided by the user, component layout is performed by dedicated module generators, and the final filter layout is assembled using the Cadence Edge place & route program. In the current version of the program, the only available filter topology is the MOSFET-C topology. However, an hierarchical, object oriented approach is adopted, in order to ensure reusability and extensibility of the tool. Each general aspect of a filter design is accessed through a uniform interface from the higher level of hierarchy, allowing dedicated procedures depending on the particular implementation to deal with the details, without affecting the workings of the tool at the higher level of hierarchy.     

用于红外接收芯片的OTA-C带通滤波器

设计了一种二阶带通连续时间滤波器(BPF),采用0.5μm n阱CMOS工艺设计,在Cadence Spectre环境下进行了电路仿真。结果表明:该滤波器的中心频率38kHz,带宽6kHz,通带增益16dB且均匀可调,可用于红外接收芯片中。     

Using multiple-input transconductors to reduce number of components in OTA-C filter design

Depending on the structure of the OTA and the topology of an OTA-C filter, the use of multiple-input OTAs can reduce the number of components, silicon area, and power dissipation by approximately a factor k, where k is the number of inputs of the OTA. A suitable bipolar OTA is presented, together with an example of ladder synthesis.<>     

Design of high-order elliptic filter from a versatile mode generic OTA-C structure

A new synthesis methodology for high-order versatile mode programmable Operational transconductance amplifier and capacitor (OTA-C) generic filter structure is proposed. The structure fulfills the three main criteria of high frequency operation i.e it uses (1) less number of components (2) only single ended input OTAs (3) only grounded capacitors. Any nth order transfer function can be realised from it. Elliptic filter is designed from the generic structure using optimisation technique to reduce the number of OTAs. SPICE simulation with BSIM level 53 model and 0.13 μm process confirms the theoretical analysis. Frequency response of third-order and fourth-order elliptic filter is shown as representative set of simulated result. Sensitivity and non-ideal effect of the designed filter are studied.     

Design of a new low power MISO multi-mode universal biquad OTA-C filter

ABSTRACT

In this article, a new low-power multiple-input, single-output (MISO) multi-mode universal biquad operational transconductance amplifier-capacitor (OTA-C) filter with a minimum number of active and passive components is proposed. The proposed filter employs three OTAs, one inverter and two grounded capacitors. The proposed filter can realise all filter frequency responses including low-pass (LP), band-pass (BP), high-pass (HP), band-stop (BS) and all-pass (AP) in all operation modes including voltage, current, tranasresistance and transconductance modes using the same topology. Furthermore, sensitivity analysis is done which shows that the proposed filter has a low sensitivity to the values of the active and passive elements. The proposed filter is simulated in HSPICE using 0.18 µm CMOS technology. The HSPICE simulation results demonstrate that the proposed filter consumes only 35 μW at 2.5 MHz from a ±0.5 V supply voltage, while all of the transistors are biased in strong inversion region. Also, the simulation results are in a close agreement with the theoretical analysis which is done in MATLAB. Furthermore, the process, voltage and temperature variation simulations are done to study the effect of non-idealities on the performance of the proposed filter. It is shown that the simulation results justify a 4.8%, 0.8% and 20% variations of the centre frequency for process, voltage and temperature, respectively. Finally, Monte-Carlo, noise and transient simulations are done to justify the good performance of the proposed filter performance.     

Design techniques for silicon compiler implementations ofhigh-speed FIR digital filters

Architecture design techniques for implementing both single-rate and multirate high throughput finite impulse response (FIR) digital filters are explored, with an emphasis on those which are applicable to automated integrated circuit layout techniques. Various parallel architectures are examined based on the criteria of achievable throughput versus hardware complexity. Well-known techniques for reduced complexity and computation time are briefly summarized, followed by the introduction of several new techniques which offer further gains in both throughput and circuitry reduction. An architecture for mirror-symmetric polyphase filter banks is derived which exploits the coefficient symmetry between multiple filters to reduce hardware. Finally, the evolution of a silicon compiler which utilizes all of these techniques is presented, and results are given for compiled filters along with comparisons to other compiled and custom FIR filter chips     

A new OTA-C current-mode biquad filter with single input and multiple outputs

A new current-mode biquad-filtering circuit with single input and multi-outputs based on operational transconductance amplifier (OTA) is presented using three OTAs, two grounded capacitors and one grounded resistor, it can simultaneously realize second-order lowpass, bandpass, highpass, notch and allpass filters. The characteristic parameters can be adjusted orthogonally by a bias current of OTA and all capacitors are gounded. Morever, the circuit enjoys low sensitivities.