面向多媒体网络的DSP技术

本文通过对面向多媒体网络诮物ＤＳＰ技术的讨论，阐述了多媒体信息的基特性，分析了多媒体网络对ＤＳＰ技术的要求，     

MPEG-4的Profile和Level及其应用

针对多媒体通信业务的特点,在对多媒体通信终端的有关国际标准进行分析后,提出了多媒体通信终端通用模型,从算法实现的复杂度对各组成模块的特征进行了分类。     

面向多媒体网络的DSP技术

本文通过对面向多媒体网络应用的DSP技术的讨论,阐述了多媒体信息的基本特性,分析了多媒体网络对DSP技术的要求,并列举了几种典型的面向多媒体应用的DSP芯片,最后探讨了今后DSP技术在网络应用方面的发展趋势。     

多媒体高频处理器MVP的原理及应用

多媒体视频处理器ＭＶＰ是ＴＩ公司推出的产品之一，内含五个功能齐全的可编程通用数字信号处理器。经高速交叉网连接后，可使运算速度和数据传输速度大大提高。本文着重介绍了ＭＶＰ的内部结构和工作原理。     

多媒体信号处理NEON技术

ARMNEON技术是适用于ARMCortex．A系列处理器的一种128位SIMD（SingleInstruction,Multiple Data．     

多媒体通信终端组成及其实现的若干问题

针对多媒体通信业务的特点,在对多媒体通信终端的有关国际标准进行分析后,提出多媒体通信终端通用模型,从算法实现的复杂度对各组成模块的特征进行分类.在分析用户需求和相关技术发展的基础上对当前多媒体通信终端的主要实现方案作了比较,详细讨论了基于PC的多媒体通信终端的关键技术,提出并简要说明了两种适用于不同网络带宽的多媒体通信终端方案.     

多媒体视频处理器MVP的原理及应用

多媒体视频处理器ＭＶＰ是ＴＩ公司推出的产品之一，内含五个功能齐全的可编程通用数字信号处理器。经高速交叉网连接后，可使运算速度和数据传输速度大大提高。本文着重介绍了ＭＶＰ的内部结构和工作原理。     

Multimedia Execution Hardware Accelerator

In this paper we show that some expressions frequently used in multimedia applications can be formulated as a general add-multiply-add operation. We further show a hardwired implementation of the Add-Multiply-Add instruction which is no more complex than the multiplier implementation. Furthermore we show that two frequently motion estimation operations, the Sum and Mean of Absolute Differences, can be implemented in hardware requiring also approximately the same cycle time as the multiplication. We also show that our approach can be extended easily to provide the computation of the Sum and Mean of Absolute Difference of a 16×16 pixel block in no more than four machine cycles. Additionally we propose a codec hardwired mechanism for the Paeth predictor used in the Portable Network Standard (PNG) that requires at most two general purpose ALU cycles. We extend the paeth unit to include the median, maximum and minimum operations on three inputs with no additional cycle time and we also extend the Add-Multiply-Add unit to include the mean of three numbers. Finally we propose a multimedia hardware accelerator to accommodate all the proposed operations. The proposed unit is an extension of the multiply pipeline with ALU extensions with no extra stages added. The unit operates on 32 instructions in total.     

多媒体技术综览

本文简要地讨论了多媒体信息交流，多媒体软、硬件平台，多媒体产品制作和多媒体通信中的技术问题。     

DSP的硬件技术与应用原理

介绍DSP的主要特点和硬件结构,以及在选择使用时应考虑和注意的问题。     

Implementation of a Wireless Multimedia DSP Chip for Mobile Applications

This paper presents the implementation of a wireless multimedia DSP chip for mobile applications. The implemented DSP chip supports communication instructions for Viterbi, timing synchronization, etc. as well as multimedia instructions. The DSP can handle variable length data and perform four MACs in a cycle. The proposed DSP employs parallel processing techniques, such as SIMD, vector processing, DSP schemes and adopts low power features for wireless applications. The implemented DSP chip includes test circuits and various peripherals, such as DMA, bus arbitration, timer, etc. This chip has been modeled by Verilog HDL and implemented using the 0.35 m HCB60 library. The total gate count excluding memory is about 170,000 gates and the clock frequency is 100 MHz.Junghoo Lee received the B.S. degree in electronic engineering from Ajou University, Suwon, Korea in 2002. He is currently working toward the Ph.D. degree with School of Electrical and Computer Engineering, Ajou University. His main research interests include SOC design and application-specific DSP chip design.Myung H. Sunwoo received the B.S. degree in electronic engineering from the Sogang University in 1980, the M.S. degree in electrical and electronics from the Korea Advanced Institute of Science and Technology in 1982, and the Ph.D. degree in electrical and computer engineering from the University of Texas at Austin in 1990.He worked for Electronics and Telecommunications Research Institute (ETRI) in Daejeon, Korea from 1982 to 1985 and Digital Signal Processor Operations, Motorola, Austin, TX from 1990 to 1992. Since 1992, he has been a Professor with the School of Electrical and Computer Engineering, Ajou University in Suwon, Korea. In 2000, he was a Visiting Professor in the Department of Electrical and Computer Engineering, the University of California, Davis, CA. He is the Director of the National Research Laboratory sponsored by the Ministry of Science and Technology. His research interests include VLSI architectures, SOC design for multimedia and communications, and application-specific DSP architectures.Dr. Sunwoo has published more than 120 papers in international transactions/journals and conferences and also has 28 patents including five U.S. patents. He served as a Technical Program Chair of the IEEE Workshop on Signal Processing Systems (SIPS) in 2003 and a member of the technical program committee of various international conferences. He has received a number of research awards from the Ministry of Commerce, Industry and Energy, Samsung Electronics, and professional foundations. He served as an Associate Editor for the IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2002–2003) and as a Guest Editor for the Journal of VLSI Signal Processing (Kluwer, 2004). Currently, He is a Senior Member of IEEE and a Chair of the IEEE CAS Society of the Seoul Chapter.     

基于DSP的海量实时多媒体数据分析系统设计

针对传统系统实时性差、分析误差大的问题。设计了基于DSP的海量实时多媒体数据分析系统,以高速DSP为核心架构,对实验者进行多点建模,并以模型关联特性作为分析基础,完成数据提取与融合处理。实验结果表明,系统的实时性和准确率都有大幅提高。     

行为级硬件描述语言XHDL的模拟机制

本文介绍了一种集成电路行为级硬件描述语言ＸＨＤＬ，以及利用ＸＨＤＬ如何进行电路的高层次描述，在此基础上着重讨论了ＸＨＤＬ的模拟机制。     

中高压断路器在线监测装置的设计与实现

为了对开关设备的重要参数能进行长期连续的监测,设计出一种采用DSP处理器加CPLD结构的在线监测系统,详细分析了行程信号采集、线圈电流信号采集、数据存储、通信和实时RTC等主要硬件模块的设计方案。系统实现了对高压断路器状态的在线监测和机械故障的诊断,为开关设备状态监测提供了一种可行的解决方案。     

无线传感器网络硬件平台的研究与设计

无线传感器网络因其巨大的应用前景而受到学术界和工业界越来越广泛的重视。简要介绍了无线传感器网络的体系结构,着重从硬件平台设计的原则出发,对硬件平台进行了研究和分析,最后提出对硬件平台设计的构想。     

一种新型图形发生器硬件方案的研究

介绍了一个电子束曝光系统图形发生器的硬件实现方案，该方案DSP处理器为核心，通过USB接口与上位机通讯，具有标记检测和曝光扫描两项基本功能，同时增加了圆形和圆环图形的处理功能。通过将现有图形发生器的功能移植至数字信号处理器，使各种图形硬件化，提高了图形的运算和处理速度，克服了以前图形发生器存在的许多弊端。     

多媒体信息服务系统的技术与业务分析

介绍如何构筑一个多媒体计算机服务信息平台系统 ,并作系统业务分析 ,以向拨号入网的用户提供包括文本、图像、图形、声音、影像等的多媒体信息服务。