共查询到19条相似文献,搜索用时 156 毫秒
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介绍了低中频的数字无绳收发芯片的内部原理和管脚功能,该芯片在低中频无线通信中有着广泛的用途。 相似文献
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低压差稳压电源以低功耗、高效率、低噪声、低干扰、体积小、重量轻等显著特点,深受人们的青睐,本文首先介绍了基于P-MOSFET的低压差稳压电路的工作原理,并通过分析运放的增益曲线说明系统的稳定性。接下来介绍了一种低压差稳压电路的驱动芯片的工作原理以及设计方法。并通过实验验证了稳压电路,设计出来的电路简单可靠。 相似文献
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针对超高频抗金属射频识别(RFID)标签的小型化和低剖面需求,提出了一种可用于金属表面的超高频RFID标签天线,其尺寸为50 mm×20 mm×0.9 mm。该设计采用CST MWS软件进行建模仿真,分析了嵌入式馈电结构尺寸变化和矩形开槽尺寸变化对标签天线输入阻抗的影响,并调整相应参数以达到标签天线输入阻抗与芯片阻抗的共轭匹配。实测结果表明,标签天线输入阻抗与芯片阻抗匹配良好,在910 MHz处有最大实测阅读距离为4.3 m,且具有小尺寸和低剖面,可应用于物流、医疗、零售等多种领域的金属场景。 相似文献
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低功率业余无线电收发信机是业余无线电爱好者们急需的低功率通信设备.本文介绍了一种低功率SSB收发信机的设计方法及其工作原理.该收发信机提供15 m和20 m两个波段,利用芯片MC1596实现SSB信号的产生及检波,利用芯片NE602完成混频,固定中频为9 MHz.该机体积小、重量轻、成本低、性能好,在低功率业务无线电通信领域中,具有较高的实用价值和广阔的应用前景. 相似文献
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采用铜互连工艺的先进芯片在封装过程中,铜互连结构中比较脆弱的低介电常数(k)介质层,容易因受到较高的热机械应力而发生失效破坏,出现芯片封装交互作用(CPI)影响问题.采用有限元子模型的方法,整体模型中引入等效层简化微小结构,对45 nm工艺芯片进行三维热应力分析.用该方法研究了芯片在倒装回流焊过程中,聚酰亚胺(PI)开口、铜柱直径、焊料高度和Ni层厚度对芯片Cu/低κ互连结构低κ介质层应力的影响.分析结果显示,互连结构中间层中低κ介质受到的应力较大,易出现失效,与报道的实验结果一致;上述四个因素对芯片低κ介质中应力影响程度的排序为:焊料高度>PI开口>铜柱直径>Ni层厚度. 相似文献
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A low jitter,low spur multiphase phase-locked loop(PLL) for an impulse radio ultra-wideband(IR-UWB) receiver is presented.The PLL is based on a ring oscillator in order to simultaneously meet the jitter requirement, low power consumption and multiphase clock output.In this design,a noise and matching improved voltage-controlled oscillator(VCO) is devised to enhance the timing accuracy and phase noise performance of multiphase clocks.By good matching achieved in the charge pump and careful choice of the l... 相似文献
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设计了一种由单片机PIC18LF4520控制DDS芯片AD9911的频率源电路。阐述了单片机控制DDS的软硬件实现方法,以及AD9911内部寄存器的配置要点。系统设计外围电路简单,可方便地实现对频率源电路输出频率、相位和工作模式的控制,输出信号频率范围为25~75 MHz。实验结果表明,该频率源具有输出频率精确、频率分辨率高和相位噪声低等特点,符合通信系统对频率源的设计要求。 相似文献
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频率源的相位噪声水平直接制约雷达的性能上限,因而低相噪频率合成技术是高性能雷达系统的一项关键技术。现有低相噪频率合成方法常用高次倍频实现,整体性能上严重依赖于低相噪晶振,成本一直居高不下。对此,提出一种低附加相位噪声频率合成方法,即采用最小化链路上附加相位噪声的技术,用普通恒温晶振级联低相噪放大器、梳状谱发生器和锁相环,最终实现低相位噪声的频率合成。实测数据表明,本文方法以100 MHz普通恒温晶振为参考,积分区间[1 kHz, 30 MHz]的时间抖动为11 fs,频率合成在5.8 GHz载波的相位噪声为-119 dBc/Hz@1 kHz,积分区间[1 kHz, 30 MHz]的时间抖动为13.7 fs,总附加时间抖动为8.17 fs,附加相位噪声仅1.9 dB,达到了业界领先水平,能够有效提升毫米波雷达系统的成像性能,优于传统频率合成方法。 相似文献
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A low power and low phase noise phase-locked loop(PLL) design for low voltage(0.8 V) applications is presented.The voltage controlled oscillator(VCO) operates from a 0.5 V voltage supply,while the other blocks operate from a 0.8 V supply.A differential NMOS-only topology is adopted for the oscillator,a modified precharge topology is applied in the phase-frequency detector(PFD),and a new feedback structure is utilized in the charge pump(CP) for ultra-low voltage applications.The divider adopts the extende... 相似文献
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该文分析了晶振超低相噪设计方法及影响因素,重点阐述了有载品质因数(Q)值、电路结构等对相噪的影响,并基于改进型的巴特勒振荡电路在小体积下进行了超低相噪恒温晶振的设计,对其主振电路、放大电路、稳压电路等进行了概要的分析。该文研制的100 MHz小型超低相噪恒温晶振体积达到20mm×20mm×10mm,相噪指标最优达到-168dBc/Hz@1kHz,达到了预期的研制目标。 相似文献
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The design considerations and experimental results of compact low noise GaAs MESFET Amplifiers for UHF operation are described
in this paper. The miniaturized and optimized circuits are obtained by means of special matching network and CAD technique.
Both a two-stage unit at 700 MHz and a three-stage unit at 1000 MHz are fabricated on a 50×60 mm2 alumina substrate, and power gain of 29 dB and 30 dB, noise figure of 0.8 and 1.2 dB and bandwidth of 40 MHz (3 dB) and 100
MHz (1 dB) are obtained respectively. The satellite direct broadcasting TV receiver fabricated with a 700 MHz GaAs MESFET
amplifier has clear pictures and good sound. 相似文献
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This paper presents a self-regulating voltage-controlled oscillator (VCO) with low supply sensitivity. With an adaptive delay cell, the self-regulating VCO achieves a low supply sensitivity of 0.15%-delay/1%-supply or less. This delay cell has a built-in compensation circuit that senses and corrects the delay variation caused by supply fluctuation. The proposed scheme rejects device noise as well and hence achieves a low phase noise of -101.4 dBc/Hz at 600-kHz offset when it runs at 900 MHz. The prototype phase-locked loop with the VCO fabricated in 0.35-/spl mu/m CMOS process shows a cycle-to-cycle rms jitter of 2.1 ps at 450 MHz (VCO at 900 MHz) under quiet supply condition. 相似文献
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Mazzanti A. Svelto F. 《IEEE transactions on circuits and systems. I, Regular papers》2006,53(3):554-560
Injection-locked quadrature voltage-controlled oscillators are introduced in this paper as high accuracy, low phase noise, and low-power I and Q generators. A master voltage-controlled oscillator (VCO), running at twice the output frequency, locks two coupled VCOs. The former determines phase noise while the latter sets phase accuracy, thus, breaking the tradeoff between the two parameters, the main limit of free running coupled VCOs, recently proposed in the framework of highly integrated solutions. The proposed design has been tailored to DCS 1800 and prototypes have been fabricated in a 0.18-/spl mu/m CMOS technology. Experiments show a phase noise of -127 dBc/Hz and -139 dBc/Hz at 600 kHz and 3 MHz, respectively, while consuming 10 mA from 1.8 V supply. A 185-dB state-of-the-art phase noise figure of merit results. Accuracy between output signals is determined by means of image band rejection (IBR) measurements on a purposely developed single-side-band upconversion mixer. Minimum IBR among 20 samples is as large as 46 dB. 相似文献