Epitaxial growth of Ge thin film on Si (001) by DC magnetron sputtering

We have demonstrated that sub-10 nm-thick heteroepitaxial Ge films on Si (001) having smooth surfaces can be obtained by DC magnetron sputtering. Ge films grown at 350 °C preserve the smooth surfaces with a roughness root mean square (RMS) of 0.39 nm, whereas, the Ge films grown at 500 °C show significant roughness with an island-like morphology. In samples grown at 350 °C, it is confirmed that the Ge films are grown epitaxially by cross-section transmission electron microscopy (TEM) and X-ray diffraction (XRD) rocking curve measurements. Rapid thermal annealing (RTA) at 720 °C is effective in improving the crystalline quality and the degradation in the roughness is negligible. Raman spectra and an XRD reciprocal space map reveal that the epitaxial Ge grown at 350 °C show an in-plane compressive strain and that the strain continues to remain after a 720 °C RTA.     

Microstructural and optical characterization of CdTe(211)B/ZnTe/Si(211) grown by molecular beam epitaxy

CdTe layers have been grown by molecular beam epitaxy on 3 inch nominal Si(211) under various conditions to study the effect of growth parameters on the structural quality. The microstructure of several samples was investigated by high resolution transmission electron microscopy (HRTEM). The orientation of the CdTe layers was affected strongly by the ZnTe buffer deposition temperature. Both single domain CdTe(133)B and CdTe(211)B were obtained by selective growth of ZnTe buffer layers at different temperatures. We demonstrated that thin ZnTe buffer layers (<2 nm) are sufficient to maintain the (211) orientation. CdTe deposited at ∼300°C grows with its normal lattice parameter from the onset of growth, demonstrating the effective strain accommodation of the buffer layer. The low tilt angle (<1°) between CdTe[211] and Si[211] indicates that high miscut Si(211) substrates are unnecessary. From low temperature photoluminescence, it is shown that Cd-substituted Li is the main residual impurity in the CdTe layer. In addition, deep emission bands are attributed to the presence of As_Te and Ag_Cd acceptors. There is no evidence that copper plays a role in the impurity contamination of the samples.     

Crystallographic Properties of Ge/Si Heterojunctions Fabricated by Wet Wafer Bonding

Ge/Si heterojunctions formed by wet wafer bonding were observed using transmission electron microscopy and energy-dispersive x-ray spectroscopy. For the samples annealed at 880°C, there was a transition layer at the heterointerface with modified regions in the Si and Ge extending 20 nm to 30 nm from the interface. In these modified regions, crystal defects were observed, and a large amount of Ge was detected on the Si side of the junction. For the samples annealed at 250°C or 350°C, the transition layers had an amorphous-like structure with a thickness of about 10 nm. No modified layer or enlargement of lattice spacing was observed.     

Microstructural Characterization of CdTe(211)B/ZnTe/Si(211) Heterostructures Grown by Molecular Beam Epitaxy

Transmission electron microscopy and small-probe microanalysis have been used to investigate the microstructure and compositional profiles of CdTe(211)B/ZnTe/Si(211) heterostructures. Thin ZnTe buffer layers and subsequent thick CdTe layers were grown on Si(211) substrates using molecular beam epitaxy. Many {111}-type stacking faults were found to be present throughout the entire ZnTe layer, terminating near the point of initiation of CdTe growth. A rotation angle of about 3.5° was observed between lattice planes of the Si substrate and the final CdTe epilayer. Local lattice parameter measurement and elemental profiles indicated that some intermixing of Zn and Cd had taken place. The average widths of the ZnTe layer and the (Cd,Zn)Te transition region were found to be roughly 6.5 nm and 3.5 nm, respectively.     

High-Quality (211)B CdTe on (211)Si Substrates Using Metalorganic Vapor-Phase Epitaxy

High-quality (211)B CdTe buffer layers are required during Hg_1−x Cd _x Te heteroepitaxy on Si substrates. In this study, direct metalorganic vapor-phase epitaxy (MOVPE) of (211)B CdTe on Si, as well as CdTe on Si using intermediate Ge and ZnTe layers, has been achieved. Tertiary butyl arsine was used as a precursor to enable As surfactant action during CdTe MOVPE on Si. The grown CdTe/Si films display a best x-ray diffraction rocking-curve full-width at half-maximum of 64 arc-s and a best Everson etch pit density of 3 × 10⁵ cm⁻². These values are the best reported for MOVPE-grown (211)B CdTe/Si and match state-of-the-art material grown using molecular-beam epitaxy.     

Growth and characterization of GaAs films deposited on Ge/Si composite substrates by metalorganic chemical vapor deposition

We report the results of studies which have been made on heteroepitaxial layers of GaAs and AlGaAs grown by metalorganic chemical vapor deposition on composite substrates that consist of four different types of heteroepitaxial layered structures of Ge and Ge-Si grown by molecular beam epitaxy on (100)-oriented Si substrates. It is found that of the four structures studied, the preferred composite substrate is a single layer of Ge ∼1 μm thick grown directly on a Si buffer layer. The double-crystal X-ray rocking curves of 2 μm thick GaAs films grown on such substrates have FWHM values as small as 168 arc sec. Transmission electron micrographs of these Ge/Si composite substrates has shown that the number of dislocations in the Ge heteroepitaxial layer can be greatly reduced by an anneal at about 750° C for 30 min which is simultaneously carried out during the growth of the GaAs layer. The quality of the GaAs layers grown on these composite substrates can be greatly improved by the use of a five-period GaAs-GaAsP strained-layer superlattice (SLS). Using the results of these studies, low-threshold optically pumped AlGaAs-GaAs DH laser structures have been grown by MOCVD on MBE Ge/Si composite substrates.     

Comparative Studies of the Growth and Characterization of Germanium Epitaxial Film on Silicon (001) with 0° and 6° Offcut

The quality of germanium (Ge) epitaxial films grown directly on silicon (Si) (001) with 0° and 6° offcut orientation using a reduced-pressure chemical vapor deposition system is studied and compared. Ge film grown on Si (001) with 6° offcut presents ～65% higher threading dislocation density and higher root-mean-square (RMS) surface roughness (1.92 nm versus 0.98 nm) than Ge film grown on Si (001) with 0° offcut. Plan-view transmission electron microscopy also reveals that threading dislocations are more severe (in terms of contrast and density) for the 6° offcut. In addition, both high-resolution x-ray diffraction and Raman spectroscopy analyses show that the Ge epilayer on 6° offcut wafer presents higher tensile strain. The poorer quality of the Ge film on Si (001) with 6° offcut is a result of an imbalance in Burgers vectors that favors dislocation nucleation over annihilation.     

Strain relaxation in silicon ion molecular beam epitaxy on silicon (001) substrates during aging

Silicon strained epitaxial films were grown on Si (001) substrates by low energy ion beam assisted molecular beam epitaxy. Films grown in the range of 450– 550°C with concurrent Ar⁺ ion bombardment (100 eV) were characterized using x-ray diffraction and transmission electron microscopy and found to be disloca-tion free and ununiformly strained. During aging, the strained layers stay stable until 500°C. Relaxation of most of the strain occurred at temperatures of 500-650°C. At higher aging temperatures, the strained layers relaxed by the formation of dense dislocation structures.     

Effectiveness of SiGe Buffer Layers in Reducing Dark Currents of Ge-on-Si Photodetectors

The effectiveness of thin SiGe buffer layers in terminating threading dislocations and reducing photodiode dark current for Ge epitaxially grown on Si (001) has been investigated. The structural morphology of the films was studied by atomic force microscopy and transmission electron microscopy. The dark current of Ge on Si photodiodes can be reduced by over an order of magnitude by incorporating two different composition SiGe buffer layers. The origin of dark current and the effectiveness of thermal annealing the SiGe layers were also studied     

Diffusion Barrier Behaviors of V-Ta,V-Ta-N and V-Ta/V-Ta-N Alloy Films in Cu Interconnects

The V-Ta, V-Ta-N and V-Ta/V-Ta-N alloy barrier layers with thickness of 50 nm were deposited on Si (100) substrates by magnetron sputtering and then the 300 nm thick Cu films were prepared on the barrier layers to obtain Cu/V-Ta/Si, Cu/V-Ta-N/Si and Cu/V-Ta/V-Ta-N/Si multilayer films. The multilayer film samples were subsequently annealed at 300°C–750°C temperatures for 1 h in vacuum atmosphere. The crystal structure, surface morphology and sheet resistance were characterized by grazing incidence x-ray diffraction (GXRD), electron probe microanalysis (EPMA), scanning electron microscopy (SEM) and four-point probe (FPP) analysis to investigate the diffusion barrier behavior of the V-Ta, V-Ta-N and V-Ta/V-Ta-N alloy barrier layers. The results show that the V-Ta, V-Ta-N and V-Ta/V-Ta-N barrier layers effectively blocked the diffusion of Cu into the Si substrate. When annealed at 700°C, the Cu/V-Ta/Si and Cu/V-Ta/V-Ta-N/Si thin film samples maintained good thermal stability and demonstrated low sheet resistance (～?0.3 Ω cm). Therefore, both the V-Ta and V-Ta/V-Ta-N thin films are promising candidates for use as diffusion barrier layers.

     

Cyclic Annealing During Metalorganic Vapor-Phase Epitaxial Growth of (211)B CdTe on (211) Si Substrates

High-quality (211)B CdTe buffer layers on Si substrates are required to enable Hg_1–x Cd _x Te growth and device fabrication on lattice-mismatched Si substrates. Metalorganic vapor-phase epitaxy (MOVPE) of (211)B CdTe on Si substrates using Ge and ZnTe interlayers has been achieved. Cyclic annealing has been used during growth of thick CdTe layers in order to improve crystal quality. The best (211)B CdTe/Si films grown in this study display a low x-ray diffraction (XRD) rocking-curve full-width at half-maximum (FWHM) of 85 arcsec and etch pit density (EPD) of 2 × 10⁶ cm⁻². These values are the best reported for MOVPE-grown (211) CdTe/Si and are comparable to those for state-of-the-art molecular beam epitaxy (MBE)-grown CdTe/Si.     

UHV/CVD生长SiGe/Si异质结构材料

以 Si2 H6 和 Ge H4 作为源气体 ,用 UHV/CVD方法在 Si( 1 0 0 )衬底上生长了 Si1- x Gex 合金材料和 Si1- x Gex/Si多量子阱结构 .用原子力显微镜、X光双晶衍射和透射电子显微镜对样品的表面形貌、均匀性、晶格质量、界面质量等进行了研究 .结果表明样品的表面平整光滑 ,平均粗糙度为 1 .2 nm;整个外延片各处的晶体质量都比较好 ,各处生长速率平均偏差为 3.31 % ,合金组分 x值的平均偏差为 2 .0 1 % ;Si1- x Gex/Si多量子阱材料的 X光双晶衍射曲线中不仅存在多级卫星峰 ,而且在卫星峰之间观察到了 Pendellosung条纹 ,表明晶格质量和界面质量都很好 ;Si     

Heteroepitaxial 3C-SiC on Si with Various Carbonization Process Conditions

The surface morphology and crystallinity of cubic silicon carbide (3C-SiC) films are the most important factors to affect performance of 3C-SiC-based electronic devices. This article presents the effect of carbonization condition, such as the process temperature and the source gas flow rate, on the surface roughness and crystalline quality of heteroepitaxial 3C-SiC films grown on Si(001) substrates. Morphological analysis using scanning electron microscopy (SEM), optical microscopy, and atomic force microscopy (AFM) reveals that decreasing the carbon-based precursor gas-on temperature from 1100°C to 700°C after in situ cleaning significantly improves the surface morphology of subsequent 3C-SiC films. Also, decreasing the carbonization temperature from 1250°C to 1150°C reduces the protrusion defect density from >400/mm² to <30/mm². Comparison of crystalline quality of 3C-SiC with two different propane gas flow rates of 3 sccm and 15 sccm during carbonization, using x-ray diffractometry and scanning probe microscopy, indicates little influence on crystalline quality as flow rate changes.     

Critical conditions for SiGe island formation during Ge deposition on Si(100) at high temperatures

The strain relaxation during the Ge growth on Si(100) occurs vikia surface diffusion and Si-Ge intermixing at temperatures below 800 °C. The Ge diffusion into the Si substrate is an additional process at higher temperatures. We found that, if its rate is higher than the Ge deposition rate, the island formation is not realized. We determined the critical Ge deposition rate as a function of the temperature in the range of 840–960 °C, at which the dynamic equilibrium between the growth of islands and their decay through the diffusion takes place. The islands grown in the conditions close to the dynamic equilibrium are ordered with a distance between them of about 1 µm and they form a smoothed surface morphology. These are indicative of the surface layer strain uniformity. The islands have a SiGe composition which, in the direction parallel to the sample surface, is more uniform in comparison with the islands grown at lower temperatures. The results show that the use of high temperatures essentially improves the conditions for the heterostructure self-organization.     

Interaction of self-assembled Ge islands and adjacent Si layers grown on unpatterned and patterned Si(001) substrates

For use in electronic devices, self-assembled Ge islands formed on Si(001) must be covered with an additional Si layer. Chemically vapor deposited Si layers initially grow very rapidly over Ge islands because of the catalytic effect of Ge on the reaction of the Si-containing gas. The edges of the Si features covering Ge “pyramids” are rotated by 45° with respect to the edges of the Ge pyramids because of the different mechanisms orienting the Ge islands and the Si features. When multiple layers of islands are formed, the in-plane ordering of the Ge islands depends on the thickness of the Si interlayer separating the island layers. When selective Si is grown on a patterned Si wafer to form the underlying structure for the Ge islands, the position of the islands is influenced by the detailed shape of the Si near the edges, which in turn depends on the thickness of the selectively deposited Si, the pattern size, and the amount of surrounding oxide.     

Use of high order precursors for manufacturing gate all around devices

Epitaxial growth of strained and defect free SiGe layers grown with disilane and digermane was investigated. This precursors set allows to cover a broad range of Ge concentration (15–65%) at low temperatures (400–550 °C). It was shown that change of carrier gas (from H₂ to N₂) does not increase SiGe growth rate but significantly reduces Ge concentration. Increase of total process pressure considerably reduces SiGe growth rate which is attributed to peculiarities of digermane decomposition and influence of hydrogen surface passivation on disilane decomposition. It was shown that both disilane and digermane can be successfully combined with conventional precursors like silane and germane. These experiments suggested that digermane decomposition is the main driver of the growth rate increase during SiGe growth. Based on the presented data we demonstrated growth of different SiGe/Si and SiGe/Ge stacks with high quality necessary for production of gate all around field effect transistors.     

High quality GaAs qrowth by MBE on Si using GeSi buffers and prospects for space photovoltaics

III–V solar cells on Si substrates are of interest for space photovoltaics since this would combine high performance space cells with a strong, lightweight and inexpensive substrate. However, the primary obstacles blocking III–V/Si cells from achieving high performance to date have been fundamental material incompatibilities, namely the 4% lattice mismatch between GaAs and Si, and the large mismatch in thermal expansion coefficient. In this paper, we report on the molecular beam epitaxial (MBE) growth and properties of GaAs layers and single junction GaAs cells on Si wafers which utilize compositionally graded GeSi intermediate buffers grown by ultra‐high vacuum chemical vapor deposition (UHVCVD) to mitigate the large lattice mismatch between GaAs and Si. GaAs cell structures were found to incorporate a threading dislocation density of 0.9–1.5×10 cm⁻², identical to the underlying relaxed Ge cap of the graded buffer, via a combination of transmission electron microscopy, electron beam induced current, and etch pit density measurements. AlGaAs/GaAs double heterostructures were grown on the GeSi/Si substrates for time‐resolved photoluminescence measurements, which revealed a bulk GaAs minority carrier lifetime in excess of 10 ns, the highest lifetime ever reported for GaAs on Si. A series of growths were performed to assess the impact of a GaAs buffer layer that is typically grown on the Ge surface prior to growth of active device layers. We found that both the high lifetimes and low interface recombination velocities are maintained even after reducing the GaAs buffer to a thickness of only 0.1 μm. Secondary ion mass spectroscopy studies revealed that there is negligible cross diffusion of Ga, As and Ge at the III–V/Ge interface, identical to our earlier findings for GaAs grown on Ge wafers using MBE. This indicates that there is no need for a buffer to ‘bury’ regions of high autodoping, and that either pn or np configuration cells are easily accommodated by these substrates. Preliminary diodes and single junction AlGaAs heteroface cells were grown and fabricated on the Ge/GeSi/Si substrates for the first time. Diodes fabricated on GaAs, Ge and Ge/GeSi/Si substrates show nearly identical I–V characteristics in both forward and reverse bias regions. External quantum efficiencies of AlGaAs/GaAs cell structures grown on Ge/GeSi/Si and Ge substrates demonstrated nearly identical photoresponse, which indicates that high lifetimes, diffusion lengths and efficient minority carrier collection is maintained after complete cell processing. Copyright © 2000 John Wiley & Sons, Ltd.     

Effects of high-temperature rapid thermal annealing for seed layers on the crystallographic evolution in hydrothermal ZnO nanostructures

In this work, we investigated effects of high temperature rapid thermal annealing for the zinc oxide (ZnO) seed layers on the growth morphology and crystal orientation of hydrothermal ZnO nanorods (NRs). The seed layers were prepared by sol–gel spin coating and annealed by two-step rapid thermal processes at different peak temperatures ranging from 600 to 900 °C for a short time period of 1 min. The seed layers annealed in a temperature range of 600–800 °C were all polycrystalline; however, they exhibited a highly Zn-deficient amorphous state when annealed at 900 °C as observed by X-ray photoelectron spectroscopy, X-ray diffraction (XRD), and cross-sectional transmission electron microscopy (TEM). The vertical NRs normal to the substrate were grown along [001] direction atop the polycrystalline seeds annealed at 600–800 °C, whereas different growth morphology of flower-like NRs was observed on the seeds annealed at 900 °C with the strongest XRD peak along the [100] orientation. From our cross-sectional TEM analysis, this flower-like architecture was initiated from the pioneer crystals laterally grown along [001] direction guiding the subsequent growth of petal NRs oriented by a slight difference in growth direction.     

Structural and electrical characterization of platinum (~15 at%) doped nickel silicides on Si(100) and SiGe/Si(100) substrates

Ni(Pt~15 at%)Si/Si(100) and Ni(Pt~15 at%)SiGe/SiGe/Si(100) films corresponding to rapid thermal annealing (RTA1) temperatures of 220, 230 and 240 °C with constant RTA2 (at 420 °C) have been investigated for sub 20 nm devices. X-ray reflectometry (XRR), X-ray diffraction (XRD), four point probe, and atomic force microscopy (AFM) techniques were employed for the characterization of NiSi and NiSiGe films. XRR results indicated that NiSi and NiSiGe film thicknesses increased with RTA1 temperatures. NiSi films densities increased with layer thickness but NiSiGe films displayed an opposite trend. The diffractograms revealed that NiSi and NiSiGe layers contain identical phases and possessed fiber texture at 220 °C. Whereas, the peaks shift were observed for NiSi (211) and NiSi (021) at higher RTA1 temperatures which appear due to Pt diffusion (hexagonal structures of larger grain size were noted). NiSiGe crystallites self-alignment was observed because of strained SiGe/Si(100) substrate. At 240 °C, NiSiGe layer showed the smallest crystallites. This is believed to be due to Pt distributed along the silicide grain boundaries which obstructs silicide grain growth. NiSi and NiSiGe sheet resistance decreased significantly with increase in RTA1 temperatures and found to correlate with multiple grain orientation. AFM revealed a smooth-stable surface morphology for all films.     

Passivation of carbon acceptors during growth of carbon-doped GaAs,InGaAs, and HBTs by MOCVD

Carbon dopedp-type GaAs and In_0.53Ga_0.47As epitaxial layers have been grown by low-pressure metalorganic chemical vapor deposition using CC1₄ as the carbon source. Low-temperature post-growth annealing resulted in a significant increase in the hole concentration for both GaAs and In_0.53Ga_0.47As, especially at high doping levels. The most heavily doped GaAs sample had a hole concentration of 3.6 × 10²⁰ cm⁻³ after a 5 minute anneal at ≈400° C in N₂, while the hole concentration in In_0.53Ga_0.47As reached 1.6 × 10¹⁹ cm⁻³ after annealing. This annealing behavior is attributed to hydrogen passivation of carbon acceptors. Post-growth cool-down in an AsH₃/H₂ ambient was found to be the most important factor affecting the degree of passivation for single, uncapped GaAs layers. No evidence of passivation is observed in the base region of InGaP/GaAs HBTs grown at ≈625° C. The effect ofn-type cap layers and cool-down sequence on passivation of C-doped InGaAs grown at ≈525° C shows that hydrogen can come from AsH₃, PH₃, or H₂, and can be incorporated during growth and during the post-growth cool-down. In the case of InP/InGaAs HBTs, significant passivation was found to occur in the C-doped base region.