缩减交互并行操作--一种新的ATM信令系统结构

针对如何提高ＡＴＭ网络处理ＳＶＣ呼叫的速度，在开发商用ＡＴＭ交换系统的实际工作中，创造性地提出了一种新的ＡＴＭ信令系统模型－缩减交互并行操作模型。ＲＩＰＯ方案中，只有专网边缘交换机处理ＡＴＭ信令消息，而用户面的跨越专网的连接则是由专门的服务器并行操作网中交换机完成的。ＲＩＰＯ模型可以明显提高网络处理呼叫的速度。依据该方案开发的ＡＴＭ交换系统通过了１９９７年底原邮电部的产品鉴定２。     

延时受限启发式组播路由算法

给出了一种带延时约束的组播路由算法，旨在确定组播路由，不仅要使网络通信的费用达到最小，而且要保证源节点到每个目的节点的延时满足给定约束。此算法具有易于实现、计算量小且所需传递信息量小等优点。仿真结果表明此算法性能良好。     

一种新型的ATM交换结构——二分输出排队结构

提出了一种新型的ATM交换结构－－基于二分输出排队交换结构,它可在现有工艺水平下大幅度降低存储器和总线的操作速度,从而提高时分交换机的容量,并在降低实现成本的同时,保持了同基本输出排队结构相同时延性能及时分交换机的多播功能。     

H3CS5800万兆路由交换机以太网组网应用

H3CS5800万兆路由交换机是杭州华三通信技术有限公司自主研发的旗舰核心路由交换机,该产品基于自适应安全网络技术理念研发,能提供大容量、高性能的L2/L3交换服务,并融合硬件IPv6、网络安全等智能特性。以湖南佳乐实业有限公司为湖南某财政局组建以太网为实例,详细介绍H3CS5800万兆路由交换机在局域网组网中的应用,并对H3CS5800交换机优越技术性能作较充分说明。     

三层交换机的工作原理

目的 研究三层交换机的工作原理及性能。方法 以ＢＡＹ公司的Ｓｗｉｔｃｈ Ｎｏｄｅ为全估层交换机的自学习方式和路由选择方法，结果 三层交换机路由选择所花延迟时间比一般路由器少得多。结论 三层交换机能代替路由哭喊 实现子网与ＶＬＡＮ的连接功能。同时保持交换机低延迟、低价位、大容量的特性、能改善网络服务速度。     

E1速率话音数字流接入ATM网的方法及实现

在基于ＡＴＭ技术的Ｂ－ＩＳＤＮ网中，为使ＡＴＭ层能与高层业务类型无关，设置ＡＴＭ适配层实现与特定业务相关的功能，其中ＡＡＬ１适用于现有话音图像通信所需电路交换模式的承载业务。本文根据话音通信的业务特点以及ＡＡＬ１适配层所完成的功能，提出了一种优化的适配Ｅ１结构话音数字流的适配方法，从而减少了现有的ＰＤＨ网上以ＡＴＭ方式传送Ｅ１速率数字话音的实现复杂性。     

动力学系统精细积分算法的一种改进格式

将精细算法应用于动力学方程时,矩阵的阶数从Ｎ＊Ｎ增加到２Ｎ＊２Ｎ,本文利用动力方程的振型分解将问题转化为对角矩阵的计算,在不增加存储的条件下实现了动力方程精细算法计算。     

基于神经网络的组播路由调度方法

针对在高速包交换计算机网络中端到端时延及时延抖动限制的组播路由问题，提出了基于Ｈｏｐｆｉｅｌｄ神经网络的组播路由优化算法。实验表明，本算法能根据组播应用对时延及时延抖动限制的要求，快速，有效地构造最优组播树，有较强的实时性。     

基于IPv6的PIM-SMv2协议的设计与实现

在新一代互联网中,支持组播已成为对路由器的基本要求。PIM-SM是一个不依赖于某一特定单播路由协议的组播路由协议,为组播数据转发提供路由信息。本文介绍了高性能：IPv6路由器协议栈软件中基于原始套接字(Raw Socket)通信机制的PIM—SMv2协议的设计与实现,并搭建实验环境对实现的系统进行了测试。实验结果表明,该系统已具备IPv6组播功能。     

一种容错ATM交换机仿真分析

讨论了一种容错ATM交换机结构。在该交换机中通过提供子交换单元和扩展链路来增加冗余路径的数目，该结构可以容错多个故障，并且冗余路径的数目随着交换机级数的增加而指数增长。通过仿真的方法得到了该交换机的生存概率、容错水平和费效比3个参数，可以看出该交换机容错性能和费效比高于目前文献上可查到的容错ATM交换机。     

Capturing emerging complex interactions: Safety analysis in air traffic management

The future development of air traffic management (ATM), set by the ATM 2000+ Strategy, involves a structural revision of ATM processes, a new ATM concept and a system approach for the ATM network. This requires ATM services to go through significant structural, operational and cultural changes that will contribute towards the ATM 2000+ Strategy. Moreover, from a technology viewpoint, future ATM services will employ new systems forming the emergent ATM architecture underlying and supporting the European Commission's Single European Sky Initiative. Introducing safety relevant systems in ATM contexts requires us to understand the risk involved in order to mitigate the impact of possible failures. This paper is concerned with some limitations of safety analysis with respect to operational aspects of introducing new systems (functionalities).     

Asynchronous transfer mode distribution network by use of an optoelectronic VLSI switching chip

We describe a new optoelectronic switching system demonstration that implements part of the distribution fabric for a large asynchronous transfer mode (ATM) switch. The system uses a single optoelectronic VLSI modulator-based switching chip with more than 4000 optical input-outputs. The optical system images the input fibers from a two-dimensional fiber bundle onto this chip. A new optomechanical design allows the system to be mounted in a standard electronic equipment frame. A large section of the switch was operated as a 208-Mbits/s time-multiplexed space switch, which can serve as part of an ATM switch by use of an appropriate out-of-band controller. A larger section with 896 input light beams and 256 output beams was operated at 160 Mbits/s as a slowly reconfigurable space switch.     

Solving numerical difficulties for element-free Galerkin analyses

This study solves the numerical problems associated with the element-free Galerkin method (EFGM) to perform analyses efficiently in shared-memory computers. The truncation error is generally large for the moving least-squares approximation, and this can be overcome by using orthogonal basis functions, 16-byte floats, or the local origin. Then, the analysis accuracy is similar to that obtained with the reproducing kernel particle approximation. Determining the index array of the global stiffness matrix requires a large amount of computer memory. We thus propose a scheme to overcome this problem using slightly more computer time but much less computer memory. A binary search is also proposed to find the support domain nodes for Gaussian points, and this method is much more efficient than the linear search one. A Fortran module is developed to establish parallel solutions in the EFGM, and the programmer does not need to handle the global stiffness directly.     

A new cryogenic memory system

The recently developed "current stretch" technique, a low temperature integration and amplification of sense signals, offers new freedom in the design of cryogenic memory cells. This scheme makes the sense voltage independent of cell switching speed and gives a good signal-to-noise ratio. A memory system using a double hole tin film storage cell driven by cryotron trees is described. Current stretch sensing is done through the trees so that no sense line is required. The cell operating range, which can be made arbitrarily large, has been set at 40 percent in the present study. Cells have been tested at densities of 10³bit/in²and switching speeds of 100 ns. Densities of 10⁴bit/in²appear feasible with existing fabrication techniques. In sizes of 10⁸cells or above, this memory system appears cheaper than any known room temperature technique of equal speed.     

Human error in European air traffic management: the HERA project

The majority of accidents in hazardous activities are caused by human error. This problem is not new, and a good deal of research, application, and development of practical techniques for the analysis, prediction and reduction of human errors or their negative effects, has occurred in a range of industries. Whilst human error within flight operations has for some time been the centre of exhaustive research and debate, a similar analysis within the field of air traffic management (ATM) is not so comprehensive. Therefore, it may be that ATM can learn from other industries.This paper deals with an approach to ATM incident analysis that is being developed in the European ATM arena. This new approach aims to determine how and why human errors are contributing to incidents, and thus how to improve human reliability within a high-reliability system. This developing approach is called ‘HERA’ — Human Error in ATM Project.The paper reports on a formative part, or phase 1, of a project that reviewed the theoretical and practical literature to determine the best conceptual framework upon which to base an ATM incident analysis tool. The conceptual framework chosen is that of human performance from an information processing perspective, which has been adapted to make it more contextually relevant to ATM. A prototype structure was adopted for a technique with which to analyse ATM incidents. This paper summarises the review of the literature surveyed, and briefly describes the structure of the prototype technique.     

VPN技术在IP组播视频会议系统中的应用

 针对IP组播视频会议系统在共网上部署应用时出现的安全性差、费用高、IP组播路由器资源有限等问题,提出在Internet上应用VPN技术来实现IP组播视频会议系统的解决方案,并介绍了系统的VPN网络结构和实施方法.同时,还对VPN技术的基本概念、关键技术及其特点和IP组播视频会议系统的总体设计作了简单阐述.最后在广域网上对该会议系统进行了测试.测试结果表明,实现了在广域网上运行IP组播会议系统,并有效地保证会议数据传输的安全性和可靠性.     

新型光缓存器及2×622Mb／sATM光交换系统

给出了一种新型的光缓存器的结构，以解决在ＡＴＭ光交换中的信元碰撞问题。这种缓存器是由光纤延迟线、光波导开关阵及非线性半导体光放大器构成。文中还报告了一种用于交换各用户不同速率的信元（可达６２２Ｍｂ／ｓ）的ＡＴＭ光交换实验系统，系统的总容量为了１．２Ｇｂ／ｓ。     

Optical implementation of asynchronous-transfer-mode header-error control

The asynchronous transfer mode (ATM) is a promising technique for broadband switching that is capable of supporting high-bit-rate multimedia services. Progress in all-optical parallel processing shows that photonics may be used in the future in full-functionality ATM switching nodes. All-optical switching fabrics and buffers have already been demonstrated. Fewer studies have been dedicated to ATM header-processing functions. As an example of photonic header processing, the implementation of a header-error control (HEC) subsystem by means of an optical circuit is investigated. Although traditional electronic decoders perform HEC in a serial mode, the architecture chosen for the optical HEC subsystem is based on parallelism, and an appropriate parallel-decoding algorithm was used in designing it.