A programmable FIR digital filter using CSD coefficients

An area-efficient programmable FIR digital filter using canonic signed-digit (CSD) coefficients was implemented that uses a switchable unit-delay to allocate the desired number of nonzero CSD coefficient digits to each filter tap. The prototype chip can allocate up to 16 pairs of nonzero CSD coefficient digits for a linear-phase filter, thus realizing filters with 32 linear-phase taps operating at 180 MHz with two nonzero CSD digits per filter tap. Additional nonzero CSD digits can be allocated to filter taps at the penalty of a reduced filter length and a reduced data-rate. The chip was implemented with 16-bit I/O in a die size of 5.9 mm by 3.4 mm using 1.0-μm CMOS technology     

FIR滤波器线性相位特性的研究

本文通过对滤波器的线性相位研究,介绍FIR滤波器的线性相位的4种特性,详细分析了FIR滤波器的线性相位的幅度特性,并在MATLAB下对FIR滤波器的4种特性进行模拟仿真实验,得到FIR数字滤波器的相位特性只取决于冲击响应的对称性.     

Cosine-modulated FIR filter banks with linear phase and paraunitaryproperties

A new class of cosine-modulated FIR filter banks is proposed. The necessary and sufficient condition is given which ensures that the filter banks satisfy the paraunitary and linear phase properties simultaneously. The prototype filter can be designed by optimising its stopband energy on the two-channel lattice parameters, and the filter banks can be implemented efficiently using DCT and DST     

常系数FIR中的CSD串并乘法器设计

介绍了二进制数的Canonic Signed Digit(CSD)表示的特点,0位值比其他表示方法都要多.应用这一点在常系数的乘法器中,可以化简电路.阐述了CSD串并乘法器的具体化简过程,并应用这一技术于IS95-WCDMA中的脉冲整形23阶常系数FIR的设计中,面积缩小达42%.结果表明:CSD的化简效果是明显的.     

A new method for higher-order linear phase FIR digital filter using shifted Chebyshev polynomials

In this work, a new method for the design of linear phase finite impulse response (FIR) filters using shifted Chebyshev polynomial is proposed. In this method, magnitude response of FIR filter is approximated with the help of shifted Chebyshev polynomials. The number of polynomials used for approximation depends upon the order of filter. Design problem of filter is constructed as minimization of integral mean-square error between the ideal response and actual response through differentiating it with respect to its coefficients, which leads to a system of linear equations. The simulation results included in this paper show the efficiency of proposed method. It is also evident from the results that the proposed method is suitable for higher filter taps.     

FPGA-based digit-serial CSD FIR filter for image signal format conversion

This paper proposes the FPGA implementation of the digit-serial Canonical Signed-Digit (CSD) coefficient FIR filters which can be used as format conversion filters in place of the ones employed for the MPEG2 TM 5 (test model 5). Canonical representation of a signed digit (CSD) is a method used to reduce cost by representing a signed number using the least amount of non-zero digits, thereby reducing the number of multiply operations. As Field Programmable Gate Arrays (FPGAs) have grown in capacity, improved in performance, and decreased in cost, they are becoming a viable solution for performing computationally intensive tasks, with the ability to tackle applications formerly reserved for custom chips and programmable digital signal processing (DSP) devices. A digit-serial CSD FIR filter design is realized and practical design guidelines are provided using FPGAs. An analysis of the performance comparison of bit-serial, serial distributed arithmetic, and digit-serial CSD FIR filters on a Xilinx XC4000XL-series FPGA is described. The results show that the proposed digit-serial CSD FIR filter is compact and an efficient implementation of real-time DSP applications on FPGAs.     

基于CSD编码遗传算法的FIR滤波器优化设计

本文主要研究了采用CSD(canonic signed digit)编码的遗传算法对FIR(Finite Impulse Response)滤波器系数进行的有限精度优化,并对传统的CSD编码方法进行了改进,使之能够更快地收敛到最优解.针对CSD编码经过交叉、变异后可能出现的问题,提出了解码替代的解决方法.在级联滤波器的设计中,采用了波纹互相抵消技术使设计的级联滤波器通带内纹波大大降低.     

Low-power and area-efficient FIR filter implementation suitable for multiple taps

This paper describes a 32-tap finite impulse response (FIR) filter with two 16-tap macros suitable for multiple taps. The derived condition for a coded coefficient and data block shows 35% savings in power consumption and 44% improvement in occupied area compared to a typical radix-4 modified Booth algorithm. According to the condition and separated shifting-accessing clock scheme, we have implemented a 32-tap FIR filter in 0.6-/spl mu/m CMOS technology with three levels of metal. The chip that occupies 2.3/spl times/2.5 mm/sup 2/ of silicon area has an operating frequency of 20 MHz and consumes 75 mW at V/sub dd/=3.3 V.     

一种二阶锥规划通带线性相位FIR滤波器的设计

在有限冲激响应（Finite Impulse Response,FIR）滤波器设计中,如果系统只要求通带或某个频域区间具有线性相位而其他频域区间相位非线性,则系数对称的FIR滤波器设计方法不再适用。为此,提出了一种基于二阶锥规划（Second-Order Cone Programming,SOCP）的通带线性相位FIR滤波器设计方法。该方法使用二阶锥规划实现滤波器设计,其中优化目标为通带最小群延迟,约束条件为全频域振幅误差。实验结果显示,所提方法设计的FIR滤波器有着很好的幅频特性和通带线性相位,通带群延迟误差很小。该方法实现简单,计算复杂度低,可以广泛应用于数字信号处理领域。     

A new closed form method for design of variable bandwidth linear phase FIR filter using Bernstein multiwavelets

In this paper, a new method for the design of variable bandwidth linear-phase finite impulse response filters using Bernstein polynomial Multiwavelets is proposed. In this method, approximation has been achieved by linearly combining the fixed coefficient linear phase filters with Bernstein multiwavelets, which are used to tune bandwidth of the filter. Optimisation has been achieved by minimising the mean square error between the desired and actual filter response which leads to a system of linear equations. The matrix elements can be expressed in form of Toeplitz-plus-Hankel matrix, which reduces the computational complexity. The simulation results illustrate significant improvement in errors in passband (e_p), and stopband (e_s) as compared to earlier published work.     

A new closed form method for design of variable bandwidth linear phase FIR filter using different polynomials

In this paper, a new method for the design of variable bandwidth linear-phase finite impulse response (FIR) filters using different polynomials such as shifted Chebyshev polynomials, Bernstein polynomials and shifted Legendre polynomials is proposed. For this purpose, the transfer function of a variable bandwidth filter, which is a linear combination of fixed-coefficient linear-phase filters and the above polynomials are separately exploited as tuning parameters to control bandwidth of the filter. In order to determine the filter coefficients, mean squared difference between the desired variable bandwidth filter and the practical filter is minimized by differentiating it with respect to its coefficients leading to a system of linear equations. The matrix elements can be expressed in form of Toeplitz-plus-Hankel matrix, which reduces the computational complexity. Several examples are included to demonstrate effectiveness of the proposed method in terms of passband error (e_p), stopband error (e_s) and stopband attenuation (A_s).     

Design of linear phase FIR filters using the LMS algorithm

The application of the stochastic gradient (least mean square) algorithm, the design of linear phase finite impulse response (FIR) filters, is discussed. Analytical results are presented and supported by simulation experiments to demonstrate the superior performance of the LMS algorithm equipped with the linear phase constraint as compared to the standard LMS algorithm     

Design of linear phase FIR filters using fractional derivative constraints

In this paper, the designs of linear phase FIR filters using fractional derivative constraints are investigated. First, the definition of fractional derivative is reviewed briefly. Then, the linear phase FIR filters are designed by minimizing integral squares error under the constraint that the ideal response and actual response have several same fractional derivatives at the prescribed frequency point. Next, the fractional maximally flat FIR filters are designed by letting the number of fractional derivative constraints be equal to the number of filter coefficients. Finally, numerical examples are demonstrated to show that the proposed method has larger design flexibility than the conventional integer derivative constrained methods.     

新型高速CSD编码滤波器及VLSl的实现

通过对BOOTH型乘法器、高速加法器结构和CSD编码滤波器结构的深入研究,开发出一种新型高速CSD编码滤波器结构.采用此结构实现了正交幅度调制器中的一个高速反SINC滤波器,并在ALCATEL 0.35μm CMOS工艺实现.芯片规模7500门,面积1.00mm×0.42mm.     

Low-power CMOS switched-capacitor lowpass filter using current conveyors

A new approach is proposed to the design of high-order switched-capacitor LPFs of megahertz cutoff frequency for communications channel selection. It essentially uses current conveyors instead of op amps to achieve low power consumption. A fifth-order Chebyshev LPF with a 1-MHz cutoff frequency is thus synthesized and fabricated in a 0.35-μm CMOS technology. The LPF consumes less than 10 mW from a 3-V power supply and exhibits a third harmonic distortion better than ?54 dB in response to a 1-V sinusoidal input at the cutoff frequency. The rms noise voltage is at most 1.9 mV in a 2-MHz bandwidth.     

Quantized FIR filter design using compensating zeros

This article presents a design method for translating a finite impulse response (FIR) floating-point multiplierless filter design. Conventional wisdom dictates that finite word-length (i.e., quantization) effects can be minimized by dividing a filter into smaller, cascaded sections. In this design method, it is shown how to quantize the cascaded sections so that the finite word-length effects in one section are guaranteed to compensate for the finite word-length effects in the other section. This simple method called, "compensating zeros," ensures that: (1) the quantized filter's frequency response closely matches the unquantized filter's frequency response (in both magnitude and phase); and (2) the required hardware remains small and fast.     

Time-frequency distribution kernels using FIR filter designtechniques

In this correspondence, time-frequency distribution (TFD) kernels are obtained using finite impulse response (FIR) filter design methods, namely, the windowing method and the equiripple approximation method based on Chebyshev criterion. It is shown that the class of the window-designed kernels are simple to obtain and can handle most time-varying environments     

Transform domain adaptive linear phase filter

Describes a new adaptive linear-phase filter whose weights are updated by the normalized least-mean-square (LMS) algorithm in the transform domain. This algorithm provides a faster convergence rate compared with the time domain linear phase LMS algorithm. Various real-valued orthogonal transforms are investigated such as the discrete cosine transform (DCT), discrete Hartley transform (DHT), and power of two (PO2) transform, etc. By using the symmetry property of the transform matrix, an efficient implementation structure is proposed. A system identification example is presented to demonstrate its performance     

Low-power coefficient segmentation algorithm for FIR filterimplementation

A new multiplication algorithm is introduced for the low-power implementation of digital filters on CMOS based digital signal processing systems. The algorithm decomposes individual coefficients into two less complex subcomponents. The decomposition, performed using a heuristic approach, divides a given coefficient such that a part is produced which can be implemented using a single shift operation, leaving another part with a reduced wordlength to be applied to the coefficient input of the hardware multiplier. This results in a significant reduction in the amount of switched capacitance and consequently power consumption. The authors describe the algorithm and present associated results, including the effects of overheads due to shift operations, showing up to 63% saving in power     

Design of linear phase M-channel perfect reconstruction FIR filterbanks

We propose two approaches to design M channel nonparaunitary filter banks that satisfy perfect reconstruction (PR) and linear phase (LP) properties. In the first approach, the PR condition is imposed on only a high-pass filter. Although this method does not require nonlinear optimization, it has a demerit in that the order of a high-pass filter becomes high. In the second approach, two filters are optimized simultaneously using a Lagrange-Newton method. We can design PR filter banks that have the same length. The PR constraint is also formulated as a linear and nonlinear equation of the analysis filter coefficients. Finally, some design examples are included