In0.53Ga0.47As(1 0 0) native oxide removal by liquid and gas phase HF/H2O chemistries

The native oxide removal, surface termination, and stoichiometry of InGaAs(1 0 0) surfaces using liquid and gas phase HF/H₂O etching were studied using X-ray photoelectron spectroscopy. Oxide removal in liquid phase HF stopped at the As layer, producing either elemental or H-terminated As. The surface oxidized upon air exposure, forming a 4.8 Å As₂O₃ layer on an As rich InGaAs sub-surface (17% In, 16% Ga, 66% As). A sub atmospheric gas phase HF/H₂O process (100 Torr, 29 °C, 0.5 min) completely removed As₂O₃ and produced mainly In and Ga fluorides, since As fluoride is volatile at these experimental conditions. Once enough F accumulated on the surface, the water sticking probability decreased and the etching reaction proceeded at a much lower rate. The highest oxide removal (4.2 Å residual oxide) was achieved after 5 min of etching. As₂O₃ and As₂O₅ were completely removed and considerably more InF₃ and GaF₃ were produced. The surface contained a group III-fluoride rich overlayer (34% In, 36% Ga) on a slightly As rich bulk (21% In, 21% Ga, and 58% As). The As rich InGaAs sub-surface produced with both liquid and the longer gas phase HF treatments is intrinsic to HF-InGaAs chemistry, although the oxide removal mechanism is likely different.     

Interface composition of atomic layer deposited HfO2 and Al2O3 thin films on InAs studied by X-ray photoemission spectroscopy

We present a synchrotron-based XPS investigation on the interface between InAs and Al₂O₃ or HfO₂ layers, deposited by ALD at different temperatures, for InAs substrates with different surface orientations as well as for InAs nanowires. We reveal the composition of the native Oxide and how the high-κ layer deposition reduces Oxide components. We demonstrate some of the advantages in using synchrotron radiation revealing the variation in Oxide composition as a function of depth into the subsurface region and how we can indentify Oxides even on nanowires covering only a small fraction of the surface.     

Charge trapping and interface characteristics in normally-off Al2O3/GaN-MOSFETs

Normally-off GaN-MOSFETs with Al₂O₃ gate dielectric have been fabricated and characterized. The Al₂O₃ layer is deposited by ALD and annealed under various temperatures. The saturation drain current of 330 mA/mm and the maximum transconductance of 32 mS/mm in the saturation region are not significantly modified after annealing. The subthreshold slope and the low-field mobility value are improved from 642 to 347 mV/dec and from 50 to 55 cm² V⁻¹ s⁻¹, respectively. The I_D-V_G curve shows hysteresis due to oxide trapped charge in the Al₂O₃ before annealing. The amount of hysteresis reduces with the increase of annealing temperature up to 750 °C. The Al₂O₃ layer starts to crystallize at a temperature of 850 °C and its insulating property deteriorates.     

Etching characteristics of photoresist and low-k dielectrics by Ar/O2 ferrite-core inductively coupled plasmas

We have investigated the characteristics of Ar/O₂ plasmas in terms of the photoresist (PR) and low-k material etching using a ferrite-core inductively coupled plasma (ICP) etcher. We found that the O₂/(O₂+ Ar) gas flow ratio significantly affected the PR etching rate and the PR to low-k material etch selectivity. Fourier transform infrared spectroscopy (FTIR) and HF dipping test indicated that the etching damage to the low-k material decreased with decreasing O₂/(O₂ + Ar) gas flow ratio.     

Thermal and plasma enhanced atomic layer deposition ruthenium and electrical characterization as a metal electrode

Ruthenium thin films were grown by thermal and plasma-enhanced atomic layer deposition (PE-ALD) using O₂ and ammonia (NH₃) plasma, respectively. RuCp₂ and Ru(EtCp)₂ were used as Ru precursors. Pure and low resistivity (<20 μΩ cm) Ru films were grown by PE-ALD as well as thermal ALD. PE-ALD Ru showed no nucleation delay on various substrates including TaN_x, Si, and SiO₂, in contrast to thermal ALD Ru. And the root-mean-square (RMS) roughness of PE-ALD Ru was lower than that of thermal ALD Ru. Additionally, metal-oxide-semiconductor (MOS) capacitor composed of p-Si/ALD Ta₂O₅/ALD Ru (35 nm) was fabricated and C-V measurements were performed for as-deposited sample. Very small hysteresis of 20 mV was obtained, and effective work function difference to Si substrate was minimal as −0.03 V. For comparison, MOS capacitor was fabricated using sputtered Ru and large hysteresis of 0.5 V and flat band voltage (V_FB) shift to negative value were observed. This result indicates that ALD process produces more reliable, damage free Ru gate compared to sputtering process.     

Influence of temperature on the etching rate of SiO2 in CF4 + O2 plasma

The plasmochemical etching of SiO₂ in CF₄ + O₂ plasma is considered. During the experiment SiO₂ films are etched in CF₄ + O₂ plasma at temperatures of 300 and 350 K. The dependences of plasmochemical etching rates of SiO₂ on O₂ content in the feed are measured. The experimental measurements are compared with theoretical calculations. The obtained theoretical results are used to predict the real dimensions of etched trenches. It is found that decrease in temperature reduces lateral undercutting due to decreased desorption of formed SiF₄ molecules from the sidewalls.     

Influence of activated polymer on the etching rate of SiO2 in CF4 + H2 plasma

The reactive ion etching (RIE) of SiO₂ in CF₄ + H₂ plasma is considered. The influence of activated polymer on the RIE rate of SiO₂ in CF₄ + H₂ plasma is determined by extrapolation of experimentally measured kinetics of the etching rate. It is found that the increased surface coverage by CF₂ radicals suppresses the RIE rate of SiO₂ in CF₄ + H₂ plasma during the initial stages of the etching process. The formation of activated polymer becomes pronounced when adsorbed CF₂ radicals are slowly activated. The activated polymer intensifies the etching reaction and enhances the etching rate. At the same time, the activated polymer intensifies the polymerization reactions. The increased surface coverage by the polymer suppresses the RIE rate of SiO₂ in CF₄ + H₂ plasma at later stages of the etching process.     

ALD of LaHfOx nano-laminates for high-κ gate dielectric applications

Electrical properties and thermal stability of LaHfO_x nano-laminate films deposited on Si substrates by atomic layer deposition (ALD) have been investigated for future high-κ gate dielectric applications. A novel La precursor, tris(N,N′-diisopropylformamidinato) lanthanum [La(ⁱPrfAMD)₃], was employed in conjunction with conventional tetrakis-(ethylmethyl)amido Hf (TEMA Hf) and water (H₂O). The capacitance-voltage curves of the metal oxide semiconductor capacitors (MOSCAPs) showed negligible hysteresis and frequency dispersion, indicating minimal deterioration of the interface and bulk properties. A systematic shift in the flat-band voltage (V_fb) was observed with respect to the change in structure of nano-laminate stacks as well as La₂O₃ to HfO₂ content in the films. The EOTs obtained were in the range of ∼1.23-1.5 nm with leakage current densities of ∼1.3 × 10⁻⁸ A/cm² to 1.3 × 10⁻⁵ A/cm² at V_fb − 1 V. In addition, the films with a higher content of La₂O₃ remained amorphous up to 950 °C indicating very good thermal stability, whereas the HfO₂ rich films crystallized at lower temperatures.     

Materials characterization of WNxCy, WNx and WCx films for advanced barriers

A ternary WN_xC_y system was deposited in a thermal ALD (atomic layer deposition) reactor from ASM at 300 °C in a process sequence using tungsten hexafluoride (WF₆), triethyl borane (TEB) and ammonia (NH₃) as precursors. The WC_x layers were deposited by a novel ALD process at a process temperature of 250 °C. The WN_x layers were deposited at 375 °C using bis(tert-butylimido)-bis-(dimethylamido)tungsten (^tBuN)₂(Me₂N)₂W (imido-amido) and NH₃ as precursors. WN_x grows faster on plasma enhanced chemical vapor deposition (PECVD) oxide than WC_x does on chemical oxide. WN_xC_y grows better on PECVD oxide than on thermal oxide, which is opposite of what is seen for WN_x. In the case of the ternary WN_xC_y system, the scalability towards thinner layers and galvanic corrosion behavior are disadvantages for the incorporation of the layer into Cu interconnects. ALD WC_x based barriers have a low resistivity, but galvanic corrosion in a model slurry solution of 15% peroxide (H₂O₂) is a potential problem. Higher resistivity values are determined for the binary WN_x layers. WN_x shows a constant composition and density throughout the layer.     

New TIT capacitor with ZrO2/Al2O3/ZrO2 dielectrics for 60 nm and below DRAMs

New ZrO₂/Al₂O₃/ZrO₂ (ZAZ) dielectric film was successfully developed for DRAM capacitor dielectrics of 60 nm and below technologies. ZAZ dielectric film grown by ALD has a mixture structure of crystalline phase ZrO₂ and amorphous phase Al₂O₃ in order to optimize dielectric properties. ZAZ TIT capacitor showed small Tox.eq of 8.5 Å and a low leakage current density of 0.35 fA/cell, which meet leakage current criteria of 0.5 fA/cell for mass production. ZAZ TIT capacitor showed a smaller cap leak fail bit than HAH capacitor and stable leakage current up to 550 °C anneal. TDDB (time dependent dielectric breakdown) behavior reliably satisfied the 10-year lifetime criteria within operation voltage range.     

N2 effect on GaAs etching at 150 mTorr capacitively-coupled Cl2/N2 plasma

The role of N₂ on GaAs etching at 150 mTorr capacitively-coupled Cl₂/N₂ plasma is reported. A catalytic effect of N₂ was found at 20-25% N₂ composition in the Cl₂/N₂ discharges. The peak intensities of the Cl₂/N₂ plasma were monitored with optical emission spectroscopy (OES). Both atomic Cl (725.66 nm) and atomic N (367.05 nm) were detected during the Cl₂/N₂ plasma etching. With the etch rate and OES results, we developed a simple model in order to explain the etch mechanism of GaAs in the high pressure capacitively-coupled Cl₂/N₂ plasma as a function of N₂ ratio. If the plasma chemistry condition became positive ion-deficient at low % N₂ or reactive chlorine-deficient at high % N₂ in the Cl₂/N₂ plasma, the GaAs etch rate is reduced. However, if the plasma had a more balanced ratio of Cl₂/N₂ (i.e. 20-25% N₂) in the plasma, much higher etch rates (up to 150 nm/min) than that in pure Cl₂ (50 nm/min) were produced due to synergetic effect of neutral chlorine adsorption and reaction, and positive ion bombardment. Pure Cl₂ etching produced 14 nm of RMS surface roughness of GaAs. Introduction of ?20% N₂ gas in Cl₂/N₂ discharges significantly reduced the surface roughness to 2-4 nm. SEM photos showed that the morphology of photoresist mask was strongly degraded. Etch rate of GaAs slightly increased from 10 to 40 nm/min when RIE chuck power changed from 10 to 150 W at 12 sccm Cl₂/8 sccm N₂ plasma condition. The surface roughness of GaAs etched at 12 sccm Cl₂/8 sccm N₂ plasma was 2-3 nm.     

New plasma chemistries for etching III–V compound semiconductors: Bl3 and BBr3

We investigated inductively coupled plasma (ICP) etching of both In-containing (InP, InAs, and InSb) and Ga-containing compound semiconductors (GaAs, GaP, and GaSb) in two new chemistries: BI₃ and BBr₃ with addition of Ar. Etch rates as high as 2 μm·min⁻¹ were obtained for InP in both types of discharge while for GaAs maximum rates were 1 and 2.5 μm·min⁻¹, respectively, in BI₃ and BBr₃. The rates were strongly dependent on plasma composition, ICP source power and radio frquency chuck power. BI₃ etching produced much smoother surfaces on both GaAs and InP, while maintaining the near-surface stoichiometry. Etch selectivities ≥ 10 were obtained for GaAs and InP over SiO₂ and SiN_x masks. The BI₃ chemistry appears attractive as an universal etchant for In-based and Ga-based compound semiconductors.     

Preparation and characterization of thin films of MgO,Al2O3 and MgAl2O4 by atomic layer deposition

MgO, Al₂O₃ and MgAl₂O₄ thin films were deposited on silicon substrates at various temperatures by the atomic layer deposition (ALD) method using bis(cyclopentadienyl)magnesium, triethylaluminum, and H₂O and were characterized systematically. High-quality polycrystalline MgO films were deposited for a substrate temperature above 500°C, and amorphous thin films were deposited around 400°C. The deposited Al₂O₃ and MgAl₂O₄ thin films were characterized as amorphous in structure. Applicability of ALD to complex oxides is discussed.     

Fabrication and electrical characteristics of ultrathin (HfO2)x(SiO2)1−x films by surface sol-gel method and reaction-anneal treatment

Hafnium oxide (HfO₂) films were deposited on Si substrates with a pre-grown oxide layer using hafnium chloride (HfCl₄) source by surface sol-gel process, then ultrathin (HfO₂)_x(SiO₂)_1−x films were fabricated due to the reaction of SiO₂ layer with HfO₂ under the appropriate reaction-anneal treatment. The observation of high-resolution transmission electron microscopy indicates that the ultrathin films show amorphous nature. X-ray photoelectron spectroscopy analyses reveal that surface sol-gel derived ultrathin films are Hf-Si-O alloy instead of HfO₂ and pre-grown SiO₂ layer, and the composition was Hf_0.52Si_0.48O₂ under 500 °C reaction-anneal. The lowest equivalent oxide thickness (EOT) value of 0.9 nm of film annealed at 500 °C has been obtained with small flatband voltage of −0.31 V. The experimental results indicate that a simple and feasible solution route to fabricate (HfO₂)_x(SiO₂)_1−x composite films has been developed by means of combination of surface sol-gel and reaction-anneal treatment.     

Semiconductor nanowires surrounded by cylindrical Al2O3 shells

The GaN, GaP, InP, Si₃N₄, SiO₂/Si, SiC, and ZnO semiconductor nanowires were synthesized by a variety of growth methods, and they were wrapped cylindrically with amorphous aluminum oxide (Al₂O₃) shells. The Al₂O₃ was deposited on these seven different semiconductor nanowires by atomic layer deposition (ALD) at a substrate temperature of 200°C using trimethylaluminum (TMA) and distilled water (H₂O). Transmission electron microscopy (TEM) images taken for the nanowires revealed that Al₂O₃ cylindrical shells surround uniformly all these semiconductor nanowires. Our TEM study illustrates that the ALD of Al₂O₃ has an excellent capability to coat any semiconductor nanowires conformally; its coating capability is independent of the chemical component, lattice structure, and growth direction of the nanowires. This study suggests that the ALD of Al₂O₃ on nanowires is one of the promising methods to prepare cylindrical dielectric shells in coaxially gated, nanowire field-effect transistors (FETs).     

Improvement on low-temperature deposited HfO2 film and interfacial layer by high-pressure oxygen treatment

In this study, high-pressure oxygen (O₂ and O₂ + UV light) technologies were employed to effectively improve the properties of low-temperature-deposited metal oxide dielectric films and interfacial layer. In this work, 13 nm HfO₂ thin films were deposited by sputtering method at room temperature. Then, the oxygen treatments with a high-pressure of 1500 psi at 150 °C were performed to replace the conventional high temperature annealing. According to the XPS analyses, integration area of the absorption peaks of O-Hf and O-Hf-Si bonding energies apparently raise and the quantity of oxygen in deposited thin films also increases from XPS measurement. In addition, the leakage current density of standard HfO₂ film after O₂ and O₂ + UV light treatments can be improved from 3.12 × 10⁻⁶ A/cm² to 6.27 × 10⁻⁷ and 1.3 × 10⁻⁸ A/cm² at |Vg| = 3 V. The proposed low-temperature and high pressure O₂ or O₂ + UV light treatment for improving high-k dielectric films is applicable for the future flexible electronics.     

Infrared spectroscopy and X-ray diffraction studies on the crystallographic evolution of La2O3 films upon annealing

Rare earth oxides (REOs) have lately received extensive attention in relation to the continuous scaling down of non-volatile memories (NVMs). In particular, La₂O₃ films are promising for integration into future NVMs because they are expected to crystallize above 400 °C in the hexagonal phase (h-La₂O₃) which has a higher κ value than the cubic phase (c-La₂O₃) in which most of REOs crystallize. In this work, La₂O₃ films are grown on Si by atomic layer deposition using La(C₅H₅)₃ and H₂O. Within the framework of the h-La₂O₃ formation, we systematically study the crystallographic evolution of La₂O₃ films versus annealing temperature (200-600 °C) by Fourier transform infrared spectroscopy (FTIR) and grazing incidence X-ray diffraction (GIXRD). As-grown films are chemically unstable in air since a rapid transformation into monoclinic LaO(OH) and hexagonal La(OH)₃ occurs. Vacuum annealing of sufficiently thick (>100 nm) La(OH)₃ layers induces clear changes in FTIR and GIXRD spectra: c-La₂O₃ gradually forms in the 300-500 °C range while annealing at 600 °C generates h-La₂O₃ which exhibits, as inferred from our electrical data, a desirable κ ∼ 27. A quick transformation from h-La₂O₃ into La(OH)₃ occurs due to H₂O absorption, indicating that the annealed films are chemically unstable. This study extends our recent work on the h-La₂O₃ formation.     

Remote phonon and surface roughness limited universal electron mobility of In0.53Ga0.47As surface channel MOSFETs

The inversion layer electron mobility in n-channel In_0.53Ga_0.47As MOSFET’s with HfO₂ gate dielectric with several substrate impurity concentrations (∼1 × 10¹⁶ cm⁻³ to ∼1 × 10¹⁸ cm⁻³) and various surface preparations (HF surface clean, (NH₄)₂S surface clean and PECVD a-Si interlayer with a HfO₂ gate dielectric) have been studied. The peak electron mobility is observed to be strongly dependent on the surface preparation, but the high field mobility is observed to be almost independent of the surface preparation. A detailed analysis of the effective mobility as a function of electric field, substrate doping, and temperature was used to determine the various mobility components (surface roughness, phonon, and coulombic scattering limited mobility components). For the substrates with high doping concentration, the electron mobility at low vertical electric field is dominated by Coulomb scattering from the substrate dopants, whereas, for lower substrate doping the Coulombic scattering is dominated by the disorder induced gap states. Low temperature measurements were used to determine the surface roughness scattering and phonon components. The results show that room temperature mobility of In_0.53Ga_0.47As surface channel MOSFETs with HfO₂ gate dielectric at high electric field is limited primarily by remote phonons whereas the Al₂O₃ gate dielectric is limited by surface roughness scattering.     

Influence of the metal electrode on the characteristics of thermal Ta2O5 capacitors

The effect of various electrodes (Al, W, TiN) deposited by evaporation (Al) and sputtering (W, TiN) on the electrical characteristics of thermal thin film (15-35 nm) Ta₂O₅ capacitors has been investigated. The absolute level of leakage currents, breakdown fields, mechanism of conductivity, dielectric constant values are discussed in the terms of possible reactions between Ta₂O₅ and electrode material as well as electrode deposition process-induced defects acting as electrically active centers. The dielectric constant values are in the range 12-26 in dependence on both Ta₂O₅ thickness and gate material. The results show that during deposition of TiN and Al a reaction that worsens the properties of Ta₂O₅ occurs while there is not an indication for detectable reduction of Ta₂O₅ when top electrode is W, and the leakage current is 5-7 orders of magnitude lower as compared to Al and TiN-electroded capacitors. The high level of leakage current for TiN and Al gate capacitors are related to the radiation defects generated in Ta₂O₅ during sputtering of TiN, and damaged interface at the electrode due to a reaction between Al and Ta₂O₅, respectively. It is demonstrated that the quality of the top electrode affects the electrical characteristics of the capacitors and the sputtered W is found to be the best. The sputtered W gate provides Ta₂O₅ capacitors with a good quality: the current density <7 × 10⁻¹⁰ A/cm² at 1 V (0.7 MV/cm, 15 nm thick Ta₂O₅). W deposition is not accompanied by an introduction of a detectable damage leading to a change of the properties of the initial as-grown Ta₂O₅ as in the case of TiN electrode. Damage introduced during TiN sputtering is responsible for current deterioration (high leakage current) and poor breakdown characteristics. It is concluded that the sputtered W top electrode is a good candidate as a top electrode of storage capacitors in dynamic random access memories giving a stable contact with Ta₂O₅, but sputtering technique is less suitable (favorable) for deposition of TiN as a metal electrode due to the introduction of radiation defects causing both deterioration of leakage current and poor breakdown characteristics.     

Low-cost supercritical CO2/H2O2 treatment on ITO anodes of fluorescent organic light-emitting diodes

A simple and cost-effective approach is proposed as an alternative to conventional oxygen plasma treatment to modify surface property of Indium tin oxide (ITO) anode of a fluorescent organic light-emitting diode (OLED). This was achieved by treating the ITO anode in supercritical CO₂ (SCCO₂) fluids with hydrogen peroxide (H₂O₂). The SCCO₂/H₂O₂ treatment yielded an ITO work function of 5.35 eV after 15 min treatment at 85 °C and 4000 psi, which was significant higher than 4.8 eV of the as-cleaned ITO surface and was slightly less than 5.5 eV of the ITO surface treated by oxygen plasma. The highest work function achieved was 5.55 eV after 45 min SCCO₂/H₂O₂ treatment. The SCCO₂/H₂O₂ treatment can be used to tailor the ITO work function through changing the operation pressure of the treatment. In addition, the correlated dependence of OLED performance on the ITO anodes with and without the treatments was investigated. The maximum power efficiency of 1.94 lm/W was obtained at 17.3 mA/cm² for the device with 15 min SCCO₂/H₂O₂ treatment at 4000 psi. This power efficiency was 19.3% and 33.8% higher than those of the oxygen plasma treatment and as-clean, respectively. The improvement in device efficiency by the SCCO₂/H₂O₂ treatments can be attributed to enhanced hole injection and balance in charge carriers due to increased work function and surface energy of the ITO anodes.