Study of contact resistance of high-mobility organic transistors through comparisons

Realization of high-frequency low-cost organic electronics requires high-mobility organic field-effect transistors (OFETs) with short channels, where influence of contact resistance becomes more serious than either lower mobility or longer channel devices. To reduce the contact resistance, we systematically and quantitatively investigate the influence of the lowest unoccupied molecular orbital (LUMO) level of an electron acceptor layer, the active layer thickness, and the side chain of active layer itself on contact resistance of top-contact high-mobility OFETs through a series of comparative analysis. We find that the acceptor of 1,3,4,5,7,8-hexafluoro tetracyano naphtha quinodimethane (F₆TNAP) with a deeper LUMO level is efficient for carrier injection and that the bulk resistance plays an important role in such devices. By optimizing the parameters, we get the lowest contact resistance of only 110 Ω cm, and thus recorded effective mobility of 8.0 cm²/V s is attained for polycrystalline thin film transistors and still kept as high as 6 cm²/V s at shorter channel lengths.     

Oxide-based thin film transistors for flexible electronics

The continuous progress in thin film materials and devices has greatly promoted the development in the field of flexible electronics.As one of the most common thin film devices,thin film transistors (TFTs) are significant building blocks for flexible platforms.Flexible oxide-based TFTs are well compatible with flexible electronic systems due to low process temperature,high carrier mobility,and good uniformity.The present article is a review of the recent progress and major trends in the field of flexible oxide-based thin film transistors.First,an introduction of flexible electronics and flexible oxide-based thin film transistors is given.Next,we introduce oxide semiconductor materials and various flexible oxide-based TFTs classified by substrate materials including polymer plastics,paper sheets,metal foils,and flexible thin glass.Afterwards,applications of flexible oxide-based TFTs including bendable sensors,memories,circuits,and displays are presented.Finally,we give conclusions and a prospect for possible development trends.     

宽带隙ZnMgO的电学特性及其透明薄膜场效应晶体管

首次提出了用六方相晶体结构的宽带隙ZnMgO作为薄膜场效应晶体管（TFT）的沟道层，用立方相ZnMgO纳米晶体薄膜作为栅绝缘层，在实验中用透明的ITO导电玻璃作为衬底，通过连续沉积六方和立方相结构的纳米ZnMgO晶体薄膜，并通过光刻、电极工艺等，研制了透明的ZnO基TFT, TFT的电流开关比达到1E4，场效应迁移率为0.6cm2/(V·s).在偏压2.5MV/cm下漏电流为1E-8A.     

Impact of Materials versus Geometric Parameters on the Contact Resistance in Organic Thin‐Film Transistors

The contact resistance is known to severely hamper the performance of organic thin‐film transistors, especially when dealing with large injection barriers, high mobility organic semiconductors, or short channel lengths. Here, the relative significance of how it is affected by materials‐parameters (mobility and interfacial level‐offsets) and geometric factors (bottom‐contact vs top‐contact geometries) is assessed. This is done using drift‐diffusion‐based simulations on idealized device structures aiming at a characterization of the “intrinsic” situation in the absence of traps, differences in the film morphology, or metal‐atoms diffusing into the organic semiconductor. It is found that, in contrast to common wisdom, in such a situation the top‐contact devices do not always outperform the bottom‐contact ones. In fact, the observed ratio between the contact resistances of the two device structures changes by up to two orders of magnitude depending on the assumed materials parameters. The contact resistance is also shown to be strongly dependent on the hole mobility in the organic semiconductor and influenced by the chosen point of operation of the device.     

Influences of buried-oxide interface on inversion-layer mobility inultra-thin SOI MOSFETs

This paper reports on a study of the inversion-layer mobility in n-channel Si MOSFETs fabricated on a silicon-on-insulator (SOI) substrate. In order to make clear the influences of the buried-oxide interface on the inversion-layer mobility in ultra-thin film SOI transistors, SOI wafers of different quality at the buried-oxide interface were prepared, and the mobility behaviors were compared quantitatively. The transistors with a relatively thick SOI film exhibited the universal relationship between the effective mobility and the effective normal field, regardless of the buried-oxide interface quality. It was found, however, that Coulomb scattering due to charged centers at the backside interface between SOI films and buried oxides has great influence on the effective mobility in the thin SOI thickness region, depending on the buried-oxide interface quality. This means that Coulomb scattering due to charged centers at the buried-oxide interface can degrade the mobility with decreasing SOI thickness, unless the SOI wafer quality at the buried-oxide interface is controlled carefully     

Contact effects in organic thin film transistors with printed electrodes

The influence of contact effects on the performance of pentacene thin film transistors with printed electrodes was investigated. The electrodes of the transistor were realized by a combination of microcontact printing and selective dewetting/wetting. Printing of silane based self-assembled monolayers on glass or silicon substrates allows for the modulation of the surface energy, so that polymers or resists can be selectively deposited in the hydrophilic regions of the substrate, whereas the hydrophobic regions stay uncoated. A poly methyl methacrylate (PMMA) resist was selectively deposited in the hydrophilic regions. The resists structures were used as a template to pattern electrodes of pentacene thin film transistors by a lift-off process. The transistors exhibit charge carrier mobilities of 0.2 cm²/V s, low threshold voltages, and high on/off ratios of 10⁶. The pentacene transistors with printed drain and source electrodes were compared to devices patterned by optical lithography. In particular the influence of the drain and source contacts on the charge carrier mobility of the devices will be discussed. A simple model will be presented which takes the influence of contact effects into account when describing the electrical behavior of the transistors.     

How small the contacts could be optimal for nanoscale organic transistors?

We report on a study seeking an optimized contact configuration for organic transistors that minimizes contact effects but maintains smallest contact size. We begin with the bulk access resistance in staggered transistors which results from the charge transport through the organic semiconductor film. Bulk access resistance is an intrinsic contributor to the contact resistance which has been little understood due to lack of a reliable study tool. In this work, we utilize the inner transported power inside the semiconductor film as a medium to investigate the contact resistance and the relevant contact effects. We examine the influences of the organic film thickness (t_SC), the channel length (L), the underlying charge transport and various organic semiconductor materials with variable carrier mobility. A roughly optimal contact length (L_C) of L_C0 ≈ 6t_SC is obtained. The results reveal that besides the device architecture the underlying charge transport should be also taken into account in designing organic transistors for practical application.     

Planarization of amorphous silicon thin film transistors by liquidphase deposition of silicon dioxide

A planarized device structure was developed for amorphous silicon thin film transistors to overcome the gate leakage problem. Utilizing the liquid phase deposition technique, a silicon oxide film with thickness exactly equal to the gate height was grown around the gate to planarize the surface for the fabrication of inverted staggered thin film transistors. The planarized thin film transistor has smaller leakage current and better performance, i.e., field effect mobility, subthreshold swing, etc. This novel process has a potential to improve the yield of large area liquid crystal display     

Mechanical and electrical stability of PEDOT:PTS and Au source/drain electrodes for bottom contact OTFTs on plastic films under bending conditions

Two types of source/drain (S/D) electrodes, formed of poly(3,4-ethylenedioxythiophene):p-toluenesulfonate (PEDOT:PTS) conducting polymer and Au, were fabricated and mounted on flexible pentacene transistors. Several properties of the S/D electrodes were investigated: the adhesion between electrode and pentacene, the failure induced by mechanical bending, the electrical properties including contact resistance, and the field-effect mobility. The measurement of adhesive force using a 90° peel tester revealed that the adhesive force of the pentacene–PEDOT:PTS interface was 200 N/m, while that of Au–pentacene was too small to be measured. The poor adhesion between the Au and pentacene led to the local delamination of the Au film, starting at a strain of approximately 1% and with a rapid increase of delamination density with increasing strain. The strain-induced mechanical damage has a direct effect on contact resistance, which in turn degrades mobility. In contrast, no delamination is observed with the high adhesive force at the pentacene–PEDOT:PTS interface, which thus led to a slight increase of contact resistance and mobility with strain. Consequently, the pentacene–PEDOT:PTS contacts provide mechanical and electrical stability in flexible organic thin film transistors (OTFTs) under bending tests.     

Modeling the gate bias dependence of contact resistance in staggered polycrystalline organic thin film transistors

We have modeled the dependence on the gate voltage of the bulk contact resistance and interface contact resistance in staggered polycrystalline organic thin film transistors. In the specific, we have investigated how traps, at the grain boundaries of an organic semiconductor thin film layer placed between the metal electrode and the active layer, can contribute to the bulk contact resistance. In order to the take into account this contribution, within the frame of the grain boundary trapping model (GBTM), a model of the energy barrier E_B, which emerges between the accumulation layer at the organic semiconductor/insulator interface and injecting contact, has been proposed. Moreover, the lowering of the energy barrier at the contacts interface region has been included by considering the influence of the electric field generated by the accumulation layer on the injection of carriers at the source and on the collection of charges from the accumulation layer to the drain contact. This work outlines both a Schottky barrier lowering, determined by the accumulation layer opposite the source electrode, as well as a Poole-Frenkel mechanism determined by the electric field of the accumulation layer active at the drain contact region. Finally it is provided and tested an analytical equation of our model for the contact resistance, summarizing the Poole-Frenkel and Schottky barrier lowering contribution with the grain boundary trapping model.     

Experimental and numerical analysis of channel-length-dependent electrical properties in bottom-gate,bottom-contact organic thin-film transistors with Schottky contact

Channel length dependence of field-effect mobility and source/drain parasitic resistance in pentacene thin-film transistors with a bottom-gate, bottom-contact configuration was investigated. Schottky barrier effect such as nonlinear behaviors in transistor output characteristics appeared and became more prominent for shorter channel length less than 10 μm, raising some concerns for a simple utilization of conventional parameter extraction methods. Therefore the gate-voltage-dependent hole mobility and the source/drain parasitic resistance in the pentacene transistors were evaluated with the aid of device simulation accounting for Schottky contact with a thermionic field emission model. The hole mobility in the channel region shows smaller values with shorter channel length even after removing the influence of Schottky barrier, suggesting that some disordered semiconductor layers with low carrier mobility exist near the contact electrode. This experimental data analysis with the simulation enables us to discuss and understand in detail the operation mechanism of bottom-gate, bottom-contact transistors by considering properly each process of charge carrier injection, carrier flow near the contact region, and actual channel transport.     

An analysis of the difference in behavior of top and bottom contact organic thin film transistors using device simulation

This paper presents a systematic analysis of an already reported phenomenon, namely, the difference in device performance of top and bottom contact organic thin film transistors (OTFT) by combining experiments and two-dimensional device simulations. The mobility of the as measured devices in the bottom contact OTFT is found to be lower by two orders of magnitude than the top contact structure, which is generally attributed to the higher metal-semiconductor contact resistance in the bottom contact devices due to lower contact area. However, we found that this large mobility difference exists even after correcting for the metal-semiconductor contact resistance through transfer line method (TLM). This result suggests that structural differences are playing a dominant role in lowering down the performance of bottom contact devices. This effect is then systematically investigated through two-dimensional physics-based numerical simulations by considering several structural inhomogenities around the contacts. The main reason for such an occurrence is attributed to the poor morphology (or comparatively low mobility) of pentacene films around the source/drain electrodes in the bottom contact devices. Finally, we also show a reasonable match between the simulated and experimental device characteristics, enabling calibration of the simulator for further use in design of OTFTs.     

Layer-by-layer nanoarchitecture of ultrathin films of PEDOT-PSS and PPy to act as hole transport layer in polymer light emitting diodes and polymer transistors

In this paper, we report a controlled architectural growth of ultrathin films of conducting polymers via layer-by-layer (L-b-L) self-assembly with poly(3, 4-ethylenedioxythiophene), poly(styrenesulfonate) (PEDOT-PSS), and polypyrrole (PPy) as alternating layers. A typical step of the film growth was 2.3/spl plusmn/0.1nm for every other bilayer. Linear growth of thin films has been observed by annealing each layer, while super-assembly was observed without annealing. The conductivities obtained range from 0.037S/cm at room temperature to 0.13S/cm at 120/spl deg/C. The improved conductivity may be attributed to either the increase in mobility of charged carriers due to less carrier scattering in the self-assembled layer, or the increased inter-chain hopping between two polymers due to closely packed polymer-chains. The charged carriers in the hole transport layer (HTL) increase the recombination rate of electrons and holes in the electroluminescent layer thus increasing the external quantum efficiency of the polymer light emitting diodes (PLEDs). Polymer field effect transistors have been fabricated using L-b-L assembled PEDOT-PSS and PPy. Polymer field-effect transistors (PFETs) with a number of different gate lengths were used to obtain source/drain contact resistance and channel mobility. The overall mobility from the L-b-L assembled PEDOT/PPy is calculated to be 8.8/spl times/10/sup -3/cm/sup 2//Vs at the linear regime. This mobility is five times higher than the spin coated device in linear regime. The I/sub on//I/sub off/ current ratio is 210. Thus confinements of holes in L-b-L assembled conducting polymer films improve the overall performance of polymer thin film transistors.     

Inkjet‐Printed Organic Electrodes for Bottom‐Contact Organic Field‐Effect Transistors

A graphite thin film was investigated as the drain and source electrodes for bottom‐contact organic field‐effect transistors (BC OFETs). Highly conducting electrodes (10² S cm^?1) at room temperature were obtained from pyrolyzed poly(l,3,4‐oxadiazole) (PPOD) thin films that were prepatterned with a low‐cost inkjet printing method. Compared to the devices with traditional Au electrodes, the BC OFETs showed rather high performances when using these source/drain electrodes without any further modification. Being based on a graphite‐like material these electrodes possess excellent compatibility and proper energy matching with both p‐ and n‐type organic semiconductors, which results in an improved electrode/organic‐layer contact and homogeneous morphology of the organic semiconductors in the conducting channel, and finally a significant reduction of the contact resistance and enhancement of the charge‐carrier mobility of the devices is displayed. This work demonstrates that with the advantages of low‐cost, high‐performance, and printability, PPOD could serve as an excellent electrode material for BC OFETs.     

Electron mobility behavior in extremely thin SOI MOSFET's

Extremely thin-film SOI MOSFET's with silicon film thickness down to 8 nm have been fabricated without inducing serious source/drain series resistance by employing a gate recessed structure. The influence of extremely thin silicon film on the electron mobility has been experimentally studied. The results show an abrupt mobility decrease in the device with less than 10 nm silicon film thickness. The measured mobility versus effective field below 10 nm silicon film thickness shows that a different scattering mechanism is involved in carrier conduction in 10 nm t_si region. The reasons for the mobility decrease have been examined from a device simulation and measurements     

Morphology and Field‐Effect‐Transistor Mobility in Tetracene Thin Films

The growth of vacuum‐sublimed tetracene thin films on silicon dioxide has been investigated from the early stages of the process. The effects of deposition flux and substrate silanization on film morphology and electrical properties have been explored. Tetracene shows an island growth, resulting in films with a granular structure. Both an increase in the deposition flux and the substrate silanization determine a decrease of the grain size and an improvement of the connectivity of the film in direct contact with the substrate. The hole mobility in field‐effect transistors based on tetracene thin films, which also generate electroluminescence, increases with the deposition flux and values as high as 0.15 cm² V^–1 s^–1 are obtained.     

有源层厚度对CuPc-OTFT器件性能的影响

研究了不同厚度有源层的顶电极CuPc-OTFT器件的电学特性。发现器件的性能与有源层厚度有依赖关系，其中，有源层厚度为20nm的器件性能最好。在有源层厚度大于20nm时，有源层厚度的增大不但分去一部分栅电压而且还增大了源、漏电极的接触电阻，从而不利于器件性能的提高。但当有源层厚度小于20nm以后器件的性能开始降低。我们认为当有源层厚度降低到一定程度时，有源层上表面的表面态会使有机材料的隙态浓度增加从而对沟道载流子迁移率产生不良影响以及使器件的阈值电压增大。     

Short Channel Characteristics of Gallium–Indium–Zinc–Oxide Thin Film Transistors for Three-Dimensional Stacking Memory

Amorphous gallium-indium-zinc-oxide (GIZO) thin film transistors with short channels of 50 nm were successfully fabricated by e-beam lithographic patterning. The GIZO thin film transistors showed a high mobility of 8.2 cm²/Vldrs with on-to-off current ratios up to 10⁶. Excellent short channel characteristics were also obtained with a small shift of the threshold voltages and no degradation of subthreshold slopes as V_DS increased, even with short channel lengths of less than 100 nm. These promising results indicate that the GIZO thin film transistors could be a candidate for selection transistors in 3-D cross point stacking memory.     

Vertically Segregated Structure and Properties of Small Molecule–Polymer Blend Semiconductors for Organic Thin‐Film Transistors

A comprehensive structure and performance study of thin blend films of the small‐molecule semiconductor, 2,8‐difluoro‐5,11‐bis(triethylsilylethynyl)anthradithiophene (diF‐TESADT), with various insulating binder polymers in organic thin‐film transistors is reported. The vertically segregated composition profile and nanostructure in the blend films are characterized by a combination of complementary experimental methods including grazing incidence X‐ray diffraction, neutron reflectivity, variable angle spectroscopic ellipsometry, and near edge X‐ray absorption fine structure spectroscopy. Three polymer binders are considered: atactic poly(α‐methylstyrene), atactic poly(methylmethacrylate), and syndiotactic polystyrene. The choice of polymer can strongly affect the vertical composition profile and the extent of crystalline order in blend films due to the competing effects of confinement entropy, interaction energy with substrate surfaces, and solidification kinetics. The variations in the vertically segregated composition profile and crystalline order in thin blend films explain the significant impacts of binder polymer choice on the charge carrier mobility of these films in the solution‐processed bottom‐gate/bottom‐contact thin‐film transistors.     

Planarization of Polymeric Field‐Effect Transistors: Improvement of Nanomorphology and Enhancement of Electrical Performance

The planarization of bottom‐contact organic field‐effect transistors (OFETs) resulting in dramatic improvement in the nanomorphology and an associated enhancement in charge injection and transport is reported. Planar OFETs based on regioregular poly(3‐hexylthiophene) (rr‐P3HT) are fabricated wherein the Au bottom‐contacts are recessed completely in the gate‐dielectric. Normal OFETs having a conventional bottom‐contact configuration with 50‐nm‐high contacts are used for comparison purpose. A modified solvent‐assisted drop‐casting process is utilized to form extremely thin rr‐P3HT films. This process is critical for direct visualization of the effect of planarization on the polymer morphology. Atomic force micrographs (AFM) show that in a normal OFET the step between the surface of the contacts and the gate dielectric disrupts the self‐assembly of the rr‐P3HT film, resulting in poor morphology at the contact edges. The planarization of contacts results in notable improvement of the nanomorphology of rr‐P3HT, resulting in lower resistance to charge injection. However, an improvement in field‐effect mobility is observed only at short channel lengths. AFM shows the presence of well‐ordered nanofibrils extending over short channel lengths. At longer channel lengths the presence of grain boundaries significantly minimizes the effect of improvement in contact geometry as the charge transport becomes channel‐limited.