共查询到20条相似文献,搜索用时 0 毫秒
1.
2.
低压低功耗运算放大器结构设计技术 总被引:6,自引:0,他引:6
低电压、低功耗、动态摆幅达到轨到轨(Rail—to—Rail)的运放是实现SOC设计的核心,而相关的输入输出模块是其中的关键技术。本文分析了两种分别工作于弱反型区和强反型区的恒跨导Rail—to—Rail输入级,同时给出了低压和极低压下两种AB类控制输出级的实现方案,并对各方案进行了比较和总结。 相似文献
3.
Ramirez-Angulo J. Lopez-Martin A.J. Carvajal R.G. Chavero F.M. 《Solid-State Circuits, IEEE Journal of》2004,39(3):434-442
A novel design principle for very low-voltage analog signal processing in CMOS technologies is presented. It is based on the use of quasi-floating gate (QFG) MOS transistors. Similar to multiple input floating gate (MIFG) MOS transistors, a weighted averaging of the inputs accurately controlled by capacitance ratios can be obtained, which is the basic operating principle. Nevertheless, issues often encountered in MIFG structures, such as the initial charge trapped in the floating gates or the gain-bandwidth product degradation, are not present in QFG configurations. Several CMOS circuit realizations using open- and closed-loop topologies, have been designed. They include analog switches, mixers, programmable-gain amplifiers, track and hold circuits, and digital-to-analog converters. All these circuits have been experimentally verified, confirming the usefulness of the proposed technique for very low-voltage applications. 相似文献
4.
基于三次非线性数学模型,采用通用有源电路元器件完成了一种磁控忆阻器的"浮地"二端口等效电路实现,基于Multisim电路仿真软件并搭建实际硬件电路研究了其伏安特性,进而研究了基于该有源磁控忆阻器的WC高通和低通滤波电路的频率特性,并与无源RC高通和低通滤波电路的频率特性进行了比较。软件仿真和硬件实验结果表明:有源WC高通滤波电路与无源RC高通滤波电路呈现相似的幅频和相频特性,而有源WC低通滤波电路的频率特性不同于单极点的无源RC低通滤波电路,其幅频和相频特性均呈现出多极点的特性。 相似文献
5.
Chung-Yun Chou Chung-Yu Wu 《IEEE transactions on circuits and systems. I, Regular papers》2005,52(5):825-833
In this work, a new technique to implement the transfer function of polyphase filter with CMOS active components is proposed and analyzed. In the proposed polyphase filter structure, the currents mirrored from capacitors and the transistors in a single-stage are used to realize high-pass and low-pass functions, respectively. The multistage structure expands the frequency bandwidth to more than 20 MHz. Furthermore, a constant-gm bias circuit is employed to decrease the sensitivity of image rejection to temperature and process variations. HSPICE simulations are performed to confirm the performance. With the current-mode operation, the low-voltage version of proposed active polyphase filters was designed. It can be operated at 1-V power supply with similar performance but with only 50% of the power dissipation of the normal-voltage version. The proposed four-stage polyphase filter is fabricated in 0.25-/spl mu/m CMOS 1P5M technology. The measured image rejection ratio is higher than -48 dB at frequencies of 6.1 MHz/spl sim/30 MHz. The measured voltage gain is 6.6 dB at 20 MHz and IIP3 is 8 dBm. The power dissipation is 11 mW at a supplied voltage of 2.5 V and the active chip area is 1162/spl times/813 /spl mu/m/sup 2/. 相似文献
6.
A novel signal processing technique based on fuzzy rules is proposed for estimating nonstationary signals, such as image signals, contaminated with additive random noises. In this filter, fuzzy rules concerning the relationship between signal characteristics and filter design are utilized to set the filter parameters, taking the local characteristics of the signal into consideration. The fuzzy rules are found to be quite effective, since the rules to set the filter parameters are usually expressed in an ambiguous style. The high performance of this filter is demonstrated in noise reduction of a 1-D test signal and a natural image with various training signals 相似文献
7.
在信号处理中,滤波占有十分重要的地位.数字滤波是数字信号处理的基本方法,以FIR滤波器为基础,利用MATLB程序设计语言对低通FIR数字滤波器进行了有效的设计,应用DSP 汇编语言编程实现了该滤波器. 相似文献
8.
9.
10.
11.
12.
13.
14.
Chip-Hong Chang Jiangmin Gu Mingyan Zhang 《IEEE transactions on circuits and systems. I, Regular papers》2004,51(10):1985-1997
This paper presents several architectures and designs of low-power 4-2 and 5-2 compressors capable of operating at ultra low supply voltages. These compressor architectures are anatomized into their constituent modules and different static logic styles based on the same deep submicrometer CMOS process model are used to realize them. Different configurations of each architecture, which include a number of novel 4-2 and 5-2 compressor designs, are prototyped and simulated to evaluate their performance in speed, power dissipation and power-delay product. The newly developed circuits are based on various configurations of the novel 5-2 compressor architecture with the new carry generator circuit, or existing architectures configured with the proposed circuit for the exclusive OR (XOR) and exclusive NOR ( XNOR) [XOR-XNOR] module. The proposed new circuit for the XOR-XNOR module eliminates the weak logic on the internal nodes of pass transistors with a pair of feedback PMOS-NMOS transistors. Driving capability has been considered in the design as well as in the simulation setup so that these 4-2 and 5-2 compressor cells can operate reliably in any tree structured parallel multiplier at very low supply voltages. Two new simulation environments are created to ensure that the performances reflect the realistic circuit operation in the system to which these cells are integrated. Simulation results show that the 4-2 compressor with the proposed XOR-XNOR module and the new fast 5-2 compressor architecture are able to function at supply voltage as low as 0.6 V, and outperform many other architectures including the classical CMOS logic compressors and variants of compressors constructed with various combinations of recently reported superior low-power logic cells. 相似文献
15.
16.
The bootstrap and its application in signal processing 总被引:3,自引:0,他引:3
The bootstrap is an attractive tool for assessing the accuracy of estimators and testing hypothesis for parameters where conventional techniques are not valid, such as in small data-sample situations. We highlight the motivations for using the bootstrap in typical signal processing applications and give several practical examples. Bootstrap methods for testing statistical hypotheses are described and we provide an analysis of the accuracy of bootstrap tests. We also discuss how the bootstrap can be used to estimate a variance-stabilizing transformation to define a pivotal statistic, and we demonstrate the use of the bootstrap for constructing confidence intervals for flight parameters in a passive acoustic emission problem 相似文献
17.
Koike K. Kawai K. Onozawa A. Takei Y. Kobayashi Y. Ichino H. 《Solid-State Circuits, IEEE Journal of》1998,33(10):1536-1544
A low-power Si bipolar standard cell LSI design methodology for gigabit/second signal processing is described. To obtain high-speed operation, it features a pair of differential clock channels inside cells, differential clock distribution with the placement of differential wires of equal length and load, a performance-driven layout, and a highly accurate static timing analysis. A computer-aided-design-based optimization technology for power dissipation makes cell currents minimum while maintaining the circuit speed. A 5.6-K gate synchronous digital hierarchy signal-processing LSI operating at 1.6 Gbit/s with only 3.9 W power consumption demonstrates the effectiveness of this design method 相似文献
18.
Chien-Cheng Tseng Soo-Chang Pei 《Electronics letters》1997,33(13):1131-1133
A technique for designing a sparse FIR notch filter is presented. First, a sparse property of the ideal notch filter, whose notch frequency has the form (q/2p)π is derived, where p and q are coprime integers. Then, the Lagrange multiplier method is used to obtain the coefficients of the sparse notch filter which is optimal in the least-squares sense. Next, a design example is presented to demonstrate the effectiveness of this approach. Finally, a sparse notch filter is applied to eliminate the 60 Hz powerline interference superimposed on the electrocardiogram signals 相似文献
19.
提出了一种成对载波多址系统中信息序列和信道联合估计的算法。该算法在不具备任一协作通信方发送的信息序列的先验知识前提下从混合信号中解调出两路信息序列。该算法结合了逐幸存路径处理法无延迟的信道参数估计特性和Kalman滤波良好的估计性能。仿真实验表明,该算法具有良好的信道捕获与跟踪能力,且实现较好的符号序列估计性能。 相似文献