Electronically tunable current-mode instrumentation amplifier with high CMRR and wide bandwidth

A current-mode instrumentation amplifier consists of only two current follower differential input transconductance amplifiers is proposed in this paper. The proposed circuit of instrumentation amplifier is realized without using any passive components. Thus, the proposed circuit structure is very simple and suitable to the integrated circuit technology. The input impedance is low and output impedance is high, therefore the proposed circuit is easily cascadable. The gain of the proposed instrumentation amplifier is electronically controllable. The proposed circuit also enjoys the features of high common mode rejection ratio, wide bandwidth and low power consumption. Additionally, performance of the proposed circuit is tested under process, supply voltage and temperature variations. Furthermore, another circuit of instrumentation amplifier, which is capable of providing higher differential mode gain is also shown. The non-ideal and parasitic studies are included. HSPICE simulations are performed to validate the proposed circuits of instrumentation amplifier.     

Design and analysis of high Transconductance Current Follower Transconductance Amplifier (CFTA) and its applications

In this paper, a single-stage class AB bulk-driven amplifier operating in weak inversion region is proposed. The presented amplifier benefits from an improved high input swing structure using quasi-floating-gate technique. The composite transistors and recycling configuration used at the input stage enable the input differential pair to operate under low supply voltages with larger transconductance as compared to the conventional models at no expense of power budget. The circuit is designed in 0.18 µm CMOS technology and simulation results show 61.5 dB low frequency gain with the gain bandwidth of 30.15 kHz and 55.3 V/ms average slew rate. The total current of 275 nA and 0.6 V supply voltage make the proposed amplifier a suitable choice for ultra-low-power applications.     

Current and transimpedance mode instrumentation amplifier using a single new active component named CDTRA

In this study, both current and transimpedance mode instrumentation amplification operations are met through a new active building block proposal, namely Current DifferencingTransresistance Amplifier block, CDTRA. In order to regard CDTRA as an instrumentation amplifier (IA), two grounded passive resistors are needed. Passive resistors together with electronically tunable transresistance parameter of active block, r_m, set versatility over gain tunability for instrumentation amplifier. Proposed active block is current input, current/voltage output design. It has low impedance input, high impedance for current output, and low impedance for voltage output respectively. Since this particular IA is based on CDTRA, then it inherits these electrical characteristics fully. Numerous SPICE simulations are performed through the paper to verify validity of the study. TSMC 0.18 µm CMOS technology parameters are utilized through simulations. Experimental work is performed for the proposed IA circuit.     

A Novel Resistor-Free Electronically Adjustable Current-Mode Instrumentation Amplifier

In this paper, a novel topology for implementing resistor-free current-mode instrumentation amplifier (CMIA) is presented. Unlike the other previously reported instrumentation amplifiers (IAs), in which input and/or output signals are in voltage domain, the input and output signals in the proposed structure are current signals and signal processing is also completely done in current domain benefiting from the full advantages of current-mode signal processing. Interestingly the CMRR of the proposed topology is wholly determined by only five transistors. Compared to the most of the previously reported IAs in which at least two active elements are used to attain high common-mode rejection ratio (CMRR) resulting in a complicated circuit, the proposed structure enjoys from an extremely simple circuit. It also exhibits low input impedance employing negative feedback principal. Of more interest is that, using simple degenerate current mirrors, the differential-mode gain of the proposed CMIA can be electronically varied by control voltage. This property makes it completely free of resistors. The very low number of transistors used in the structure of the proposed CMIA grants it such desirable properties as low-voltage low-power operation, suitability for integration, wide bandwidth etc. SPICE simulation results using the TSMC 0.18-μm CMOS process model under supply voltage of ±0.8 V show a high CMRR of 91 dB and a low input impedance of 291.5 Ω for the proposed CMIA. Temperature simulation results are also provided, which prove low temperature sensitivity of the proposed CMIA.     

A low-voltage low-power instrumentation amplifier based on supply current sensing technique

In this paper a new low-voltage low-power instrumentation amplifier (IA) is presented. The proposed IA is based on supply current sensing technique where Op-Amps in traditional IA based on this technique are replaced with voltage buffers (VBs). This modification results in a very simplified circuit, robust performance against mismatches and high frequency performance. To reduce the required supply voltage, a low-voltage resistor-based current mirror is used to transfer the input current to the load. The input and output signals are of voltage kind and the proposed IA shows ideal infinite input impedance and a very low output one. PSPICE simulation results, using 0.18 μm TSMC CMOS technology and supply voltage of ±0.9 V, show a 71 dB CMRR and a 85 MHz constant −3 dB bandwidth for differential-mode gain (ranging from 0 dB to 18 dB). The output impedance of the proposed circuit is 1.7 Ω and its power consumption is 770 µW. The method introduced in this paper can also be applied to traditional circuits based on Op-Amp supply current sensing technique.     

A new CMOS design of high transconductance current follower transconductance amplifier and its applications

In this work, a new CMOS implementation of high transconductance current follower transconductance amplifier (CFTA) is proposed. The proposed CFTA uses current starving technique along with an auxiliary unit (AU) to enhance transconductance performance. The cross-drain-coupled MOSFETs are also used in AU which further enhances transconductance of proposed circuit. The proposed CFTA provides higher transconductance and wider tuning range without affecting its output swing and bandwidth performance. The proposed CFTA provides transconductance of 11.3 mS, dissipates 1.8 mW power and operates at?±?0.6 V supply voltage. A current mode third order quadrature oscillator and biquad filter have been designed and simulated, to validate the performance of proposed circuit. The workability of proposed CFTA and its applications have been verified by using Cadence virtuoso schematic composer with TSMC 0.18 µm process parameters.     

High-performance current differencing transconductance amplifier and its application in precision current-mode rectification

A CMOS-based circuit for realization of high-performance current differencing transconductance amplifier (CDTA) is demonstrated. The proposed circuit offers the advantages of a wide frequency bandwidth and very small input terminal impedance. The results of circuit simulations and an application example are given to illustrate the advantages of the proposed circuit for precise high-frequency signal rectification.     

DVCC-based very low-offset current-mode instrumentation amplifier

This paper presents an alternative implementation of a chopper-modulated current-mode instrumentation amplifier. The structure provides very low-offset voltage at the output due to chopper modulation and residual offset removal path. The residual offset removal path is based on low-pass filtering using grounded capacitances which provides compact design structure compared to various chopper-modulated instrumentation amplifier designs. Rail-to-rail input common-mode range is possible due to transmission gate-based input chopper switching scheme. The design is made using a 0.35-µm CMOS process with ±1.65 V supply voltage. The area of the amplifier is 234µm × 344 µm, including all the filtering elements. The proposed circuit with residual offset removal path provides less than 1 µV input referred offset voltage. The advantage of the proposed instrumentation amplifier is its large bandwidth, simple design scheme and compact area compared to chopper-modulated voltage mode amplifiers.     

An Improved-Linearity,Single-Stage Variable-Gain Amplifier Using Current Squarer for Wider Gain Range

A novel single-stage variable-gain amplifier (VGA) based on transconductance \(g_{m}\)-ratio amplifier is analyzed and designed with wider linear-in-dB gain range and improved linearity. The variable-gain amplifier proposed here consists of an exponential control block, a current squarer and an amplifier block with both input and load degeneration. With the help of current squarer which gets square function of the output current from exponential control block, the VGA achieves the maximum linear gain range in single stage. Current squarer is proposed, which is designed with compensation technique to minimize the second-order effect caused by carrier mobility reduction in short channel MOSFET. To avoid the poor linearity performance of the \(g_{{m}}\)-ratio amplifiers, the distortion is analyzed and the linearity is improved by applying input and load degenerating technique. At the same power consumption, the input 1 dB compression point can be improved by nearly 8.78 dB. Simulation results show that the VGA can provide a gain variation range of 64.09 dB (from \(-35.59\) to 28.5 dB) with a 3-dB bandwidth from 47 to 640 MHz. The circuit consumes the maximum power 3.5 mW from a 1.8-V supply.     

一种大电流宽频带跨导单元的设计

跨导放大器能向负载输出与输入电压成正比的电流,电流大小与负载无关,所以也称为可编程电流源。为了增强输出阻抗,提高开环增益,改善跨导放大器在大电流时同时保持宽频带的性能,提出了一种用于大电流放大器中的跨导单元的新设计理论,同时展示了两种优化电路,并用PSpice对该设计建模,仿真结果对优化理论进行了验证。     

二极管型非制冷红外探测器的前端电路设计

设计了一种二极管型非制冷红外探测器的前端电路,该电路采用Gm-C-OP积分放大器的结构,将探测器输出的微弱电压信号经跨导放大器(OTA)转化为电流信号,再经电容反馈跨阻放大器(CTIA)积分转化为电压信号输出。该OTA采用电流反馈型结构,可以获得比传统OTA更高的线性度和跨导值。输入采用差分结构,可以有效地消除环境温度及制造工艺对探测器输出信号的影响。电路采用0.35 m CMOS工艺进行设计并流片,5 V电源电压供电。Gm-C-OP积分放大器总面积0.012 6 mm2,当输入差分电压为0~5 mV时,测试结果表明:OTA跨导值与仿真结果保持一致,Gm-C-OP积分放大器可实现对动态输入差分信号到输出电压的线性转化,线性度达97%,输出范围大于2 V。     

一种恒定跨导输入放大器

随着低电压系统的广泛应用和对性能要求的提高，要求输入跨导放大器具有宽输入电压动态范围。文章论述了一种较为简单的电路可以实现宽摆幅恒定跨导，包括主跨导放大器、负跨导放大器和求和电路。电路模拟证明这种简单结构具有很高的共模电压输入范围和很低的谐波失真。     

New CMOS realization of high performance Voltage Differencing Inverting Buffered Amplifier and its filter application

This paper describes a high performance voltage differencing inverting buffered amplifier (VDIBA). The transconductance of the proposed circuit is enhanced by using positive feedback technique with only two extra transistors used in active load. Moreover, the bandwidth of proposed circuit is enhanced by using resistive compensation technique. The performance of proposed VDIBA is demonstrated by detailed frequency analysis. Furthermore, it is shown that the transconductance can be enhanced up to 4.61 mS at biasing current of 300 µA. In addition, a third order low pass filter is given as an application example to confirm the high performance of the proposed VDIBA. The proposed low pass filter operates at natural pole frequency of 15 MHz. The proposed VDIBA and its filter application are implemented using TSMC 90 nm CMOS technology in Cadence virtuoso schematic composer at ±0.6 V supply voltage.     

LDO线性稳压器中高性能误差放大器的设计

设计了一个共源共栅运算跨导放大器,并成功地将其应用在一款超低功耗LDO线性稳压器芯片中。该设计提高了电源抑制比(PSRR),并具有较高的共模抑制比(CMRR)。电路结构简单,静态电流低。该芯片获得了高达99 dB的电源抑制比。     

Wide-Linear-Range Subthreshold OTA for Low-Power, Low-Voltage, and Low-Frequency Applications

We propose a novel configuration of linearized subthreshold operational transconductance amplifier (OTA) for low-power, low-voltage, and low-frequency applications. By using multiple input floating-gate (MIFG) MOS devices and implementing a cubic-distortion-term-canceling technique, the linear range of the OTA is up to 1.1 Vpp under a 1.5-V supply for less than 1% of transconductance variation, according to testing results from a circuit designed in a double-poly, 0.8-$muhbox m$, CMOS process. The power consumption of the OTA remains below 1$muW$for biasing currents in the range between 1–200 nA. The offset voltage due to secondary effects (contributed by parasitic capacitances, errors and mismatches of parameters, charge entrapment, etc.) is of the order of a few ten millivolts, and can be canceled by adjusting biasing voltages of input MIFG MOS transistors.     

Design of an integrated low power high CMRR instrumentation amplifier for biomedical applications

The objective of this paper is to discuss the advantages and drawbacks of using Trapezoidal Association of Transistors (TAT) in the implementation of a low-power high-CMRR CMOS instrumentation amplifier (IA) aimed for biomedical applications. IAs are well suited for biomedical applications due to its high CMRR. For the sake of comparison, two versions of the circuit were designed, prototyped and characterized. The performance of a version with its current mirrors implemented with TAT, where supposedly higher CMRR could be achievable, is compared to another with single-transistor implementation of current mirrors in order to analyze the CMRR performance. The IA circuit was designed in AMIS 1.5 μm technology and manufactured through the MOSIS Service. In addition to the better performance attained by the classic implementation of the amplifier, with CMRR higher than 120 dB, this version of the IA consumed less than one third of the area from the TAT version. Comparison of both versions from same topology indicates no advantages of using TATs in the current mirrors of this type of IA.     

A high input impedance buffer amplifier using bipolar transistors

The input impedance of conventional emitter follower circuits is limited due to the finite value of the passive emitter resistance, shunting effect of biasing resistors and that of intrinsic collector to base feedback admittance and also to the fall in current amplification factor at low operating currents. Further, the input admittance is frequency dependent because the device parameters involved therein are themselves frequency dependent. However, the shunt positive feedback incorporated in such circuits minimizes the shunting effect of the biasing network and also that of the intrinsic feedback admittance. The simulation of negative capacitance across the input terminals nullifies the effect of the presence of the otherwise positive capacity. This technique extends the bandwidth over which the input impedance remains constant. A typical buffer amplifier circuit employing five conventional epitaxial planar bipolar silicon transistors has been described in the present communication. The input impedance of which is found to be constant over a frequency range of 10 HZ to 2 KHz and its magnitude is about 25MΩ.     

A novel ±0.8 V high-performance voltage-tunable CDTA with enhanced bandwidth

In this article, we propose a novel high-performance complementary metal oxide semiconductor (CMOS) current differencing transconductance amplifier (CDTA) with a transconductance gain (G_M) that can be linearly tuned by a voltage. By using a high-speed, low-voltage, cascaded current mirror active resistance compensation technique, the proposed CDTA circuit exhibits wide frequency bandwidths, high current tracking precisions as well as large output impedances. The linear-tunable G_M of the CDTA is designed with the use of linear composite metal oxide semiconductor field-effect transistor as basic cells in the circuit. Combining these two approaches, several design concerns are studied, including: impedance characteristic, tracking errors, offset and linearity and noise. The prototype chip with a 0.25 mm² area is fabricated in a GlobalFoundries’0.18 μm CMOS process. The simulated results and measured results with ±0.8 V DC supply voltages are presented, and show extremely wide bandwidths and wide linear tuning range. In addition, a fully differential band-pass filter for a high-speed system is also given as an example to confirm the high performance of the proposed circuit.     

A 20 Gbps inductorless CMOS optical receiver for short-distance VCSEL-based 850 nm optical links

This paper presents a circuit design and experimental results for a 20 Gbps CMOS inductorless optical receiver, a transimpedance amplifier (TIA) and a limiting amplifier, for a vertical-cavity surface emitting laser based 850 nm optical link. The proposed optical receiver apply a power supply noise canceling technique, an additional path from the power supply to the TIA output to generate a reversed phase signal that reduces the power supply noise, and bandwidth enhancement circuit design that dose not require internal inductors. The simulation results shows a power supply rejection ratio of ?96.6 dB at 10 MHz, a total gain of $82.8\,\hbox{dB}\Upomega$ and a ?3 dB bandwidth of 15.5 GHz. A test chip fabricated in 90 nm CMOS technology and demonstrated with a PIN photo-diode, a bandwidth of 17 GHz and a responsibility of 0.53 A/W. The measurement results show a 25 % eye opening and an input sensitivity of ?7.1 dBm at a bit error rate of 10^?12 with a 2⁹ ? 1 pseudo-random test pattern at 20 Gbps. The core circuit of the optical receiver occupies only an area of 0.02 mm².     

A 100-dB CMRR CMOS Operational Amplifier With Single-Supply Capability

A CMOS operational amplifier that has a common-mode rejection ratio (CMRR), a power-supply rejection ratio (PSRR), and gain above 100 dB for each of these parameters is described. This is achieved by combining a high output-impedance tail current source with a stable drain-source voltage of the input transistors. The common-mode input signal range includes the negative rail. This is obtained by controlling the bulk bias of the input and cascoding transistors. The amplifier consists of two gain stages connected via cascoded current mirrors. The gain is improved by using gain boost in the current mirrors, and by the suppression of impact ionization current in the output stage