Error performance of optically preamplified hybrid BPSK-PPM systems with transmitter and receiver imperfections

In this paper, we investigate the impact of the transmitter finite extinction ratio and the receiver carrier recovery phase offset on the error performance of two optically preamplified hybrid M-ary pulse position modulation (PPM) systems with coherent detection. The first system, referred to as PB-mPPM, combines polarization division multiplexing (PDM) with binary phase-shift keying and M-ary PPM, and the other system, referred to as PQ-mPPM, combines PDM with quadrature phase-shift keying and M-ary PPM. We provide new expressions for the probability of bit error for PB-mPPM and PQ-mPPM under finite extinction ratios and phase offset. The extinction ratio study indicates that the coherent systems PB-mPPM and PQ-mPPM outperform the direct-detection ones. It also shows that at \(P_b=10^{-9}\) PB-mPPM has a slight advantage over PQ-mPPM. For example, for a symbol size \(M=16\) and extinction ratio \(r=30\) dB, PB-mPPM requires 0.6 dB less SNR per bit than PQ-mPPM to achieve \(P_b=10^{-9}\). This investigation demonstrates that PB-mPPM is less complex and less sensitive to the variations of the offset angle \(\theta \) than PQ-mPPM. For instance, for \(M=16\), \(r=30\) dB, and \(\theta =10^{\circ }\) PB-mPPM requires 1.6 dB less than PQ-mPPM to achieve \(P_b=10^{-9}\). However, PB-mPPM enhanced robustness to phase offset comes at the expense of a reduced bandwidth efficiency when compared to PQ-mPPM. For example, for \(M=2\) its bandwidth efficiency is 60 % that of PQ-mPPM and \(\approx 86\,\%\) for \(M=1024\). For these reasons, PB-mPPM can be considered a reasonable design trade-off for M-ary PPM systems.     

A Low-Voltage Fully Differential Pure Current Mode Current Operational Amplifier

In this paper a novel high-frequency fully differential pure current mode current operational amplifier (COA) is proposed that is, to the authors’ knowledge, the first pure MOSFET Current Mode Logic (MCML) COA in the world, so far. Doing fully current mode signal processing and avoiding high impedance nodes in the signal path grant the proposed COA such outstanding properties as high current gain, broad bandwidth, and low voltage and low-power consumption. The principle operation of the block is discussed and its outstanding properties are verified by HSPICE simulations using TSMC \(0.18\,\upmu \hbox {m}\) CMOS technology parameters. Pre-layout and Post-layout both plus Monte Carlo simulations are performed under supply voltages of \(\pm 0.75\,\hbox {V}\) to investigate its robust performance at the presence of fabrication non-idealities. The pre-layout plus Monte Carlo results are as; 93 dB current gain, \(8.2\,\hbox {MHz}\,\, f_{-3\,\text {dB}}, 89^{\circ }\) phase margin, 137 dB CMRR, 13 \(\Omega \) input impedance, \(89\,\hbox {M}\Omega \) output impedance and 1.37 mW consumed power. Also post-layout plus Monte Carlo simulation results (that are generally believed to be as reliable and practical as are measuring ones) are extracted that favorably show(in abovementioned order of pre-layout) 88 dB current gain, \(6.9\,\hbox {MHz} f_{-3\text {db}} , 131^{\circ }\) phase margin and 96 dB CMRR, \(22\,\Omega \) input impedance, \(33\,\hbox {M}\Omega \) output impedance and only 1.43 mW consumed power. These results altogether prove both excellent quality and well resistance of the proposed COA against technology and fabrication non-idealities.     

Study on the Effect of Mn,Zn, and Sb on Undercooling Behavior of Sn-Ag-Cu Alloys Using Differential Thermal Analysis

Differential thermal analysis (DTA) has been conducted on directionally solidified near-eutectic Sn-3.0 wt.%Ag-0.5 wt.%Cu (SAC), SAC \(+\) 0.2 wt.%Sb, SAC \(+\) 0.2 wt.%Mn, and SAC \(+\) 0.2 wt.%Zn. Laser ablation inductively coupled plasma mass spectroscopy was used to study element partitioning behavior and estimate DTA sample compositions. Mn and Zn additives reduced the undercooling of SAC from 20.4\(^\circ \hbox {C}\) to \(4.9^\circ \hbox {C}\) and \(2^\circ \hbox {C}\), respectively. Measurements were performed at cooling rate of \(10^\circ \hbox {C}\) per minute. After introducing 200 ppm \(\hbox {O}_2\) into the DTA, this undercooling reduction ceased for SAC \(+\) Mn but persisted for SAC \(+\) Zn.     

A 3.1–10.6 GHz UWB LNA Based on Self Cascode Technique for Improved Bandwidth and High Gain

In this work, we present a self cascode based ultra-wide band (UWB) low noise amplifier (LNA) with improved bandwidth and gain for 3.1–10.6 GHz wireless applications. The self cascode (SC) or split-length compensation technique is employed to improve the bandwidth and gain of the proposed LNA. The improvement in the bandwidth of SC based structure is around 1.22 GHz as compared to simple one. The significant enhancement in the characteristics of the introduced circuit is found without extra passive components. The SC based CS–CG structure in the proposed LNA uses the same DC current for operating first stage transistors. In the designed UWB LNA, a common source (CS) stage is used in the second stage to enhance the overall gain in the high frequency regime. With a standard 90 nm CMOS technology, the presented UWB LNA results in a gain \(\hbox {S}_{21}\) of \(20.10 \pm 1.65\,\hbox {dB}\) across the 3.1–10.6 GHz frequency range, and dissipating 11.52 mW power from a 1 V supply voltage. However, input reflection, \(\hbox {S}_{11}\), lies below \(-\,10\) dB from 4.9–9.1 GHz frequency. Moreover, the output reflection (\(\hbox {S}_{22}\)) and reverse isolation (\(\hbox {S}_{12}\)), is below \(-\,10\) and \(-\,48\) dB, respectively for the ultra-wide band region. Apart from this, the minimum noise figure (\(\hbox {NF}_{min}\)) value of the proposed UWB LNA exists in the range of 2.1–3 dB for 3.1–10.6 GHz frequency range with a a small variation of \(\pm \,0.45\,\hbox {dB}\) in its \(\hbox {NF}_{min}\) characteristics. Linearity of the designed LNA is analysed in terms of third order input intercept point (IIP3) whose value is \(-\,4.22\) dBm, when a two tone signal is applied at 6 GHz with a spacing of 10 MHz. The other important benefits of the proposed circuit are its group-delay variation and gain variation of \(\pm \,115\,\hbox {ps}\) and \(\pm \,1.65\,\hbox {dB}\), respectively.     

The Security of Tandem-DM in the Ideal Cipher Model

We prove that Tandem-DM, one of the two “classical” schemes for turning an n-bit blockcipher of 2n-bit key into a double-block-length hash function, has birthday-type collision resistance in the ideal cipher model. For \(n=128\), an adversary must make at least \(2^{120.87}\) blockcipher queries to achieve chance 0.5 of finding a collision. A collision resistance analysis for Tandem-DM achieving a similar birthday-type bound was already proposed by Fleischmann, Gorski and Lucks at FSE 2009. As we detail, however, the latter analysis is wrong, thus leaving the collision resistance of Tandem-DM as an open problem until now. Our analysis exhibits a novel feature in that we introduce a trick never used before in ideal cipher proofs. We also give an improved bound on the preimage security of Tandem-DM. For \(n=128\), we show that an adversary must make at least \(2^{245.99}\) blockcipher queries to achieve chance 0.5 of inverting a randomly chosen point in the range. Asymptotically, Tandem-DM is proved to be preimage resistant up to \(2^{2n}/n\) blockcipher queries. This bound improves upon the previous best bound of \({{\varOmega }}(2^n)\) queries and is optimal (ignoring log factors) since Tandem-DM has range of size \(2^{2n}\).     

The $$\mathbb {}$$-curve Construction for Endomorphism-Accelerated Elliptic Curves

We give a detailed account of the use of \(\mathbb {Q}\)-curve reductions to construct elliptic curves over \(\mathbb {F}_{p^2}\) with efficiently computable endomorphisms, which can be used to accelerate elliptic curve-based cryptosystems in the same way as Gallant–Lambert–Vanstone (GLV) and Galbraith–Lin–Scott (GLS) endomorphisms. Like GLS (which is a degenerate case of our construction), we offer the advantage over GLV of selecting from a much wider range of curves and thus finding secure group orders when \(p\) is fixed for efficient implementation. Unlike GLS, we also offer the possibility of constructing twist-secure curves. We construct several one-parameter families of elliptic curves over \(\mathbb {F}_{p^2}\) equipped with efficient endomorphisms for every \(p > 3\), and exhibit examples of twist-secure curves over \(\mathbb {F}_{p^2}\) for the efficient Mersenne prime \(p = 2^{127}-1\).     

Design and Performance Study of Dynamic Fractors in Any of the Four Quadrants

A fractor is a simple fractional-order system. Its transfer function is \(1/Fs^{\alpha }\); the coefficient, F, is called the fractance, and \(\alpha \) is called the exponent of the fractor. This paper presents how a fractor can be realized, using RC ladder circuit, meeting the predefined specifications on both F and \(\alpha \). Besides, commonly reported fractors have \(\alpha \) between 0 and 1. So, their constant phase angles (CPA) are always restricted between \(0^{\circ }\) and \(-90^{\circ }\). This work has employed GIC topology to realize fractors from any of the four quadrants, which means fractors with \(\alpha \) between \(-\)2 and +2. Hence, one can achieve any desired CPA between \(+180^{\circ }\) and \(-180^{\circ }\). The paper also exhibits how these GIC parameters can be used to tune the fractance of emulated fractors in real time, thus realizing dynamic fractors. In this work, a number of fractors are developed as per proposed technique, their impedance characteristics are studied, and fractance values are tuned experimentally.     

A 11.2 mW 48–62 GHz Low Noise Amplifier in 65 nm CMOS Technology

In this paper, a wideband low noise amplifier (LNA) for 60 GHz wireless applications is presented. A single-ended two-stage cascade topology is utilized to realize an ultra-wideband and flat gain response. The first stage adopts a current-reused topology that performs the more than 10 GHz ultra-wideband input impedance matching. The second stage is a cascade common source amplifier that is used to enhance the overall gain and reverse isolation. By proper optimization of the current-reused topology and stagger turning technique, the two-stage cascade common source LNA provides low power consumption and gain flatness over an ultra-wide frequency band with relatively low noise. The LNA is fabricated in Global Foundries 65 nm RFCMOS technology. The measurement results show a maximum \(S_{21}\) gain of 11.4 dB gain with a \(-\)3 dB bandwidth from 48 to 62 GHz. Within this frequency range, the measured \(S_{11}\) and \(S_{12}\) are less than \(-\)10 dB and the measured DC power consumption is only 11.2 mW from a single 1.5 V supply.     

Intermittent Fault Diagnosability of Hyper Petersen Network

The problem of permanent fault diagnosis has been discussed widely, and the diagnosability of many well-known networks have been explored. Faults of a multiprocessor system generally include permanent and intermittent, with intermittent faults regarded as the most challenging to diagnose. In this paper, we investigate the intermittent fault diagnosability of hyper Petersen networks. First, we derive that an \(n\)-dimensional hyper Petersen network \(HP_{n}\) with fault-free edges is \((n - 1)_{i}\)-diagnosable under the PMC model. Then, we investigate the intermittent fault diagnosability of \(HP_{n}\) with faulty edges under the PMC model. Finally, we prove that an \(n\)-dimensional hyper Petersen network \(HP_{n}\) is \((n - 2)_{i}\)-diagnosable under the MM* model.     

High-Accuracy Time-Mode Duty-Cycle-Modulation-Based Temperature Sensor for Energy-Efficient System Applications

This paper presents a new time-mode duty-cycle-modulation-based high-accuracy temperature sensor. Different from the well-known \({\varSigma }{\varDelta }\) ADC-based readout structure, this temperature sensor utilizes a temperature-dependent oscillator to convert the temperature information into temperature-related time-mode parameter values. The useful output information of the oscillator is the duty cycle, not the absolute frequency. In this way, this time-mode duty-cycle-modulation-based temperature sensor has superior performance over the conventional inverter-chain-based time domain types. With a linear formula, the duty-cycle output streams can be converted into temperature values. The design is verified in 65nm standard digital CMOS process. The verification results show that the worst temperature inaccuracy is kept within 1\(\,^{\circ }\mathrm{C}\) with a one-point calibration from \(-\)55 to 125 \(^{\circ }\mathrm{C}\). At room temperature, the average current consumption is only 0.8 \(\upmu \)A (1.1\(\,\upmu \)A in one phase and 0.5 \(\upmu \)A in the other) with 1.2 V supply voltage, and the total energy consumption for a complete measurement is only 0.384 \({\hbox {nJ}}\).     

Application of photonic crystal ring resonator nonlinear response for full-optical tunable add–drop filtering

In this paper, we investigate the application of Kerr-like nonlinear photonic crystal (PhC) ring resonator (PCRR) for realizing a tunable full-optical add–drop filter. We used silicon (Si) nano-crystal as the nonlinear material in pillar-based square lattice of a 2DPhC. The nonlinear section of PCRR is studied under three different scenarios: (1) first only the inner rods of PCRR are made of nonlinear materials, (2) only outer rods of PCRR have nonlinear response, and (3) both of inner and outer rods are made of nonlinear material. The simulation results indicate that optical power required to switch the state of PCRR from turn-on to turn-off, for the nonlinearity applied to inner PCRR, is at least \(2000\, \hbox {mW}{/}\upmu \hbox {m}^{2}\) and, for the nonlinearity applied to outer PCRR, is at least \(3000\, \hbox {mW}{/}\upmu \hbox {m}^{2}\) which corresponds to refractive index change of \(\Delta n_\mathrm{NL }= 0.085\) and \(\Delta n_\mathrm{NL }= 0.15\), respectively. For nonlinear tuning of add–drop filter, the minimum power required to 1 nm redshift the center operating wavelength \((\lambda _{0} = 1550\, \hbox {nm})\) for the inner PCRR scenario is \(125\, \hbox {mW}{/}\upmu \hbox {m}^{2}\) (refractive index change of \(\Delta n_\mathrm{NL}= 0.005)\). Maximum allowed refractive index change for inner and outer scenarios before switch goes to saturation is \(\Delta n_\mathrm{NL }= 0.04\) (maximum tune-ability 8 nm) and \(\Delta n_\mathrm{NL }= 0.012\) (maximum tune-ability of 24 nm), respectively. Performance of add–drop filter is replicated by means of finite-difference time-domain method, and simulations displayed an ultra-compact size device with ultra-fast tune-ability speed.     

Electrical Transport Mechanisms and Photoconduction in Undoped Crystalline Flash-Evaporated Lead Iodide Thin Films

The flash-evaporation technique was utilized to fabricate undoped 1.35-μm and 1.2-μm thick lead iodide films at substrate temperatures \( T_{\rm{s}} = 150 \)°C and 200°C, respectively. The films were deposited onto a coplanar comb-like copper (Cu-) electrode pattern, previously coated on glass substrates to form lateral metal–semiconductor–metal (MSM-) structures. The as-measured constant-temperature direct-current (dc)-voltage (\( I\left( {V;T} \right) - V \)) curves of the obtained lateral coplanar Cu-PbI₂-Cu samples (film plus electrode) displayed remarkable ohmic behavior at all temperatures (\( T = 18 - 90\,^\circ {\hbox{C}} \)). Their dc electrical resistance \( R_{\rm{dc}} (T \)) revealed a single thermally-activated conduction mechanism over the temperature range with activation energy \( E_{\rm{act}} \approx 0.90 - 0.98 \,{\hbox{eV}} \), slightly less than half of room-temperature bandgap energy \( E_{\rm{g}} \) (\( \approx \,2.3\, {\hbox{eV}} \)) of undoped 2H-polytype PbI₂ single crystals. The undoped flash-evaporated \( {\hbox{PbI}}_{\rm{x}} \) thin films were homogeneous and almost stoichiometric (\( x \approx 1.87 \)), in contrast to findings on lead iodide films prepared by other methods, and were highly crystalline hexagonal 2H-polytypic structure with c-axis perpendicular to the surface of substrates maintained at \( T_{\rm{s}} { \gtrsim }150^\circ {\hbox{C}} \). Photoconductivity measurements made on these lateral Cu-PbI₂-Cu-structures under on–off visible-light illumination reveal a feeble photoresponse for long wavelengths (\( \lambda > 570\,{\hbox{nm}} \)), but a strong response to blue light of photon energy \( E_{\rm{ph}} \) \( \approx \,2.73 \, {\hbox{eV}} \) (\( > E_{\rm{g}} \)), due to photogenerated electron–hole (e–h) pairs via direct band-to-band electronic transitions. The constant-temperature/dc voltage current–time \( I\left( {T,V} \right) - t \) curves of the studied lateral PbI₂ MSM-structures at low ambient temperatures (\( T < 50^\circ {\hbox{C}} \)), after cutting off the blue-light illumination, exhibit two trapping mechanisms with different relaxation times. These strongly depend on \( V \) and \( T \), with thermally generated charge carriers in the PbI₂ mask photogenerated (e–h) pairs at higher temperatures.     

Ab␣Initio Study of Aluminium Impurity and Interstitial-Substitutional Complexes in Ge Using a Hybrid Functional (HSE)

The results of an ab?initio modelling of aluminium substitutional impurity (\({\hbox {Al}}_{\rm Ge}\)), aluminium interstitial in Ge [\({\hbox {I}}_{\rm Al}\) for the tetrahedral (T) and hexagonal (H) configurations] and aluminium interstitial-substitutional pairs in Ge (\({\hbox {I}}_{\rm Al}{\hbox {Al}}_{\rm Ge}\)) are presented. For all calculations, the hybrid functional of Heyd, Scuseria, and Ernzerhof in the framework of density functional theory was used. Defects formation energies, charge state transition levels and minimum energy configurations of the \({\hbox {Al}}_{\rm Ge}\), \({\hbox {I}}_{\rm Al}\) and \({\hbox {I}}_{\rm Al}{\hbox {Al}}_{\rm Ge}\) were obtained for ?2, ?1, 0, \(+\)1 and \(+\)2 charge states. The calculated formation energy shows that for the neutral charge state, the \({\hbox {I}}_{\rm Al}\) is energetically more favourable in the T than the H configuration. The \({\hbox {I}}_{\rm Al}{\hbox {Al}}_{\rm Ge}\) forms with formation energies of ?2.37 eV and ?2.32 eV, when the interstitial atom is at the T and H sites, respectively. The \({\hbox {I}}_{\rm Al}{\hbox {Al}}_{\rm Ge}\) is energetically more favourable when the interstitial atom is at the T site with a binding energy of 0.8 eV. The \({\hbox {I}}_{\rm Al}\) in the T configuration, induced a deep donor (\(+\)2/\(+1\)) level at \(E_{\mathrm {V}}+0.23\) eV and the \({\hbox {Al}}_{\rm Ge}\) induced a single acceptor level (0/?1) at \(E_{\mathrm {V}}+0.14\) eV in the band gap of Ge. The \({\hbox {I}}_{\rm Al}{\hbox {Al}}_{\rm Ge}\) induced double-donor levels are at \(E_{\rm V}+0.06\) and \(E_{\rm V}+0.12\) eV, when the interstitial atom is at the T and H sites, respectively. The \({\hbox {I}}_{\rm Al}\) and \({\hbox {I}}_{\rm Al}{\hbox {Al}}_{\rm Ge}\) exhibit properties of charge state-controlled metastability.     

Two-channel perfect reconstruction (PR) quadrature mirror filter (QMF) bank design using logarithmic window function and spline function

In this work, two-channel perfect reconstruction quadrature mirror filter (QMF) bank has been proposed based on the prototype filter using windowing method. A novel window function based on logarithmic function along with the spline function is utilized for the design of prototype filter. The proposed window has a variable parameter ‘\(\alpha \)’, which varies the peak side lobe level and rate of fall-off side lobe level which in turn affects the peak reconstruction error (PRE) and amplitude distortion (\(e_{am}\)) of the QMF bank . The transition width of the prototype is controlled by the spline function using the parameter ‘\(\mu \)’. The perfect reconstruction condition is satisfied by setting the cutoff frequency (\(\omega _{c}\)) of the prototype low-pass filter at ‘\(\pi /2\)’. The performance of the proposed design method has been evaluated in terms of mean square error in the pass band, mean square error in the stop band, first side lobe attenuation (\(A_{1}\)), peak reconstruction error (PRE) and amplitude error (\(e_{am}\)) for different values of ‘\(\alpha \)’ and ‘\(\mu \)’. The results are provided and compared with the existing methods.     

New refractive index profiles of dispersion-flattened highly nonlinear fibers for future all-optical signal processing in wdm optical networks

In this paper, we demonstrate new dissimilar refractive index profiles for highly nonlinear ultra-flattened dispersion fibers with noteworthy effective area \((A_\mathrm{eff})\) for future optical signal processing. The newly proposed fibers named from Type 1 to Type 5 have a flattened dispersion over S, C, L and U bands. Predominantly, few-mode HNL-UFF fiber of Type 3 yields dispersion-flattened characteristics over a range of 250 nm of optical communication spectrum with a mere 0.2 ps/nm km variation in dispersion and a dispersion slope of \(0.0057\hbox { ps}/\hbox {nm}^{2}\) km due to the contribution of higher-order modes to the dispersion characteristics of the fiber. Moreover, it has a moderate nonlinear coefficient of \(8.03\hbox { W}^{-1}\,\hbox {km}^{-1}\). By modifying the refractive index profile of Type 3 fiber, Type 4 and Type 5 fibers are obtained in order to ensure single-mode operation, while the zero flattened dispersion characteristics of the fiber are compromised. Among the newly proposed fibers, Type 4 fiber offers a very low ITU-T cutoff wavelength of \(1.33~\upmu \hbox {m}\), whereas in the case of Type 5 fiber it is \(1.38~\upmu \hbox {m}\). Moreover, Type 4 and Type 5 fibers have good nonlinear coefficients of \(12.26\hbox { W}^{-1}\,\hbox {km}^{-1}\) and \(11.45\hbox { W}^{-1}\,\hbox {km}^{-1}\), respectively. By virtue of the proposed optimized index profile, an insensitive behavior toward bending is displayed by Type 3, Type 4 and Type 5 fibers. In addition, Type 4 fiber provides a better splice loss of 0.25 dB.     

Correction to: A subthreshold low-power CMOS LC-VCO with high immunity to PVT variations

This paper presents a capacitor-free low dropout (LDO) linear regulator based on a dual loop topology. The regulator utilizes two feedback loops to satisfy the challenges of hearing aid devices, which include fast transient performance and small voltage spikes under rapid load-current changes. The proposed design works without the need of a decoupling capacitor connected at the output and operates with a 0–100 pF capacitive load. The design has been taped out in a \(0.18\,\upmu \hbox {m}\) CMOS process. The proposed regulator has a low component count, area of \(0.012\, \hbox {mm}^2\) and is suitable for system-on-chip integration. It regulates the output voltage at 0.9 V from a 1.0–1.4 V supply. The measured results for a current step load from 250 to 500 \(\upmu \hbox {A}\) with a rise and fall time of \(1.5\,\upmu \hbox {s}\) are an overshoot of 26 mV and undershoot of 26 mV with a settling time of \(3.5\,\upmu \hbox {s}\) when \({C_L}\) between 0 and 100 pF. The proposed LDO regulator consumes a quiescent current of only \(10.5\,\upmu \hbox {A}\). The design is suitable for application with a current step edge time of 1 ns while maintaining \(\Delta V_{out}\) of 64 mV.     

Efficient Slide Attacks

The slide attack, presented by Biryukov and Wagner, has already become a classical tool in cryptanalysis of block ciphers. While it was used to mount practical attacks on a few cryptosystems, its practical applicability is limited, as typically, its time complexity is lower bounded by \(2^n\) (where n is the block size). There are only a few known scenarios in which the slide attack performs better than the \(2^n\) bound. In this paper, we concentrate on efficient slide attacks, whose time complexity is less than \(2^n\). We present a number of new attacks that apply in scenarios in which previously known slide attacks are either inapplicable, or require at least \(2^n\) operations. In particular, we present the first known slide attack on a Feistel construction with a 3-round self-similarity, and an attack with practical time complexity of \(2^{40}\) on a 128-bit key variant of the GOST block cipher with unknown S-boxes. The best previously known attack on the same variant, with known S-boxes (by Courtois), has time complexity of \(2^{91}\).     

Low-Voltage CMOS Switch for High-Speed Rail-To-Rail Sampling

Sampling switches have a dominant role in switched-capacitor circuits and analog-to-digital convertors. Since they act as input gates, their nonlinearities directly degrade the quality of the input signals. The scaling-down trend of CMOS technology and increasing demands for high-speed and power-efficient circuits pose design challenge in high-speed sampling switches for low-voltage applications. To address this issue, an optimized CMOS switch is proposed in this paper consisting of a bootstrapped NMOS switch and a boosted PMOS switch as a transmission gate. By utilizing this technique, the nonlinearity resulting from the threshold voltage variation (body effect) of NMOS switch is mitigated, considerably. To evaluate the proposed switch, it is designed in 0.18 \(\upmu \hbox {m}\) CMOS process technology. According to the obtained simulation results, this switch can achieve total harmonic distortion of \(-\)78.81 and \(-\)62.99 dB in 100 MS/s at \(V_\mathrm{dd}\) = 1 Volt and 50 MS/s at \(V_\mathrm{dd}\) = 0.8 V, respectively.     

Providing traffic tolerance in optical packet switching networks: a reinforcement learning approach

The servitization of network resources leads to new challenges for optical networks. For instance, to provide on-demand lightpaths as a service while keeping the probability of packet loss (PPL) low, issues such as lightpath setting up, resource reservation and load balancing must be addressed. We present a self-adaptive framework to process lightpath requests on packet switching optical networks that considers and handles the aforementioned issues. The framework is composed of a dimensioning phase that adds up new resources to an initial topology and a learning phase based on reinforcement learning that provides self-adaptation to tolerate traffic changes. The framework is tested on three realistic mesh topologies achieving a PPL between \(1 \times 10^{-1}\) and \(1 \times 10^{-6}\) for different traffic loads. Compared to fixed multi-path routing strategies, our framework reduces PPL between \(19\%\) and up to \(80\%\). Furthermore, no packet loss can also be achieved for traffic loads equal to or lower than 0.4.