A pseudo-CCM/DCM SIMO switching converter with freewheel switching

This paper presents a single-inductor multiple-output (SIMO) converter operating in pseudo-continuous conduction mode (PCCM) and/or discontinuous conduction mode (DCM). With the proposed freewheel switching control, this converter can handle large load currents with a much smaller current ripple, while retaining low cross regulation. It can also work in DCM for high efficiency at light loads. A prototype of a single-inductor dual-output (SIDO) boost converter was fabricated with a standard 0.5-/spl mu/m CMOS n-well process. The two outputs are regulated at 2.5 and 3.0 V, respectively. At an oscillator frequency of 1 MHz, the efficiency reaches 89.4% at a total output power of 320 mW. Compared with prior designs, both current and voltage ripples are reduced. This design can be extended to have multiple outputs and for different types of dc-dc conversions, or be applied to single-output converters for fast transient response.     

Analysis and Design for a New ZVS DC–DC Converter With Active Clamping

A new zero voltage switching (ZVS) boost converter is presented in this paper. By using an auxiliary switch and a capacitor, ZVS for all switches is achieved with an auxiliary winding in one magnetic core. A small diode is added to eliminate the voltage ringing across the main rectifier diode. This clamping technique can also be utilized in other dc-dc converters, and a family of new ZVS dc-dc converter is derived. A prototype (500 W/193 kHz) is made to verify the theoretical analysis. The efficiency is higher than 94% at 90-V input at full load     

Dual-bridge DC-DC converter: a new topology characterized with no deadtime operation

Two new topologies characterized by no deadtime and small valued filter inductor, the Dual-Bridge dc-dc converter and the Dual-Bridge dc-dc converter with ZVS, are presented and analyzed. Compared to the conventional Full-Bridge converter, the dc-dc converters with the proposed topologies have lower input current ripple, less stress on power switching components and smaller output filter inductor. Simple self-driven synchronous rectification can be used in the new topologies for high efficiency implementation. Prototype dc-dc converters have been tested for the verification of the principles. Both simulations and experiments verify the feasibility and advantages of the new topologies. The advantages and disadvantages of the topologies are discussed.     

A new ZVS bidirectional DC-DC converter for fuel cell and battery application

This paper presents a new zero-voltage-switching (ZVS) bidirectional dc-dc converter. Compared to the traditional full and half bridge bidirectional dc-dc converters for the similar applications, the new topology has the advantages of simple circuit topology with no total device rating (TDR) penalty, soft-switching implementation without additional devices, high efficiency and simple control. These advantages make the new converter promising for medium and high power applications especially for auxiliary power supply in fuel cell vehicles and power generation where the high power density, low cost, lightweight and high reliability power converters are required. The operating principle, theoretical analysis, and design guidelines are provided in this paper. The simulation and the experimental verifications are also presented.     

Zero-voltage-switching half-bridge DC-DC converter with modified PWM control method

Asymmetric control scheme is an approach to achieve zero-voltage switching (ZVS) for half-bridge isolated dc-dc converters. However, it is not suited for wide range of input voltage due to the uneven voltage and current components stresses. This paper presents a novel "duty-cycle-shifted pulse-width modulated" (DCS PWM) control scheme for half-bridge isolated dc-dc converters to achieve ZVS operation for one of the two switches without causing the asymmetric penalties in the asymmetric control and without adding additional components. Based on the DCS PWM control scheme, an active-clamp branch comprising an auxiliary switch and a diode is added across the isolation transformer primary winding in the half-bridge converter to achieve ZVS for the other main switch by utilizing energy stored in the transformer leakage inductance. Moreover, the auxiliary switch also operates at ZVS and zero-current switching (ZCS) conditions. Furthermore, during the off-time period, the ringing resulted from the oscillation between the transformer leakage inductance and the junction capacitance of two switches is eliminated owing to the active-clamp branch and DCS PWM control scheme. Hence, switching losses and leakage-inductance-related losses are significantly reduced, which provides the converter with the potential to operate at higher efficiencies and higher switching frequencies. The principle of operation and key features of the proposed DCS PWM control scheme and two ZVS half-bridge topologies are illustrated and experimentally verified.     

A Single-Inductor Switching DC–DC Converter With Five Outputs and Ordered Power-Distributive Control

An integrated five-output single-inductor multiple-output dc-dc converter with ordered power-distributive control (OPDC) in a 0.5 mum Bi-CMOS process is presented. The converter has four main positive boost outputs programmable from +5 V to +12 V and one dependent negative output ranged from -12 V to -5 V. A maximum efficiency of 80.8% is achieved at a total output power of 450 mW, with a switching frequency of 700 kHz. The performance of the converter as a commercial product is successfully verified with a new control method and proposed circuits, including a full-waveform inductor-current sensing circuit, a variation-free frequency generator, and an in-rush-current-free soft-start method. With simplicity, flexibility, and reliability, the design enables shorter time-to-market in future extensions with more outputs and different operation requirements.     

Nonisolation Soft-Switching Buck Converter With Tapped-Inductor for Wide-Input Extreme Step-Down Applications

In this paper, a new zero-voltage switching (ZVS) buck converter with a tapped inductor (TI) is proposed. This converter improves the conventional tapped inductor critical conduction mode buck converters that have the ZVS operation range determined by the TI turn ratios. It includes another soft switching range extension method, the current injection method, which gives an additional design freedom for the selection of the turn-ratios and enables the optimal design of the winding ratio of the TI so that the efficiency may be maximized. This soft-switching buck converter is suitable for wide input range step-down applications. The principle of the proposed scheme, analysis of the operation, and design guidelines are included. Experimental results of the 100-W prototype dc-dc converter are given for hardware verification also. Finally, based on the proposed soft-switching technique, a new soft-switching topology family is derived.     

Analysis and design considerations of a load and line independent zero voltage switching full bridge DC/DC converter topology

The analysis and design of a zero voltage switching (ZVS) full bridge DC/DC power converter topology is presented in this paper. The converter topology presented here employs an asymmetrical auxiliary circuit consisting of a few passive components. With this auxiliary circuit, the full bridge converter can achieve ZVS independent of line and load conditions. The operating principle of the circuit is demonstrated, and the steady state analysis is performed. Based on the analysis, a criterion for optimal design is given. Experiment and simulation on a 350-400 V to 55 V, 500 W prototype converter operated at 100 kHz verify the design and show an overall efficiency of greater than 97% at full load.     

A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package

We demonstrate an integrated buck dc-dc converter for multi-V/sub CC/ microprocessors. At nominal conditions, the converter produces a 0.9-V output from a 1.2-V input. The circuit was implemented in a 90-nm CMOS technology. By operating at high switching frequency of 100 to 317 MHz with four-phase topology and fast hysteretic control, we reduced inductor and capacitor sizes by three orders of magnitude compared to previously published dc-dc converters. This eliminated the need for the inductor magnetic core and enabled integration of the output decoupling capacitor on-chip. The converter achieves 80%-87% efficiency and 10% peak-to-peak output noise for a 0.3-A output current and 2.5-nF decoupling capacitance. A forward body bias of 500 mV applied to PMOS transistors in the bridge improves efficiency by 0.5%-1%.     

Three-level LLC series resonant DC/DC converter

Paper presents a three-level soft switching LLC series resonant dc/dc converter. Zero-voltage switching (ZVS) is achieved for each main switch without any auxiliary circuit. Voltage stress of each main switch is half of input voltage. Zero-current-switching (ZCS) is achieved for rectifier diodes. Wide input/output range can be achieved under low frequency range because of two-stage resonance. Only one magnetic component is required in this converter. Efficiency is higher in high line input, so this converter is a preferable candidate for power products with the requirement of hold up time. For design convenience, relationship between dc gain and switching frequency, load resistance is deduced. Its open load characteristic and short load characteristic are exposed to provide theory basis for no load operation and over current protection. Design consideration of four dead times is presented to assure that voltage stress for main switches is within half of input voltage and ZVS for each main switch is achieved. Finally the principle of operation and the characteristics of the presented converter are verified on a 500V-700V input 54V/10A output experimental prototype, whose efficiency reaches 94.7% under rating condition.     

Analysis and Implementation of a ZVS-PWM Converter With Series-Connected Transformers

This brief presents the analysis, design, and implementation of zero-voltage switching (ZVS) active clamp converter with series-connected transformer. A family of isolated ZVS active clamp converters is introduced. The technique of the adopted ZVS commutation will not increase additional voltage stress of switching devices. In the adopted converter with series-connected transformer, each transformer can be operated as an inductor or a transformer. Therefore, no output inductor is needed. To reduce the voltage stress of the switching device in the conventional forward converter, the active clamp technique is used to recycle the energy stored in the transformer leakage back into the input dc source. Finally, experimental results are presented taken from a laboratory prototype with 100-W rated power, input voltage of 155 V, output voltage of 5 V, and operating at 150 kHz. [All rights reserved Elsevier].     

A Novel ZVS Resonant Reset Dual Switch Forward DC–DC Converter

This paper presents a new topology named zero-voltage switching (ZVS) resonant reset dual switch forward dc-dc converter, which, compared with resonant reset single switch forward dc-dc converter, maintains the advantage that duty cycle can be more than 50%, at the same time disadvantages of high voltage stress for main switches and low efficiency are overcome. In addition, ZVS is achieved for all switches of the presented topology. Therefore, this proposed topology is very attractive for high voltage input, wide range, and high efficiency applications. In this paper, the operation principle and characteristic of this topology are analyzed in detail. Next, the design consideration is presented. Finally, the advantages mentioned above are verified by experimental results     

Low-voltage-swing monolithic dc-dc conversion

A low-voltage-swing MOSFET gate drive technique is proposed in this paper for enhancing the efficiency characteristics of high-frequency-switching dc-dc converters. The parasitic power dissipation of a dc-dc converter is reduced by lowering the voltage swing of the power transistor gate drivers. A comprehensive circuit model of the parasitic impedances of a monolithic buck converter is presented. Closed-form expressions for the total power dissipation of a low-swing buck converter are proposed. The effect of reducing the MOSFET gate voltage swings is explored with the proposed circuit model. A range of design parameters is evaluated, permitting the development of a design space for full integration of active and passive devices of a low-swing buck converter on the same die, for a target CMOS technology. The optimum gate voltage swing of a power MOSFET that maximizes efficiency is lower than a standard full voltage swing. An efficiency of 88% at a switching frequency of 102 MHz is achieved for a voltage conversion from 1.8 to 0.9 V with a low-swing dc-dc converter based on a 0.18-/spl mu/m CMOS technology. The power dissipation of a low-swing dc-dc converter is reduced by 27.9% as compared to a standard full-swing dc-dc converter.     

单相两级有源功率因数校正变换器的研究

文中对两级有源功率因数校正变换器进行研究,设计了一台510W两级式开关电源。该电源前级采用平均电流控制的Boost型PFC电路,实现功率因数校正;后级采用不对称半桥型DC／DC变换器,实现开关管的零电压开关。控制电路采用PFC／PWM复合控制芯片ML4824,缩小电源体积。通过实验证实该开关电源具有高功率因数与高效率的特点。     

Soft-switched DC/DC converter with PWM control

In this paper, a new power converter with two variations is proposed. A novel asymmetrical pulse-width-modulation (PWM) control scheme is used to control the power converter under constant switching frequency operation. The modes of operation for both variations are discussed. The DC characteristics, which can be used in the design of the power converters, are also presented. Two 50 W power converters were built to verify the characteristics of the converters. Due to the zero-voltage-switching (ZVS) operation of the switches and low device voltage and current stresses, these power converters have high full- and partial-load efficiencies. They are, therefore, potential candidates for high-efficiency high-density power supply applications     

A Bidirectional Isolated DC–DC Converter as a Core Circuit of the Next-Generation Medium-Voltage Power Conversion System

This paper describes a bidirectional isolated dc-dc converter considered as a core circuit of 3.3-kV/6.6-kV high-power-density power conversion systems in the next generation. The dc-dc converter is intended to use power switching devices based on silicon carbide (SiC) and/or gallium nitride, which will be available on the market in the near future. A 350-V, 10-kW and 20 kHz dc-dc converter is designed, constructed and tested. It consists of two single-phase full-bridge converters with the latest trench-gate insulated gate bipolar transistors and a 20-kHz transformer with a nano-crystalline soft-magnetic material core and litz wires. The transformer plays an essential role in achieving galvanic isolation between the two full-bridge converters. The overall efficiency from the dc-input to dc-output terminals is accurately measured to be as high as 97%, excluding gate drive and control circuit losses from the whole loss. Moreover, loss analysis is carried out to estimate effectiveness in using SiC-based power switching devices. Loss analysis clarifies that the use of SiC-based power devices may bring a significant reduction in conducting and switching losses to the dc-dc converter. As a result, the overall efficiency may reach 99% or higher     

非对称半桥式开关电源的分析与设计

非对称半桥电路拓扑采用脉冲宽度调制技术,具有易实现零电压开关的优点,可广泛应用于家用电器,汽车电子等领域中。文中首先介绍了非对称半桥电路的工作原理,接着对其进行了稳态分析,重点给出了一个非对称半桥式开关电源的设计过程。考虑到拓扑结构参数和零电压开关的影响,对电路的输出电压进行了修正。此外,谐振电感和死区时间是确保零电压开关实现的两个重要参数,文中给出了其实际的设计过程,并通过仿真证明了其实现的可行性。     

数字控制LLC谐振全桥变换器的应用设计

针对模拟电源效率较低的现状,提出一种基于DSP的数字电源方案。在对LLC谐振全桥变换器工作原理简单分析的基础上,采用DSP TMS320F28335设计了一款输入为DC300-400V,输出为DC48V/12A的原理样机,利用Saber仿真软件对其进行仿真与调试,仿真结果与实验数据表明,本文设计的LLC全桥谐振变换器能够在全负载范围内实现初级零电压开通（ZCS）以及次级零电流关断（ZVS）,输出电压纹波小于±0.5%,效率达到95%以上,满足设计要求。结论表明,LLC谐振变换器符合电源高功率密度、高效率的发展要求。     

A Multistage Interleaved Synchronous Buck Converter With Integrated Output Filter in 0.18 μm SiGe Process

The design and analysis of a fully integrated multistage interleaved synchronous buck dc-dc converter with on-chip filter inductor and capacitor is presented. The dc-dc converter is designed and fabricated in 0.18 mum SiGe RF BiCMOS process technology and generates 1.5 V-2.0 V programmable output voltage supporting a maximum output current of 200 mA. High switching frequency of 45 MHz, multiphase interleaved operation, and fast hysteretic controller reduce the filter inductor and capacitor sizes by two orders of magnitude compared to state-of-the-art converters and enable a fully integrated converter. The fully integrated interleaved converter does not require off-chip decoupling and filtering and enables direct battery connection for integrated applications. This design is the first reported fully integrated multistage interleaved, zero voltage switching synchronous buck converter with monolithic output filters. The fully integrated buck regulator achieves 64% efficiency while providing an output current of 200 mA.     

High Voltage Tolerant Linear Regulator With Fast Digital Control for Biasing of Integrated DC-DC Converters

Integrated DC-DC converters switching above 100MHz dramatically reduce the footprint of the inductors and capacitors while improving droop response. Unfortunately, such converters utilize advanced digital CMOS processes with the maximum input voltage below 2 V. We propose a fully integrated linear regulator that enables doubling of the converter input voltage by properly biasing stacked drivers and bridge transistors. By implementing fast digital control the linear regulator meets the transient current demand of the converter without resorting to off-chip decoupling capacitors. In a 90 nm CMOS process, the 2.4V input, 1.2 V output, linear regulator occupies 0.03 mm² for a plusmn1 A rating. A 288 ps response time and 97.5% current efficiency result in a 2.84times improvement in speed-power figure of merit over previous work