All-inkjet-printed dissolved oxygen sensors on flexible plastic substrates

Inkjet printing is a promising alternative manufacturing method to conventional standard microfabrication techniques for the development of flexible and low-cost devices. Although the use of inkjet printing for the deposition of selected materials for the development of sensor devices has been reported many times in literature, it is still a challenge and a potential route towards commercialization to completely manufacture sensor devices with inkjet technology. In this work is demonstrated the fabrication of a functional low-cost dissolved oxygen (DO) amperometric sensor with feature sizes in the micrometer range using inkjet printing. All the required technological steps for the fabrication of a complete electrochemical three electrodes system are discussed in detail. The working and counter electrodes have been printed using a gold nanoparticle ink, whereas a silver nanoparticle ink was used to print a pseudo-reference electrode. Both inks are commercially available and can be sintered at low temperatures, starting already at 120 °C, which allows the use of plastic substrates. In addition, a printable SU8 ink formulation cured by UV is applied as passivation layer in the sensor device. Finally, as the performance of analytical methods strongly depends on the working electrode material, is demonstrated the electrochemical feasibility of this printed DO sensor, which shows a linear response in the range between 0 and 8 mg L⁻¹ of DO, and affords a detection limit of 0.11 mg L⁻¹, and a sensitivity of 0.03 μA L mg⁻¹. The use of flexible plastic substrates and biocompatible inks, and the rapid prototyping and low-cost of the fabricated sensors, makes that the proposed manufacturing approach opens new opportunities in the field of biological and medical sensor applications.     

Low frequency noise in thin gate oxide MOSFETs

Low frequency, 1/f, noise of the drain current, I_D, fluctuations was measured on a series of Si MOSFETs with the gate oxide thickness, t_ox, varied from 25 to 40 Å by steps of 5 Å. The salient point of this work is a demonstration that, at sufficiently low I_D intensities, a mean low noise level in the MOSFETs is reduced as the gate oxide becomes thinner. This is explained assuming that the noise originates from the electron capture/release on Si/SiO₂ interface/border traps. The flat band voltage fluctuations, observable as noise, are linked then to the oxide charge fluctuations by a factor, that is inversely proportional to the gate capacitance, C_ox, and thus proportional to t_ox. At higher I_D, the results are more complicated, as the access resistance noise is also involved. We provide an interpretation of the ensemble of the data and show that the noise analysis can furnish quantitative estimates of several device characteristics. Device degradation and its consequences for the low frequency noise at higher current levels are also discussed.     

Transparent flexible plastic substrates for organic light-emitting devices

In this paper, we describe the properties of flexible plastic substrates with a transparent conducting electrode (TCE), which are important for organic light-emitting devices (OLEDs). Specifically, we have evaluated the TCE electrical resistivity, surface roughness, electrode patterning, optical transmission, and the substrate water vapor/oxygen transmission. We have studied the effect of ultraviolet (UV)-ozone treatment on the TCE surface by using contact angle measurements and x-ray photoelectron spectroscopy (XPS). A decrease in the advancing contact angle by 30–40° and an increase of oxygen content on the TCE surface by 10 at.% were observed after the UV-ozone treatment. These changes facilitate the polymer adhesion to the TCE surface and increase the TCE surface work function, respectively. A sheet resistance of 12–13 Ω/□, an optical transmission greater than 80% over the visible range, and a surface roughness of 1.4–2.2-nm RMS over 50×50 μm² have been obtained for the plastic substrates. These properties are adequate for OLED applications based on United States Display Consortium specifications. Finally, we have found that a combination of hydrogenated amorphous silicon-nitride and silicon-oxide layers deposited on one side of the substrate at low-temperature reduces the water vapor and oxygen transmission rates (TRs) to less than 10⁻⁵ g/cm²-day-atm and about 10⁻⁷ cc/cm²-day-atm, respectively.     

Silated acidic copolymers for nanoimprint lithography on flexible plastic substrates

A new silated acidic polymer was developed as the resist for nanoimprint lithography on flexible substrates. This polymer was synthesized from methylmethacrylate, n-butylacrylate, methacrylic acid and 3-[tris(trimethylsiloxy)silyl]propyl methacrylate by free radical copolymerization with an azobisisobutyronitrile (AIBN) initiator at 90 °C. The resist has excellent reactive ion etching (RIE) resistability, a lower T_g (43 °C) compared to poly(methyl methacrylate) (PMMA) and good flowability. It is suitable to use on flexible plastic substrates. The resist can be easily removed by an aqueous base solution at the final stripping step, instead of using an organic solvent or RIE. A 100 nm/50 nm (line/space) feature pattern was obtained on a flexible polyethylene terephthalate (PET)/ITO substrate.     

A microscopic interpretation of the RF noise performance of fabricated FDSOI MOSFETs

In this paper, a detailed research of the high-frequency noise sources and figures of merit (FOMs) of fabricated deep-submicrometer n-channel fully depleted silicon-on-insulator MOSFETs is carried out. Special care is given to reproduce the main topology parameters, together with the most relevant parasitic elements of real devices in order to accomplish an accurate and reliable simulation. The information provided by the Monte Carlo (MC) tool allows getting a physical insight of the relationship between internal quantities and the main noise sources inside the device; moreover, the spectral density of velocity fluctuations has been analyzed spatially in order to determine the local current noise source in the gradual channel and velocity overshoot sections of the effective channel. Together with the calculation of intrinsic noise sources, the MC simulator is able to reproduce the measurements for the main noise FOMs in the RF and microwave frequency ranges. Moreover, the whole simulation framework allows addressing the importance of parasitic elements in the final value of these FOMs.     

Low frequency noise and technology induced mechanical stress in MOSFETs

A detailed experimental investigation of low frequency noise as a function of technology-induced mechanical stress in MOSFET devices is presented. Both n- and p-MOSFETs have been studied. Strain in the channel region is obtained by the Shallow Trench Isolation (STI) technique. An increasing of 1/f noise intensity when compressive mechanical stress increases has been detected in p-channel transistor. A critical discussion of this experimental finding has been proposed in the scenario of advanced generation CMOS technologies.     

RF model of flexible microwave single-crystalline silicon nanomembrane PIN diodes on plastic substrate

This paper reports the realization and RF modeling of flexible microwave P-type-Intrinsic-N-type (PIN) diodes using transferrable single-crystalline Si nanomembranes (SiNMs) that are monolithically integrated on low-cost, flexible plastic substrates. With high-energy, high-dose ion implantation and high-temperature annealing before nanomembrane release and transfer process, the parasitic parameters (i.e. resistance, inductance, etc.) are effectively reduced, and the flexible PIN diodes achieve good high-frequency response. With consideration of the flexible device fabrication, structure and layout configuration, a RF model of the microwave single-crystalline Si nanomembrane PIN diodes on plastic substrate is presented. The RF/microwave equivalent circuit model achieves good agreement with the experimental results of the single-crystalline SiNM PIN diodes with different diode areas, and reveals the most influential factors to flexible diode characteristics. The study provides guidelines for properly designing and using single-crystalline SiNMs for flexible RF/microwave diodes and demonstrates the great possibility of flexible monolithic microwave integrated systems.     

射频MOSFET噪声模型研究

对0.13μm MOSFET噪声建模和参数提取技术进行了研究,在精确地提取了小信号模型参数之后,利用噪声相关矩阵技术从测量的散射参数和射频噪声参数直接提取了栅极感应噪声电流■、沟道噪声电流■和它们的相关系数,并用PRC模型中的参数来表示。将参数提取结果带入ADS中进行仿真,在2～8GHz频段上仿真结果与测量数据吻合良好。     

4H-SiC RF power MOSFETs

A 4H silicon carbide lateral RF MOSFET has been fabricated and characterized for the first time. The improved performance of this device was facilitated by a two-metal-layer process, which optimizes the conflicting requirements of acceptable inversion-layer mobility and low contact resistance. The cut-off frequency of the device with 1-μm gate length was in excess of 7 GHz     

High-power-density 4H-SiC RF MOSFETs

The authors have made the first 4H-SiC RF power MOSFETs with cutoff frequency up to 12 GHz, delivering RF power of 1.9 W/mm at 3 GHz. The transistors withstand 200 V drain voltage, are normally off, and show no gate lag, which is often encountered in SiC MESFETs. The measured devices have a single drain finger and a double gate finger, and a total gate width of 0.8 mm. To their knowledge, this is the first time that power densities above 1 W/mm at 3 GHz are reported for SiC MOSFETs.     

Very low noise RF nMOSFETs on plastic by substrate thinning and wafer transfer

A very low minimum noise figure (NF/sub min/) of 1.2 dB and a high associated gain of 12.8 dB at 10 GHz were measured for six-finger, 0.18-/spl mu/m radio frequency (RF) metal-oxide semiconductor field-effect transistors mounted on insulating plastic following substrate-thinning (/spl sim/30 /spl mu/m) and wafer transfer. Before this process, the devices had a slightly better RF performance of 1.1-dB NF/sub min/ and a 13.7-dB associated gain. The small RF performance degradation of the active transistors transferred to plastic shows the potential of integrating electronics onto plastic.     

Bias-stress stability of low-voltage p-channel and n-channel organic thin-film transistors on flexible plastic substrates

The bias-stress stability of low-voltage organic p-channel and n-channel thin-film transistors (TFTs) based on five promising organic semiconductors and fabricated on flexible polyethylene naphthalate (PEN) substrates has been investigated. In particular, it has been studied to which extent the bias-stress-induced decay of the on-state drain current of the TFTs is affected by the choice of the semiconductor and by the gate-source and drain-source voltages applied during bias stress. It has been found that for at least some of the organic p-channel TFTs investigated in this study, the bias-stress stability is comparable to that of a-Si:H and metal-oxide TFTs, despite the fact that the organic TFTs were fabricated at significantly lower process temperatures, which is important in view of the fabrication of these devices on plastic substrates.     

Impact of adhesive rheology on stress-distortion of bonded plastic substrates for flexible electronics applications

For fabrication of flexible electronics using standard microelectronics toolsets, a temporary bond-debond method has been developed that requires minimization of the distortion of bonded flexible substrate and bow of bonded system (flexible substrate-adhesive-carrier) during processing. To elucidate the critical parameters of the adhesive used in the bonding that control the stress (bow) and distortion, adhesives with different viscoelastic properties are examined systematically. By blending a high modulus adhesive into a low modulus adhesive, the storage modulus, loss modulus and loss factor of the adhesive can be tuned by orders of magnitude. Detailed examination of the impact of these three rheological parameters on the stress and distortion of bonded system reveals that the relative viscoelastic flow properties of the bonding adhesive to that of the bonded flexible substrate are directly correlated to bow and distortion. When the loss factor of the adhesive is less than that for the plastic substrate, precise registration of layers during photolithography is observed. These results provide insight into the rheological parameters critical to the adhesive formulations for the temporary bond-debond method in the fabrication of flexible electronics.     

High-frequency thermal noise in MOSFETs

Noise measurements on large-channel silicon on saphire (SOS) MOSFETs, at frequencies where transit time effects become important, clearly show that the high frequency noise increases with increasing frequency, as predicted theoretically. Qualitative agreement exists with the theory; quantitative agreement is not achievable, because the low-frequency thermal noise is masked by flicker noise and (or) trapping noise.     

Thermal noise in ion-implanted MOSFETs

Measurements are reported on high-frequency noise in ion-implanted MOSFETs. The results are interpreted in terms of the thermal noise of the conducting channel.     

High-quality oxide formed by evaporation of SiO nanopowder: Application to MOSFETs on plastic substrates and GaN epilayers

Although good gate oxide of SiO₂ is usually formed by high-temperature thermal oxidation, lowering the temperature for formation of SiO₂ is mandatory for future Si VLSIs, in particular, for flexible ICs, the demand for which has been increasing every year. Vacuum evaporation of SiO powder is an ideal technique not only to form oxide at low temperature but also to form an abrupt interface with the substrate. The latter feature of evaporation is suitable to form thin gate oxide for Si MOSFETs and gate oxide on compound semiconductors. High-quality SiO₂ on compound semiconductors helps development of MOSFETs made of compound semiconductors, which were longed for to be commercially available. The evaporation is not much used to form SiO₂ for MOSFETs in spite of its many advantages, because quality of SiO₂ formed by evaporation of SiO is too poor to be used as gate oxide. Unlike the commercial SiO powder, the newly developed SiO nanopowder, made by thermal CVD using SiH₄ and O₂, consists of spherical particles with sizes less than 50 nm. It does not contain any Si nanocrystals but small molecular Si networks. Such molecular Si networks are easily thermally or optically decomposed. This makes the deposited oxide more free from Si nanocrystals, which usually degrade the insulating property of the oxide. The SiO₂ thin films formed by evaporation of the SiO nanopowder have demonstrated great potential for application to MOSFETs on plastic substrates and GaN epilayers.     

High-voltage normally off GaN MOSFETs on sapphire substrates

Gallium nitride self-aligned MOSFETs were fabricated using low-pressure chemical vapor-deposited silicon dioxide as the gate dielectric and polysilicon as the gate material. Silicon was implanted into an unintentionally doped GaN layer using the polysilicon gate to define the source and drain regions, with implant activation at 1100/spl deg/C for 5 min in nitrogen. The GaN MOSFETs have a low gate leakage current of less than 50 pA for circular devices with W/L=800/128 /spl mu/m. Devices are normally off with a threshold voltage of +2.7 V and a field-effect mobility of 45 cm/sup 2//Vs at room temperature. The minimum on-resistance measured is 1.9 m/spl Omega//spl middot/cm/sup 2/ with a gate voltage of 34 V (W/L=800/2 /spl mu/m). High-voltage lateral devices had a breakdown voltage of 700 V with gate-drain spacing of 9 /spl mu/m (80 V//spl mu/m), showing the feasibility of self-aligned GaN MOSFETs for high-voltage integrated circuits.     

RF operation of MOSFETs under integrated inductors

This paper presents an in-depth analysis of the operation of a CMOS single-chip three-dimensional inductor over a MOSFET structure at RF frequencies. Active circuitry is placed underneath the integrated inductors in order to take advantage of the vacant space. Measurements indicate that the operation of the MOSFET and of the inductor is affected in a predictable manner. The paper theoretically investigates the interaction between the two elements,analyzes the origin of all appearing effects and compares the theory with the experimental data from a typical CMOS process. Moreover, this study proposes possible applications and design guides and confirms the attractiveness of the inductor over MOSFET placement.