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1.
Design criteria of high-Voltage lateral RESURF JFETs on 4H-SiC 总被引:1,自引:0,他引:1
Kuang Sheng Shuntao Hu 《Electron Devices, IEEE Transactions on》2005,52(10):2300-2308
Integrated power electronics on SiC have great potential in future power electronics applications. In this paper, a novel vertical channel lateral junction field-effect transistor structure with reduced surface electric field effect is proposed for the first time on 4 H-SiC to address existing challenges in lateral power devices on SiC. Based on an experimentally proven channel design, the detailed design procedure of such a device has been investigated. Design criteria to optimize device forward blocking as well as conduction characteristics are studied. Parameter tolerance and design windows are discussed considering practical issues in device fabrication. Designs that will lead to an optimized tradeoff between device breakdown voltage and specific on-resistance are shown. With an 8-/spl mu/m-long drift region, a 1535-V breakdown voltage and 3.24 m/spl Omega//spl middot/cm/sup 2/ specific on-resistance can be achieved. This represents a figure-of-merit of 737 MW/cm/sup 2/, about 100 times higher than that of the best normally off lateral power devices reported in the literature. The proposed device can be an attractive candidate for power integrated circuit on SiC. 相似文献
2.
《Electron Device Letters, IEEE》1985,6(10):522-524
The first realization of a power vertical JFET operated in the bipolar mode (BJFET) with normally off behavior is reported. The structure combines minority carrier injection from the gate region in the on-state, and lateral pinch-off of the channel, due to the built-in voltage, in the off-state. The realized devices show high blocking voltages, up to 900 V, with zero gate bias, and have extremely low on-resistance. Fast switching speeds with forced gate turn-off times as low as 100 ns for devices of 600-V blocking voltages have been obtained. 相似文献
3.
A 2.5-kV static induction thyristor having new gate and shorted p-emitter structures 总被引:1,自引:0,他引:1
《Electron Devices, IEEE Transactions on》1986,33(1):91-97
An SI thyristor with new gate and shorted p-emitter structures (DTT-SI thyristor) is proposed to realize a high-voltage high current high-speed device having a low forward voltage drop. Investigations using fabricated 2.5-kV 100-A DTT-SI thyristors and numerical analyses show that the DTT-SI thyristor has a good trade-off between the forward voltage drop and switching characteristics when the channel width is 8-10 µm and the maximum impurity concentration is about 1 × 1017to 4 × 1017cm-3. The typical fabricated DTT-SI thyristor has a 2.5-kV forward blocking voltage with a 58-V reverse gate bias voltage, a 1.4-V forward voltage drop with a 100-A anode current, a 2- µs turn-on time, adi/dt capability higher than 4000 A/µs, and can interrupt a 900-A anode current with a 3.5-µs turn-off time and a 5.6 gate turn-off gain on application of a 100-V reverse gate bias voltage. 相似文献
4.
We describe the on-state performance of trench oxide-protected SiC UMOSFETs on 115-/spl mu/m-thick n-type 4H-SiC epilayers designed for blocking voltages up to 14 kV. An on-state current density of 137 A/cm/sup 2/ and specific on-resistance of 228 m/spl Omega//spl middot/cm/sup 2/ are achieved at a gate bias of 40 V (oxide field of 2.67 MV/cm). The effect of current spreading on the specific on-resistance for finite-dimension devices is investigated, and appropriate corrections are made. 相似文献
5.
Condition monitoring using temperature sensitive electrical parameters (TSEPs) is widely recognized as an enabler for health management of power modules. The on-state resistance/forward voltage of MOSFETs, IGBTs and diodes has already been identified as TSEPs by several researchers. However, for SiC MOSFETs, the temperature sensitivity of on-state voltage/resistance varies depending on the device and is generally not as high as in silicon devices. Recently the turn-on current switching rate has been identified as a TSEP in SiC MOSFETs, but its temperature sensitivity was shown to be significantly affected by the gate resistance. Hence, an important consideration regarding the use of TSEPs for health monitoring is how the gate driver can be used for improving the temperature sensitivity of determined electrical parameters and implementing more effective condition monitoring strategies. This paper characterizes the impact of the gate driver voltage on the temperature sensitivity of the on-state resistance and current switching rate of SiC power MOSFETs. It is shown that the temperature sensitivity of the switching rate in SiC MOSFETs increases if the devices are driven at lower gate voltages. It is also shown, that depending on the SiC MOSFET technology, reducing the gate drive voltage can increase the temperature sensitivity of the on-state resistance. Hence, using an intelligent gate driver with the capability of customizing occasional switching pulses for junction temperature sensing using TSEPs, it would be possible to implement condition monitoring more effectively for SiC power devices. 相似文献
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7.
Hefner A.R. Jr. Singh R. Jih-Sheg Lai Berning D.W. Bouche S. Chapuy C. 《Power Electronics, IEEE Transactions on》2001,16(2):273-280
The electrical performance of silicon carbide (SiC) power diodes is evaluated and compared to that of commercially available silicon (Si) diodes in the voltage range from 600 V through 5000 V. The comparisons include the on-state characteristics, the reverse recovery characteristics, and power converter efficiency and electromagnetic interference (EMI). It is shown that a newly developed 1500-V SiC merged PiN Schottky (MPS) diode has significant performance advantages over Si diodes optimized for various voltages in the range of 600 V through 1500 V. It is also shown that a newly developed 5000 V SiC PiN diode has significant performance advantages over Si diodes optimized for various voltages in the range of 2000 V through 5000 V. In a test case power converter, replacing the best 600 V Si diodes available with the 1500 V SiC MPS diode results in an increase of power supply efficiency from 82% to 88% for switching at 186 kHz, and a reduction in EMI emissions 相似文献
8.
Recessed-gate structure approach toward normally off high-Voltage AlGaN/GaN HEMT for power electronics applications 总被引:1,自引:0,他引:1
Saito W. Takada Y. Kuraguchi M. Tsuda K. Omura I. 《Electron Devices, IEEE Transactions on》2006,53(2):356-362
A recessed-gate structure has been studied with a view to realizing normally off operation of high-voltage AlGaN/GaN high-electron mobility transistors (HEMTs) for power electronics applications. The recessed-gate structure is very attractive for realizing normally off high-voltage AlGaN/GaN HEMTs because the gate threshold voltage can be controlled by the etching depth of the recess without significant increase in on-resistance characteristics. With this structure the threshold voltage can be increased with the reduction of two-dimensional electron gas (2DEG) density only under the gate electrode without reduction of 2DEG density in the other channel regions such as the channel between drain and gate. The threshold-voltage increase was experimentally demonstrated. The threshold voltage of fabricated recessed-gate device increased to -0.14 V while the threshold voltage without the recessed-gate structure was about -4 V. The specific on-resistance of the device was maintained as low as 4 m/spl Omega//spl middot/cm/sup 2/ and the breakdown voltage was 435 V. The on-resistance and the breakdown voltage tradeoff characteristics were the same as those of normally on devices. From the viewpoint of device design, the on-resistance for the normally off device was modeled using the relationship between the AlGaN layer thickness under the gate electrode and the 2DEG density. It is found that the MIS gate structure and the recess etching without the offset region between recess edge and gate electrode will further improve the on-resistance. The simulation results show the possibility of the on-resistance below 1 m/spl Omega//spl middot/cm/sup 2/ for normally off AlGaN/GaN HEMTs operating at several hundred volts with threshold voltage up to +1 V. 相似文献
9.
Design aspects of MOS-controlled thyristor elements: technology,simulation, and experimental results
Bauer F. Halder E. Hofmann K. Haddon H. Roggwiller P. Stockmeier T. Burgler J. Fichtner W. Muller S. Westermann M. Moret J.-M. Vuilleumier R. 《Electron Devices, IEEE Transactions on》1991,38(7):1605-1611
2.5-kV thyristor devices have been fabricated with integrated MOS controlled n+-emitter shorts and a bipolar turn-on gate using a p-channel DMOS technology. Square-cell geometries with pitch variations ranging from 15 to 30 μm were implemented in one- and two-dimensional arrays with up to 20000 units. The impact of the cell pitch on the turn-off performance and the on-state voltage was studied for arrays with constant cathode area as well as for single-cell structures. By realizing MOS components with submicrometer channel lengths, scaled single cells are shown to turn off with current densities of several kiloamperes per square centimeter at a gate bias of 5 V. In the case of multi-cell ensembles, turn-off performance is limited due to inhomogeneous current distribution. Critical process parameters as well as the device behavior were optimized through multidimensional numerical simulation 相似文献
10.
Evaluation of high-voltage 4H-SiC switching devices 总被引:1,自引:0,他引:1
In this paper, the on-state and switching performance of 4H-SiC UMOSFETs, TIGBTs, BJTs, SIThs, and GTOs with voltage ratings from 1 to 10 kV are simulated at different temperatures. Comparison with silicon devices highlights the advantages of SiC technology. SiC BJTs suffer the same problem as Si BJTs, namely the degradation of current gain with increased voltage rating which makes them unsuitable for applications above 4 kV. SiC MOSFETs dominate applications below 4 kV for their attractive conduction performance and advantages such as ease of use. Above 3 kV, SiC MOSFETs are not as attractive as SiC bipolar devices because of their high on-state voltages. In the voltage range simulated, SiC IGBTs, SIThs, and GTOs have comparable current handling ability. Considering the GTOs slow switching speed and drive complexities, IGBTs and SIThs are a better choice in the voltage range 4-10 kV. Calculations based on conduction loss and switching loss indicate that SiC SIThs are superior to IGBTs except in high-temperature and high-frequency applications where IGBTs are better. The need to provide a large gate current during turnoff and turn-off failure caused by gate debiasing, decreases the attractiveness of the SITh 相似文献
11.
High breakdown Voltage undoped AlGaN-GaN power HEMT on sapphire substrate and its demonstration for DC-DC converter application 总被引:1,自引:0,他引:1
Saito W. Kuraguchi M. Takada Y. Tsuda K. Omura I. Ogura T. 《Electron Devices, IEEE Transactions on》2004,51(11):1913-1917
Undoped AlGaN-GaN power high electron mobility transistors (HEMTs) on sapphire substrate with 470-V breakdown voltage were fabricated and demonstrated as a main switching device for a high-voltage dc-dc converter. The fabricated power HEMT realized a high breakdown voltage with a field plate structure and a low on-state resistance of 3.9 m/spl Omega//spl middot/cm/sup 2/, which is 10 /spl times/ lower than that of conventional Si MOSFETs. The dc-dc converter operation of a down chopper circuit was demonstrated using the fabricated device at the input voltage of 300 V. These results show the promising possibilities of the AlGaN-GaN power HEMTs on sapphire substrate for future switching power devices. 相似文献
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14.
Despite silicon carbide’s (SiC’s) high breakdown electric field, high thermal conductivity and wide bandgap, it faces certain reliability challenges when used to make conventional power device structures like power MOS-based devices, bipolar-mode diodes and thyristors, and Schottky contact-based devices operating at high temperatures. The performance and reliability issues unique to SiC discussed here include: (a) MOS channel conductance/gate dielectric reliability trade-off due to lower channel mobility as well as SiC–SiO2 barrier lowering due to interface traps; (b) reduction in breakdown field and increased leakage current due to material defects; and (c) increased leakage current in SiC Schottky devices at high temperatures.Although a natural oxide is considered a significant advantage for realizing power MOSFETs and IGBTs in SiC, devices to date have suffered from poor inversion channel mobility. Furthermore, the high interface state density presently found in the SiC–SiO2 system causes the barrier height between SiC and SiO2 to be reduced, resulting in increased carrier injection in the oxide. A survey of alternative dielectrics shows that most suffer from an even smaller conduction band offset at the SiC–dielectric interface than the corresponding Silicon–dielectric interface and have a lower breakdown field strength than SiO2. Thus, an attractive solution to reduce tunneling such as stacked dielectrics is required.In Schottky-based power devices, the reverse leakage currents are dominated by the Schottky barrier height, which is in the 0.7–1.2 eV range. Because the Schottky leakage current increases with temperature, the SiC Schottky devices have a reduction in performance at high temperature similar to that of Silcon PN junction-based devices, and they do not have the high temperature performance benefit associated with the wider bandgap of SiC.Defects in contemporary SiC wafers and epitaxial layers have also been shown to reduce critical breakdown electric field, result in higher leakage currents, and degrade the on-state performance of devices. These defects include micropipes, dislocations, grain boundaries and epitaxial defects. Optical observation of PN diodes undergoing on-state degradation shows a simultaneous formation of mobile and propagating crystal stacking faults. These faults nucleate at grain boundaries and permeate throughout the active area of the device, thus degrading device performance after extended operation. 相似文献
15.
A novel planar accumulation channel SiC MOSFET structure is reported in this paper. The problems of gate oxide rupture and poor channel conductance previously reported in SiC UMOSFETs are solved by using a buried P+ layer to shield the channel region. The fabricated 6H-SiC unterminated devices had a blocking voltage of 350 V with a specific on-resistance of 18 mΩ.cm2 at room temperature for a gate bias of only 5 V. This measured specific on-resistance is within 2.5× of the value calculated for the epitaxial drift region (1016 cm-3, 10 μm), which is capable of supporting 1500 V 相似文献
16.
Xiaobin Xin Junxia Shi Linlin Liu Edwards J. Swaminathan K. Pabisz M. Murphy M. Eastman L.F. Pophristic M. 《Electron Device Letters, IEEE》2009,30(10):1027-1029
This letter demonstrates a high-voltage, high-current, and low-leakage-current GaN/AlGaN power HEMT with HfO2 as the gate dielectric and passivation layer. The device is measured up to 600 V, and the maximum on-state drain current is higher than 5.5 A. Performance of small devices with HfO2 and Si3N4 dielectrics is compared. The electric strength of gate dielectrics is measured for both HfO2 and Si3N4. Devices with HfO2 show better uniformity and lower leakage current than Si3N4 passivated devices. The 5.5-A HfO2 devices demonstrate very low gate (41 nA/mm) and drain (430 nA/mm) leakage-current density and low on-resistance (6.2 Omegamiddotmm or 2.5 mOmegamiddotcm2). 相似文献
17.
《Electron Device Letters, IEEE》2009,30(8):793-795
18.
Characterization, Modeling, and Application of 10-kV SiC MOSFET 总被引:4,自引:0,他引:4
《Electron Devices, IEEE Transactions on》2008,55(8):1798-1806
19.
SiC devices: physics and numerical simulation 总被引:10,自引:0,他引:10
The important material parameters for 6H silicon carbide (6H-SiC) are extracted from the literature and implemented into the 2-D device simulation programs PISCES and BREAKDOWN and into the 1-D program OSSI Simulations of 6H-SiC p-n junctions show the possibility to operate corresponding devices at temperatures up to 1000 K thanks to their low reverse current densities. Comparison of a 6H-SiC 1200 V p-n--n+ diode with a corresponding silicon (Si) diode shows the higher switching performance of the 6H-SiC diode, while the forward power loss is somewhat higher than in Si due to the higher built-in voltage of the 6H-SiC p-n junction. This disadvantage can be avoided by a 6H-SiC Schottky diode. The on-resistances of Si, 3C-SiC, and 6H-SiC vertical power MOSFET's are compared by analytical calculations. At room temperature, such SiC MOSFET's can operate up to blocking capabilities of 5000 V with an on-resistance below 0.1 Ωcm2, while Si MOSFET's are limited to below 500 V. This is checked by calculating the characteristics of a 6H-SiC 1200 V MOSFET with PISCES. In the voltage region below 200 V, Si is superior due to its higher mobility and lower threshold voltage. Electric fields in the order of 4×106 V/cm occur in the gate oxide of the mentioned 6H-SiC MOSFET as well as in a field plate oxide used to passivate its planar junction. To investigate the high frequency performance of SiC devices, a heterobipolartransistor with a 6H-SiC emitter is considered. Base and collector are assumed to be out of 3C-SiC. Frequencies up to 10 GHz with a very high output power are obtained on the basis of analytical considerations 相似文献
20.
This letter describes a successfully developed enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET with a buried p/sup +/-n junction gate structure for low-voltage-operated mobile applications. The buried p/sup +/-GaAs gate structure effectively reduced on-resistance (R/sub on/) and suppressed drain-current frequency dispersion for the device with high positive threshold voltage, resulting in high-efficiency characteristics under low-voltage operation. The fabricated p/sup +/-gate HJFET exhibited a low R/sub on/ of 1.4 /spl Omega//spl middot/mm with a threshold voltage of +0.4 V. Negligible frequency dispersion characteristics were obtained through pulsed current-voltage measurements for the device. Under a single 2.7-V operation, a 19.8-mm gate width device exhibited a power added efficiency of 51.9% with 26.8-dBm output power and a -40.1-dBc adjacent channel power ratio using a 1.95-GHz wideband code-division multiple-access signal. 相似文献