Avalanche Mechanism in p +-n −-n + and p +-n Mid-Wavelength Infrared Hg1−x Cd x Te Diodes on Si Substrates

Hg_1−x Cd _x Te mid-wavelength infrared (MWIR) p ⁺-n ⁻-n ⁺ and p ⁺-n ⁻ avalanche photodiodes (APDs) with a cut-off of 4.9 μm at 80 K were fabricated on Si substrates. Diode characteristics, avalanche characteristics, and excess noise characteristics were measured on two devices. Temperature-dependent diode and avalanche characterization was performed. Maximum 3 × 10⁶ Ω cm² and 9 × 10⁵ Ω cm² zero-bias resistance times active area (R ₀ A) products were measured for the p ⁺-n ⁻-n and p ⁺-n devices at 77 K, respectively. Multiplication gains of 1250 and 410 were measured at −10 and −4 V for the p ⁺-n ⁻-n ⁺ and p ⁺-n APDs at 77 K, respectively, in the front-illumination mode with the help of a laser with an incident wavelength of 632 nm. The gains reduce to 200 and 50 at 120 K, respectively. The excess noise factor in all APDs was measured to be in the range of 1 to 1.2.     

Arsenic Diffusion Study in HgCdTe for Low <Emphasis Type="Italic">p</Emphasis>-Type Doping in Auger-Suppressed Photodiodes

Controllable p-type doping at low concentrations is desired for multilayer HgCdTe samples in a P ⁺/π/N ⁺ structure due to the promise of suppressing Auger processes, and ultimately reduced dark current for infrared detectors operating at a given temperature. In this study, a series of arsenic implantation and annealing experiments have been conducted to study diffusion at low Hg partial pressure with the goal of achieving effective control over dopant profiles at low concentration. Arsenic dopant profiles were measured by secondary ion mass spectroscopy (SIMS), where diffusion coefficients were extracted with values ranging between 3.35 × 10⁻¹⁶ cm² s⁻¹ and 6 × 10⁻¹⁴ cm² s⁻¹. Arsenic diffusion coefficients were found to vary strongly with Hg partial pressure and HgCdTe alloy composition, corresponding to variations in Hg vacancy concentration.     

Formation of Low-Resistance Ohmic Contact by Damage-Proof Selective-Area Growth of Single-Crystal <Emphasis Type="Italic">n</Emphasis><Superscript>+</Superscript>-GaN Using Plasma-Assisted Molecular Beam Epitaxy

To achieve very low ohmic contact resistance, an n ⁺-GaN layer was selectively deposited using plasma-assisted molecular beam epitaxy (PAMBE). During this process polycrystalline GaN grew on the patterned SiO₂ region, which was subsequently removed by a heated KOH solution, resulting in damage to the n ⁺-GaN surface. To prevent this damage, an additional SiO₂ layer was selectively deposited only on the n ⁺-GaN region. To optimize the fabrication process the KOH etching time and n ⁺-GaN layer thickness were adjusted. This damage-proof scheme resulted in a specific contact resistance of 4.6 × 10⁻⁷ Ω cm². In comparison, the resistance with the KOH etching damage was 4.9 × 10⁻⁶ Ω cm² to 24 × 10⁻⁶ Ω cm². The KOH etching produced a large number of pits (4.1 × 10⁸ cm⁻²) and degraded the current transport. X-ray photoelectron spectroscopy (XPS) and secondary-ion mass spectrometry (SIMS) analysis indicated that KOH etching was very effective in removing the oxide from the GaN surface and that the O-H bonding at the GaN surface was likely responsible for the degraded contact performance. The optimum n ⁺-GaN thickness was found to be 54 nm.     

MWIR DLPH HgCdTe photodiode performance dependence on substrate material

Mid wavelength infrared p-on-n double layer planar heterostructure (DLPH) photodiodes have been fabricated in HgCdTe double layers grown in situ by liquid phase epitaxy (LPE), on CdZnTe and for the first time on CdTe/sapphire (PACE-1). Characterization of these devices shed light on the nature of the material limits on device performance for devices performing near theoretical limits. LPE double layers on CdZnTe and on PACE-1 substrates were grown in a horizontal slider furnace. All the photodiodes are p-on-n heterostructures with indium as the n-type dopant and arsenic the p-type dopant. Incorporation of arsenic is via implantation followed by an annealing step that was the same for all the devices fabricated. The devices are passivated with MBE CdTe. Photodiodes have been characterized as a function of temperature. R₀A_imp values obtained between 300 and 78K are comparable for the two substrates and are approximately a factor of five below theoretical values calculated from measured material parameters. The data, for the PACE-1 substrate, indicates diffusion limited performance down to 110K. Area dependence gives further indications as to the origin of diffusion currents. Comparable R₀A_imp for various diode sizes indicates a p-side origin. R₀A and optical characteristics for the photodiodes grown on lattice-matched CdZnTe substrates and lattice mismatched PACE-1 are comparable. Howover, differences were observed in the noise characteristics of the photodiodes. Noise was measured on 50 × 50 μm devices held under a 100 mV reverse bias. At 110K, noise spectrum for devices from the two substrates is in the low 10⁻¹⁵ A/Hz^1/2 range. This value reflects the Johnson noise of the room temperature 10¹⁰ Ω feedback resistor in the current amplifier that limits the minimum measurable noise. Noise at 1 Hz, −100 mV and 120K for the 4.95 μm PACE-1 devices is in the 1–2 × 10⁻¹⁴ A/Hz^1/2, a factor of 5–10 lower than previously grown typical PACE-1 n⁺-on-p layers. Noise at 120K for the 4.60 μm PACE-1 and LPE on CdZnTe was again below the measurement technique limit. Greatest distinction in the noise characteristics for the different substrates was observed at 163K. No excess low frequency noise was observed for devices fabricated on layers grown by LPE on lattice-matched CdZnTe substrates. Photodiode noise measured at 1Hz, −100 mV and 163K in the 4.60 μm PACE-1 layer is in the 1–2×10⁻¹³ A/Hz^1/2, again a factor of 5–10 lower than previously grown PACE-1 n⁺-on-p layers. More variation in noise (4×10⁻¹³−2×10⁻¹² A/Hz^1/2) was observed for devices in the 4.95 μm PACE-1 layer. DLPH devices fabricated in HgCdTe layers grown by LPE on lattice-matched CdZnTe and on lattice-mismatched PACE-1 have comparable R₀A and quantum efficiency values. The distinguishing feature is that the noise is greater for devices fabricated in the layer grown on lattice mismatched substrates, suggesting dislocations inherent in lattice mismatched material affects excess low frequency noise but not zero bias impedance.     

HgCdTe MWIR Back-Illuminated Electron-Initiated Avalanche Photodiode Arrays

This paper reports data for back-illuminated planar n-on-p HgCdTe electron-initiated avalanche photodiode (e-APD) 4 × 4 arrays with large unit cells (250 × 250 μm²). The arrays were fabricated from p-type HgCdTe films grown by liquid phase epitaxy (LPE) on CdZnTe substrates. The arrays were bump-mounted to fanout boards and characterized in the back-illuminated mode. Gain increased exponentially with reverse bias voltage, and the gain versus bias curves were quite uniform from element to element. The maximum gain measured was 648 at −11.7 V for a cutoff wavelength of 4.06 μm at 160 K. For the same reverse-bias voltage, the gains measured at 160 K for elements with two different cutoff wavelengths (3.54 μm and 4.06 μm at 160 K) show an exponential increase with increasing cutoff wavelength, in agreement with Beck’s empirical model for gain versus voltage and cutoff wavelength in HgCdTe e-APDs. Spot scan data show that both the V = 0 response and the gain at V = −5.0 V are spatially uniform over the large junction area. To the best of our knowledge, these are the first spot scan data for avalanche gain ever reported for HgCdTe e-APDs. Capacitance versus voltage data are consistent with an ideal abrupt junction having a donor concentration equal to the indium concentration in the LPE film. U.S. Workshop on the Physics and Chemistry of II-VI Materials Newport Beach, California October 10–12, 2006.     

High-Performance MWIR/LWIR Dual-Band 640 × 480 HgCdTe/Si FPAs

HgCdTe grown on large-area Si substrates allows for larger array formats and potentially reduced focal-plane array (FPA) cost compared with smaller, more expensive CdZnTe substrates. The goal of this work is to evaluate the use of HgCdTe/Si for mid-wavelength/long-wavelength infrared (MWIR/LWIR) dual-band FPAs. A series of MWIR/LWIR dual-band HgCdTe triple-layer n-P-n heterojunction (TLHJ) device structures were grown by molecular-beam epitaxy (MBE) on 100-mm (211)Si substrates. The wafers showed low macrodefect density (<300 cm⁻²) and was processed into 20-μm-unit-cell 640 × 480 detector arrays which were mated to dual-band readout integrated circuits (ROICs) to produce FPAs. The measured 80-K cutoff wavelengths were 5.5 μm for MWIR and 9.4 μm for LWIR, respectively. The FPAs exhibited high pixel operabilities in each band, with noise equivalent differential temperature (NEDT) operabilities of 99.98% for the MWIR band and 99.6% for the LWIR band demonstrated at 84 K.     

Investigation of 1/<Emphasis Type="Italic">f</Emphasis> Noise Mechanisms in Midwave Infrared HgCdTe Gated Photodiodes

In this work, gated midwave infrared (MWIR) Hg_1–x Cd _x Te photodiodes are used to investigate the physical origin of 1/f noise generation. Gated photodiodes were fabricated on liquid-phase epitaxy p-type HgCdTe MWIR material with a vacancy-doped concentration of 1.6 × 10¹⁶ cm⁻³ and x = 0.31. CdTe was thermally deposited and used as both a passivant and a mask for the plasma-based type conversion, and ZnS was used as an insulator. Fabricated devices show a R ₀ A of 1–5 × 10⁴ Ωcm² with zero gate bias. Application of 2 V to the gate improves the R ₀ A by more than two orders of magnitude to 6.0 × 10⁶ Ωcm², which corresponds to the p-type surface being at transition between depletion and weak inversion. Trap-assisted tunneling (TAT) current was observed at negative gate biases and reverse junction biases. For gate biases greater than 3 V, a field-induced junction breakdown was observed. An I _n = α I ^β f ^−0.5 trend was observed above 200 pA reverse bias dark current, with α = 3.5 × 10⁻⁵ and β = 0.82, which corresponds to the TAT dominated region. Below 200 pA, junction generation-recombination (GR) current starts to dominate and this previously mentioned trend is no longer observed. Junction GR current was not seen to be correlated with 1/f noise in these photodiodes.     

Heavily Aluminum-Doped Epitaxial Layers for Ohmic Contact Formation to <Emphasis Type="Italic">p</Emphasis>-Type 4H-SiC Produced by Low-Temperature Homoepitaxial Growth

In this work, heavily aluminum (Al)-doped layers for ohmic contact formation to p-type SiC were produced by utilizing the high efficiency of Al incorporation during the epitaxial growth at low temperature, previously demonstrated by the authors’ group. The low-temperature halo-carbon epitaxial growth technique with in situ trimethylaluminum (TMA) doping was used. Nearly featureless epilayer morphology with an Al atomic concentration exceeding 3 × 10²⁰ cm⁻³ was obtained after growth at 1300°C with a growth rate of 1.5 μm/h. Nickel transfer length method (TLM) contacts with a thin adhesion layer of titanium (Ti) were formed. Even prior to contact annealing, the as-deposited metal contacts were almost completely ohmic, with a specific contact resistance of 2 × 10⁻² Ω cm². The specific contact resistance was reduced to 6 × 10⁻⁵ Ω cm² by employing a conventional rapid thermal anneal (RTA) at 750°C. Resistivity of the epitaxial layers better than 0.01 Ω cm was measured for an Al atomic concentration of 2.7 × 10²⁰ cm⁻³.     

Spatial Localization of Carrier Traps in 4H-SiC MOSFET Devices Using Thermally Stimulated Current

Carrier traps in 4H-SiC metal–oxide–semiconductor (MOS) capacitor and transistor devices were studied using the thermally stimulated current (TSC) method. TSC spectra from p-type MOS capacitors and n-channel MOS field-effect transistors (MOSFETs) indicated the presence of oxide traps with peak emission around 55 K. An additional peak near 80 K was observed due to acceptor activation and hole traps near the interface. The physical location of the traps in the devices was deduced using a localized electric field approach. The density of hole traps contributing to the 80-K peak was separated from the acceptor trap density using a gamma-ray irradiation method. As a result, hole trap density of N _t,hole = 2.08 × 10¹⁵ cm⁻³ at 2 MV/cm gate field and N _t,hole = 2.5 × 10¹⁶ cm⁻³ at 4.5 MV/cm gate field was extracted from the 80-K TSC spectra. Measurements of the source-body n ⁺–p junction suggested the presence of implantation damage in the space-charge region, as well as defect states near the n ⁺ SiC substrate.     

An Initial Investigation of Nitrogen Doping of Wide-Bandgap HgCdTe During Molecular-Beam Epitaxy Using Ar/N Plasmas

An initial investigation of the use of atomic nitrogen for controlled p-type doping of wide-bandgap Hg_0.3Cd_0.7Te (x = 0.7) is reported. Mixtures of argon and nitrogen, ranging in nitrogen concentration from 0.1% to 100%, have been utilized to demonstrate well-controlled nitrogen incorporation in the 10¹⁶ cm⁻³ to 10²⁰ cm⁻³ range using total gas flow rates of 0.3 sccm to 4.0 sccm and radiofrequency (RF) powers of 100 W to 400 W. Nitrogen doping exhibits several desirable attributes including abrupt turn-on and turn-off and minimal sensitivity to variations in growth temperature and HgCdTe composition, with no negative effects on HgCdTe dislocation density and morphology. Preliminary electrical measurements indicate primarily n-type behavior in the 10¹⁴ cm⁻³ to 10¹⁵ cm⁻³ range in as-grown x = 0.7 HgCdTe and CdTe films doped with nitrogen at 10¹⁸ cm⁻³ to 10²⁰ cm⁻³ concentrations, while ZnTe films have exhibited p-type electrical activity with hole concentrations approaching 10²⁰ cm⁻³.     

Status of LWIR HgCdTe-on-Silicon FPA Technology

The use of silicon as an alternative substrate to bulk CdZnTe for epitaxial growth of HgCdTe for infrared detector applications is attractive because of potential cost savings as a result of the large available sizes and the relatively low cost of silicon substrates. However, the potential benefits of silicon as a substrate have been difficult to realize because of the technical challenges of growing low-defect-density HgCdTe on silicon where the lattice mismatch is ∼19%. This is especially true for long-wavelength infrared (LWIR) HgCdTe detectors where the performance can be limited by the high (∼5 × 10⁶ cm⁻²) dislocation density typically found in HgCdTe grown on silicon. The current status of LWIR (9 μm to 11 μm at 78 K) HgCdTe on silicon focal-plane arrays (FPAs) is reviewed. Recent progress is covered including improvements in noise equivalent differential temperature (NEDT) and array operability. NEDT of <25 mK and NEDT operability >99% are highlighted for 640 × 480 pixel, 20-μm-pitch FPAs.     

Electrical Conductivity of Parylene F at High Temperature

The electrical conductivity of both as-deposited and annealed poly(α,α,α′,α′-tetrafluoro-p-xylylene) (PA-F) films has been investigated up to 400°C. The static conductivity (σ _DC) values of PA-F measured between 200°C and 340°C appear to be ∼2.5 orders of magnitude lower for annealed films than for as-deposited ones. This change is attributed to a strong increase in the crystallinity of the material occurring above 340°C. After annealing at 400°C in N₂, the σ _DC value measured at 300°C, for instance, decreased from 3.8 × 10⁻¹² Ω⁻¹ cm⁻¹ to 7.5 × 10⁻¹⁵ Ω⁻¹ cm⁻¹. Physical interpretations of such an improvement are offered.     

MBE-grown HgCdTe multi-layer heterojunction structures for high speed low-noise 1.3–1.6 µm avalanche photodetectors

HgCdTe is an attractive material for room-temperature avalanche photodetectors (APDs) operated at 1.3–1.6 μm wavelengths for fiber optical communication applications because of its bandgap tunability and the resonant enhancement of hole impact ionization for CdTe fractions near 0.73. The HgCdTe based separate absorption and multiplication avalanche photodetector is designed and fabricated for backside illumination through a CdZnTe substrate. The multi-layer device structure is comprised of seven layers including 1). n ⁺ contact 2). n ⁻ diffusion buffer 3). n ⁻ absorber 4). n charge sheet 5). n ⁻ avalanche gain 6). p to form junction, and 7).p ⁺ contact. Several wafers were processed into 45 μm × 45 μm and 100 (μm × 100 μm devices. The mean value of avalanche voltage is 63.7 V measured at room temperature. At 1 GHz, the device shows a gain of about 7 for a gain-bandwidth product of 7 GHz. This first demonstration of an all molecular beam epitaxially grown HgCdTe multi-layer heterojunction structure on CdZnTe substrates represents a significant advance toward the goal of producing reliable room temperature HgCdTe high speed, low noise avalanche photodetectors.     

Progress in the Molecular Beam Epitaxy of HgCdTe on Large-Area Si and CdZnTe Substrates

This paper presents the progress in the molecular beam epitaxy (MBE) growth of HgCdTe on large-area Si and CdZnTe substrates at Raytheon Vision Systems. We report a very high-quality HgCdTe growth, for the first time, on an 8 cm × 8 cm CdZnTe substrate. This paper also describes the excellent HgCdTe growth repeatability on multiple 7 cm × 7 cm CdZnTe substrates. In order to study the percentage wafer area yield and its consistency from run to run, small lots of dual-band long-wave infrared/long-wave infrared triple-layer heterojunction (TLHJ) layers on 5 cm × 5 cm CdZnTe substrates and single-color double-layer heterojunction (DLHJ) layers on 6-inch Si substrates were grown and tested for cutoff wavelength uniformity and micro- and macrovoid defect density and uniformity. The results show that the entire lot of 12 DLHJ-HgCdTe layers on 6-inch Si wafers meet the testing criterion of cutoff wavelength within the range 4.76 ± 0.1 μm at 130 K and micro- and macrovoid defect density of ≤50 cm⁻² and 5 cm⁻², respectively. Likewise, five out of six dual-band TLHJ-HgCdTe layers on 5 cm × 5 cm CdZnTe substrates meet the testing criterion of cutoff wavelength within the range 6.3 ± 0.1 μm at 300 K and micro- and macrovoid defect density of ≤2000 cm⁻² and 500 cm⁻², respectively, on the entire wafer area. Overall we have found that scaling our HgCdTe MBE process to a 10-inch MBE system has provided significant benefits in terms of both wafer uniformity and quality.     

Investigation of Thermal Stability and Degradation Mechanisms in Ni-Based Ohmic Contacts to <Emphasis Type="Italic">n</Emphasis>-Type SiC for High-Temperature Gas Sensors

We investigated the thermal stability of Pt/TaSi _x /Ni/SiC ohmic contacts, which have been implemented in SiC-based gas sensors developed for applications in diesel engines and power plants. The contacts remained ohmic on lightly doped n-type (~1 × 10¹⁶ cm⁻³) 4H-SiC for over 1000 h in air at 300°C. Although a gradual increase in specific contact resistance from 3.4 × 10⁻⁴ Ω cm² to 2.80 × 10⁻³ Ω cm² was observed, the values appeared to stabilize after ~800 h of heating in air at 300°C. The contacts heated at 500°C and 600°C, however, showed larger increases in specific contact resistance followed by nonohmic behavior after 240 h and 36 h, respectively. Concentration profiles from Auger electron spectroscopy and electron energy-loss spectroscopy show that loss of ohmic behavior occurs when the entire tantalum silicide layer has oxidized.     

Amplification of electromagnetic waves at odd harmonics of the cyclotron resonance of heavy holes with negative effective masses in semiconducting diamond

It is shown theoretically that the absorption coefficient for circularly polarized electromagnetic waves at the cyclotron resonance of heavy holes with negative effective masses in diamond in parallel electric and magnetic fields oriented along the [001] crystal axis takes negative values at the frequency of any of the n+1 harmonics (n=0,4,8, etc.) for the right (electron) polarization and at the frequency of any of the n−1 harmonics (n=4,8,12, etc.) for the left (hole) polarization. In an electric field E≈10⁴ V/cm and magnetic fields H=30–80 kOe, at lattice temperatures of 77–100 K, and for a hole concentration of (3–5)×10¹⁵ cm⁻³, the absorption coefficient for an electromagnetic wave at the third harmonic ω ₃=3ω=2.5×10¹² s⁻¹ (wavelength λ₃=0.92 mm) is as high as η ₃=(−7)–(−30) cm⁻¹. Fiz. Tekh. Poluprovodn. 32, 504–508 (April 1998)     

Advanced thermoelectrically cooled midwave HgCdTe focal plane arrays

Midwave HgCdTe diodes and arrays for a 200–230 K operation using thermoelectric (TE) coolers have been fabricated and characterized. The quality of ZnCdTe substrates for the epitaxial growth of HgCdTe layers plays a significant role in determining the performance of the devices. The best diode RoAs at 200 K and 230 K are 1.1×10³ Ω·cm² and 1.6×10² Ω·cm², respectively. Fitting the diode RoAs to analytical equations, the hole lifetime between 230 K and 300 K is found to be on the order of 50 μsec. Arrays in a format of 320×256 have been produced on the HgCdTe layers and imaging pictures have been obtained.     

Ohmic contact formation on inductively coupled plasma etched 4H-silicon carbide

We report on the investigation of ohmic contact formation using sputtered titanium-tungsten contacts on an inductively coupled plasma (ICP) etch-damaged 4H-SiC surface. Transfer length method (TLM) measurements were performed to characterize how ICP-etch damage affects the performance of ohmic contacts to silicon carbide. In order to recover etch damage, high-temperature oxidation (1250°C for 1 h) was evaluated for one of the samples. Some of the etch damage was recovered, but it did not fully recover the etch damage for the sample etched with medium platen power (60 W). From our TLM measurements, the specific contact resistance (ρ _C of sputtered titanium tungsten on highly doped n⁺-type 4H-SiC epilayers with a doping of 1.1×10¹⁹ cm⁻³ for the unetched reference sample, 30-W etched, and 60-W etched with and without sacrificial oxidation was as low as 3.8×10⁻⁵ Ωcm², 3.3×10⁻⁵ Ωcm², 2.3×10⁻⁴ Ωcm², and 1.3×10⁻³ Ωcm², respectively. We found that the low-power (30 W) ICP-etching process did not affect the formation of ohmic contacts, and we did not observe any difference between the unetched and the 30-W etched sample from our TLM measurements, having the same value of the ρ _C. However, medium-platen-power (60 W) ICP etching showed significant influence on the ohmic contact formation. We found that the specific contact resistance is highly related to the surface roughness and quality of the metals, and the lower, specific contact resistance is due to smoother and denser ohmic contacts.     

Characterization of HgCdTe MWIR Back-Illuminated Electron-Initiated Avalanche Photodiodes

This article reports new characterization data for large-area (250 μm ×  250 μm) back-illuminated planar n-on-p HgCdTe electron-initiated avalanche photodiodes (e-APDs). These e-APDs were fabricated in p-type HgCdTe films grown by liquid-phase epitaxy (LPE) on CdZnTe substrates. We previously reported that these arrays exhibit gain that increases exponentially with reverse bias voltage, with gain-versus-bias curves that are quite uniform from element to element, and with a maximum gain of 648 at −11.7 V at 160 K for a cutoff wavelength of 4.06 μm. Here we report new data on these planar e-APDs. Data from a third LPE film with a longer cutoff wavelength (4.29 μm at 160 K) supports the exponential dependence of gain on cutoff wavelength, for the same bias voltage, that we reported for the first two films (with cutoffs of 3.54 μm and 4.06 μm at 160 K), in agreement with Beck’s empirical model for gain versus voltage and cutoff wavelength in HgCdTe e-APDs. Our lowest gain-normalized current density at 80 K and zero field-of-view is 0.3 μA/cm² at −10.0 V for a cutoff of 4.23 μm at 80 K. We report data for the temperature dependence of gain over 80 K to 200 K. We report, for the first time, the dependence of measured gain on junction area for widely spaced circular diodes with radii of 20 μm to 175 μm. We interpret the variation of measured gain with junction area in terms of an edge-enhanced electric field, and fit the data with a two-gain model having a lower interior gain and a higher edge gain. We report data for the excess noise factor F(M) near unity for gains up to 150 at 196 K. We describe the abrupt breakdown phenomenon seen in most of our devices at high reverse bias.     

New low contact resistance triple capping layer enabling very high Gm InAIAs/lnGaAs HEMTs

It has been demonstrated that a highly doped (Si:3 × 10¹⁹ cm^-3) triple capping layer consisting of n⁺−In_0.53Ga_0.47As, n⁺−In_0.52Al_0.48As, and n⁺-In_0.53Ga_0.47As can remarkably reduce the parasitic source resistance in InP-based high electron mobility transistors (HEMTs). The analysis of the source resistance revealed that the resistance element at the n⁺−In_0.53Ga_0.47As/un−In_0.52Al_0.48As/un-In_0.53Ga_0.47As channel heterointerfaces was as large as 70% of the source resis-tance when nonalloyed ohmic electrodes were used. The highly doped triple capping layer reduces the resistance contribution of vertical conduction between the capping layer and 2DEG channel. A low source resistance of 0.57 Ωmm and a low contact resistivity of 3 × 10⁻⁵ Ωcm² were obtained for the HEMTs with the highly doped triple capping layer, which were 60% lower and one order of magnitude smaller than those for the HEMTs with a conventional single capping layer doped 5 × 10¹⁸ cm⁻³, respectively. These values were also 70 and 30% lower than those for the HEMTs with a highly doped (3 × 10¹⁹ cm⁻³) single capping layer, respectively. The low source resistance brings high peak extrinsic transconduc-tance of 1 S/mm for a device with 0.4 μm long gate, which was 42% higher than the previously reported HEMTs with the same gate length.