Polymer-ceramic nanocomposite capacitors for system-on-package (SOP) applications

This work focuses on optimizing the dispersion of nanosized ceramic particles for achieving higher dielectric constant, thereby higher capacitance density in polymer/ceramic nanocomposites. It has been observed that high solids loading leads to entrapment of porosity in the microstructure which lowers the effective dielectric constant of the films. The amount of solvent in the suspension and the speed at which spin coating was performed were found to impact the dielectric constant of high filler content nanocomposites. The interplay between the rheological properties of the suspension and processing parameters such as solvent content and coating speeds and its impact on the dielectric properties of the film are discussed. Porosity of thin film composites was measured for the first time to study the impact of these processing parameters. Powders of different particle sizes were mixed to obtain bimodal particle size distribution in order to increase the packing density of the composite. Packing density was improved by modifying the dispersion methodology. A nanocomposite with dielectric constant as high as 135 was obtained for the first time in the low-cost printed wiring board compatible epoxy system. A capacitance densities of /spl sim/35 nF/cm/sup 2/ on a nominal 3.5 micrometer films was achieved on PWB substrates with high yield. The manufacturability of these formulated nanocomposites and their applications as decoupling capacitors have been tested using a large area (300 mm /spl times/ 300 mm) system-on-package (SOP) chip-to-chip communication test vehicle.     

组件上系统和系统级芯片的封装和生产

随着集成电路(IC)的发明,系统集成技术进一步加速了半导体的发展。 现在在一个芯片或者说一个单元上,需要集成不同的功能,例如:MPU、图像处理、存储器(SRAM,闪存,DRAM)、逻辑推理器、DSP、信号混合器、射频(RF)和外围功能。为了能     

Embedded TiNxOy thin-film resistors in a build-up CSP for 10 Gbps optical transmitter and receiver modules

Integral passive components provide efficient circuit miniaturization while maintaining high performance and reducing assembly costs. The development of practical integral passive components, however, requires advances in the areas of materials, low-cost processes, and structural design. We have developed new TiNxOy thin-film resistors, as well as a termination resistor-embedded CSP, and a process for fabricating integral passive components. Our TiNxOy films exhibit a sheet resistivity in the range of 30-5k /spl Omega//square. To keep costs low, we have made the fabrication process compatible with that for MCM-D/L. Resistors as small as 25 /spl mu/m square have been successfully produced with this process. The chip scale package (CSP) with embedded resistors has been designed for 10 Gbps optical transmitter and receiver modules. A fabricated version shows excellent return loss for its termination resistor, less than -20 dB in the frequency range of 50 MHz-14 GHz, and its resistors showed high reliability in constant voltage stress tests, with less than 5% change in resistance at 800 mW/mm/sup 2/ over 1000 hours.     

简化医疗器械中使用的小型电阻器、电容器及磁性元件的选型和提高其可靠性

多年来,医疗器械变得越来越小,小型可植入器械在植入过程中让患者感觉更舒适,对身体的损伤也更小。为满足对用于可植入医疗器械的小型混合元件的需求,人们不断改进微控制器(MCU)——或专用集成电路(ASIC)——和功率系统的混合元件布局与封装技术。本文讨论了无源元件的选型过程,目的是减小医疗器械中的混合元件和电路板空间。     

电阻涂料的施工应用技术

电阻涂料的施工应用技术是电阻器生产厂家经常遇到的问题。介绍电阻涂料的涂装工艺、涂装环境、质量检查、涂膜弊病的防止、涂料组分对施工性的影响和防火安全技术 ,为国产电阻器涂料的应用提供方便。     

Silicide resistors for integrated circuits

Thin-film resistors are useful in monolithic integrated circuits whenever high sheet resistance (ρs> 1 kΩ/sq) or radiation hardness are required. Silicide resistive films (MoSi2, CrSi2, and Si-Cr) deposited by dc sputtering have been shown to be compatible with monolithic circuit production end require no protective overlayer. Si-Cr films 200-300 Å thick have ρs, and temperature coefficients of resistance (TCR) ranging from about 1 kΩ/sq and +150 ppm/°C (CrSi2) to 20 kΩ/sq and -1400 ppm/°C (17 at % Cr). MoSi2is best suited for resistor applications requiring 100-200Ω/sq. MoSi2films are about 700 Å thick at 200 Ω/sq, compared to < 100 Å for 200-Ω/sq Ni-Cr, and their TCR is -125 ppm/°C. Typical stability for unprotected silicide resistors in TO-5 packages at 200°C, no load, is < ±3 percent during the first 200 h and < ± 0.5 percent during the next 2000 h. The films are stable during short term exposure to high temperatures as encountered during monolithic or hybrid circuit ceramic package sealing.     

Design for SOP AMOLED display panel

A novel full color SOP（system on panel） AMOLED display based on the MIUC polycrystalline silicon TFT technique, and a new control circuit for the panel, which can deal with both VGA and DVI input signals have been developed. To realize gray-scale a sub-frame technique has been designed and im- plemented by FPGA device, in which an 120 module has been inserted. Through actual circuit, the whole design has been proven and the advantages of the SOP AMOLED display panel have been confirmed.     

High value implanted resistors for microcircuits

Boron ion implantation has been used to fabricate high sheet resistance p-type junction resistors in silicon substrates. Thermally grown SiO2and conventional photolithography were employed to define the resistor geometries. Ion doses in the range 0.5 × 10¹³to 10 × 10¹³ions/cm²with energies ranging from 30 to 55 keV followed by anneal at 950°C were used. The temperature coefficient of resistance (TCR), voltage coefficient of resistance (VCR), junction Characteristics, and noise level of these resistors have been studied for sheet resistances ρx, from 0.8 to 11 kΩ/square. Over this range of sheet resistances the TCR increases smoothly from approximately 800 to 4000 PPM/°C with the lower TCR corresponding to the lower sheet resistance. For 3 kΩ square implanted resistors, the variation of resistance with temperature closely matches that found for a standard boron base and resistor (B&R) diffusion having a sheet resistance of 140 Ω/square. The junction leakage and the noise level of the implanted resistors can be made comparable to that obtained for diffused resistors. The implanted resistor exhibits a positive VCR, which increases with increasing sheet resistance as a result of depletion-layer pinch-off action from the substrate. Details of the implant conditions and process control are discussed. Experimental results demonstrating the compatibility of the resistor implantation process with microcircuits using low current, high β diffused bipolar transistors are presented.     

Platinum intermetallic resistors for GaAs-based circuits

A simple technique for making intermetallic resistors of sheet resistance around 25 ?/? is described. The resistors were formed by reacting a 300 ? film of platinum with underlying GaAs to completion. PtGa, PtGa2 and PtAs2 phases were identified in the temperature range of 450°C to 550°C investigated. The temperature coefficient of resistivity was of the order of +9.2×10?4°C?1 at 25°C and the resistors appeared to be stable up to current densities of 105 A/cm2.     

Polycrystalline silicon resistors for integrated circuits

The suitability of thin films of doped polycrystalline silicon on SiO₂ substrates for the production of high value resistors for monolithic integrated circuits is considered. Resistors fabricated from this material posses the advantages of high sheet resistivity and dielectric isolation while still preserving an all silicon technology compatible with conventional production techniques.Relevant structural and electrical properties of doped polycrystalline films produced by both vacuum evaporation onto hot substrates with gas-doping and by diffusion-annealing of amorphous films have been investigated. Sheet resistivities and TCR values measured on 2500 Å polycrystalline films have proved superior to those encountered with conventional diffused resistors. Typically films with sheet resistivities of 1 kΩ/□ had TCR's of ?1000 ppm/°C while conventional diffused resistors are generally made from material of 200 Ω/□ and +2000 ppm/°C TCR. Etched resistor line widths of 0·25 mil. have been obtained in the polycrystalline material employing conventional photolithographic techniques. The temperature stability and linearity of doped polycrystalline resistors have been investigated.     

Termination materials for thin film resistors

The resistance of a thin film resistor can be considered as consisting of three parts: 1) the resistance of the resistor material, 2) the resistance of the termination material, and 3) the interfacial resistance. The aging of the interfacial resistance can dominate the aging of low valued resistors, especially under corrosive conditions. The interfacial resistance using a distributed parameter analysis is treated and a figure of merit which can be used to describe the aging of the interface is defined. Also, a sensitive method of measuring this quantity is introduced and a sampling of data on several different termination material systems is presented. The best results were obtained with Ti-Pd-Au. The conclusions drawn from the figure of merit are corroborated by adhesion and thermocompression bond strength studies.     

Compensated resistors for high-frequency electrometer applications

The behaviour of electrometer feedback resistors at high frequencies is discussed. It is shown theoretically that the performance of a shielded resistor of this type can be greatly improved by the addition of capacitive coupling between the electrometer output and the centre of the resistor. The improvement has been verified in practice.     

Future microprocessors and off-chip SOP interconnect

Limits to chip power dissipation and power density and limits on the benefits of hyperpipelining in microprocessors threaten to stop the exponential performance growth in microprocessor performance that we have grown accustomed to. Multicore processors can continue to provide historical performance growth on most modern consumer and business applications. However, power efficiency of these cores must also be improved to stay within reasonable power budgets. This can be achieved by simplifying the processor core architecture, and reversing the trend toward ever more-complex and less power-efficient cores. To maintain overall performance growth with stunted per-core and per-thread performance, growth rates will require an even more rapid increase in the number of cores per die. Growing performance by increasing the number of cores on a die at this rate, however, puts unprecedented requirements on the corresponding growth of off-chip bandwidth. We argue that contrary to the international roadmap for semiconductors (ITRS) predictions, off-chip signaling frequencies are likely to exceed the frequencies of processor cores in the not too distant future, consistent with the system-on-package (SOP) concept in the first paper of this issue. If this approach is followed, a 1-TFlops multiprocessor die with 1 TB/s of off-chip bandwidth is feasible at reasonable cost before the end of the decade.     

SOP8分层探究及解决

塑料封装作为一种非气密性封装,分层一直是制约其可靠性的一个关键因素,也是可靠性需解决的难点之一。选择确立较为稳定、成熟的引线框架塑料封装制程,研发一款抗分层表现良好的SOP8,搭配优选过的环氧模塑料(EMC),使塑料封装的可靠性大大提升,也促进了EMC在塑料封装中的应用和表现。     

Organic electro-optic polymer materials and organic-based hybrid electro-optic modulators

High performance electro-optic modulator, as the key device of integrated ultra-wideband optical systems, have become the focus of research. Meanwhile, the organic-based hybrid electro-optic modulators, which make full use of the advantages of organic electro-optic (OEO) materials (e.g. high electro-optic coefficient, fast response speed, high bandwidth, easy processing/integration and low cost) have attracted considerable attention. In this paper, we introduce a series of high-performance OEO materials that exhibit good properties in electro-optic activity and thermal stability. In addition, the recent progress of organic-based hybrid electro-optic devices is reviewed, including photonic crystal-organic hybrid (PCOH), silicon-organic hybrid (SOH) and plasmonic-organic hybrid (POH) modulators. A high-performance integrated optical platform based on OEO materials is a promising solution for growing high speeds and low power consumption in compact sizes.     

Gigaohm-range polycrystalline silicon resistors for microelectronic applications

The objective of this work was to investigate the conduction properties of very high resistance devices formed from undoped chemical-vapor-deposited polycrystalline silicon. Test structures having resistances as high as 600 GΩ at 5 V were fabricated, of a size suitable for microelectronic device applications. Detailed measurements of current-voltage characteristics in the dark and with photoexcitation, the effect of resistor length, and the temperature dependence of resistance, were made. The data is interpreted in terms of a model based on avalanche breakdown of the reverse-biased n⁺-i junction, with the current limited by the remaining quasi-neutral i-region. Theoretical current-voltage curves and the dependence of effective resistance on device length are calculated with the model, showing all the qualitative aspects of the data. Incorporation of gigaohm-range load resistors into a 16K CMOS static RAM cell is described. The work shows the dominant effects of grain boundaries in controlling current transport in undoped polysilicon, providing high-diffusivity paths for impurity diffusion, and apparently determining the reverse breakdown behavior of the junctions present.     

Correction terms for contacts to diffused resistors

Correction terms obtained from measurements on typical planar resistors are given and compared to values expected from two different mechanisms: inhomogeneous current flow around the contact or contact resistance between metal and diffusion layer. Good agreement between contact resistance model and experiment is shown.