Single DDCC Biquads with High Input Impedance and Minimum Number of Passive Elements

Two new configurations for the design of biquad filters with high input impedance are presented. The first configuration can synthesize low-pass and high-pass filter functions according to the passive components used. The second one can synthesize a band-pass filter function. The proposed configurations employ only one differential difference current conveyor (DDCC) as active elements and minimum number of passive elements, namely two resistors and two capacitors. Another filter topology based on DDCC is presented that allows modifying the quality factor without changing its natural frequency. All the filters enjoy low sensitivities. SPICE simulation results are given to confirm the validity of the analysis and to point out the high performance of the filters.Muhammed A. Ibrahim was born in Erbil, Iraq in 1969. He obtained his B.Sc. and M.Sc. degrees from Salahaddin University, Erbil, Iraq and Istanbul Technical University, Istanbul, Turkey in 1990 and 1999, respectively, all in electronics and communication engineering. Between 1992 and 1996 he worked as Research Assistant at Salahaddin University where he was later appointed as Assistant Lecturer in 1999. Since 2000 he has been studying for his Ph.D. degree in Electronics and Communication Engineering Program at Istanbul Technical University. His main research interests are CMOS circuit design, current-mode circuits and analog signal processing applications. He has more than 20 international journal and conference papers in scientific review.H. Hakan Kuntman received his B.Sc., M.Sc. and Ph.D. degrees from Istanbul Technical University in 1974, 1977 and 1982, respectively. In 1974 he joined the Electronics and Communication Engineering Department of Istanbul Technical University. Since 1993 he is a professor of electronics in the same department. His research interest include design of electronic circuits, modeling of electron devices and electronic systems, active filters, design of analog IC topologies. Dr. Kuntman has authored many publications on modelling and simulation of electron devices and electronic circuits for computer-aided design, analog VLSI design and active circuit design. He is the author or the coauthor of 76 journal papers published or accepted for publishing in international journals, 91 conference papers presented or accepted for presentation in international conferences, 99 turkish conference papers presented in national conferences and 10 books related to the above mentioned areas. Furthermore he advised and completed the work of 7 Ph.D. students and 31 M.Sc. students. Currently, he acts as the head of the Electronics and Communication Engineering Department in Istanbul Technical University. Dr. Kuntman is a member of the Chamber of Turkish Electrical Engineers (EMO).Oguzhan Cicekoglu received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999. He served also as part time lecturer at various institutions. He was with the Biomedical Engineering Institute of the Bogazici University between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of the same University.His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. Oguzhan Cicekoglu is the author or co-author of 62 journal papers and about 90 international or local conference papers published or accepted for publishing in journals or conference proceedings.He served as the committee member in various scientific conferences and as reviewer in numerous journals including Analog Integrated Circuits and Signal Processing, IEEE CAS-I, IEEE CAS-II, International Journal of Electronics, Microelectronics Journal, Solid State Electronics and IEE Proceedings Pt.G.Oguzhan Cicekoglu is a member of the IEEE.     

CCII-Based Grounded to Floating Immittance Converter and a Floating Inductance Simulator

A new circuit employing second-generation current conveyors (CCIIs), and unmatched resistors for converting a grounded immittance to the corresponding floating immittance with either positive or negative adjustable multiplier, is presented. Moreover, the proposed circuit can also realize a synthetic floating inductance employing a grounded capacitor depending on the passive element selection. Simulation results using 0.35 μ m TSMC CMOS technology parameters are given. Erkan Yuce was born in 1969 in Nigde, Turkey. He received the B.Sc. from Middle East Technical University and M.Sc. degrees from Pamukkale University in 1994 and 1998 respectively. He is a Ph.D. student at Bogazici University all in Electrical and Electronics Engineering. He is currently Research Assistant at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, synthetic inductors, and current-mode circuits. He is the author or co-author of about 10 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu was born in 1963 in Istanbul, Turkey. He received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999, and as part time lecturer at various institutions. He was with Biomedical Engineering Institute between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. He is the author or co-author of about 150 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu is a member of the IEEE. Shahram Minaei received his B.Sc. degree in Electrical and Electronics Engineering from Iran University of Science and Technology in 1993. He received his M.Sc. and Ph.D. degrees in Electronics and Communication Engineering from Istanbul Technical University in 1997 and 2001, respectively. He is currently an Associate Professor at the Electronics and Communication Engineering Department of Dogus University in Istanbul, Turkey. He has more than 50 journal or conference papers in scientific review. He served as reviewer for a number of international journals and conferences. His current field of research concerns current-mode circuits and analog signal processing. Shahram Minaei is a member of the IEEE.     

A New Low Latency Parallel FIR Filter Scheme

A new array type parallel scheme for an FIR digital filter is presented in this paper. The proposed scheme is based on the structure of the carry-save array multiplier where each cell implements the computation of an FIR filter at the bit-level. This structure leads to latency independent of the number of the filter taps. The proposed scheme is pipelined at the bit-level, is systolic at the cell-level and requires less hardware than other schemes based on discrete multipliers.Paraskevas Kalivas received his Diploma and Ph.D. degree in electrical and computer engineering from the National Technical University of Athens, Greece, in 1990 and 2000 respectively.His research interests include computer arithmetic and efficient realization of arithmetic circuits and digital filters.Vassilis Vassilakis received his Diploma in electrical and computer engineering from NationalTechnical University of Athens, Greece, in 1997. He isworking toward the Ph.D. degree in electrical engineering at National Technical University of Athens.His research interests include efficient circuit implemenation of DSP algorithms and java processor architectures.Chris Meletis received his Diploma in electrical and computer engineering from National Technical University of Athens in 1997. Currently, he is working toward the Ph.D. degree in electrical engineering at National Technical University of Athens.His research interests include multirate filter banks, digital filter design and their efficient realization.Kiamal Z. Pekmestzi received his Diploma in electrical engineering from the National Technical University of Athens, Greece, in 1975. From 1975 to 1981, he was a research fellow in the Electronics Department of the Nuclear Research Center Demokritos. He received his Ph.D. in electrical engineering from the University of Patras, Greece, in 1981.From 1983 to 1985, he was a professor at the Higher School of Electronics in Athens. Since 1985, he has been with the National Technical University of Athens, where he is currently a professor. His research interests include computer arithmetic, VLSI digital filters and VLSI design automation.     

The Effects of Non-Idealities and Current Limitations on the Simulated Inductances Employing Current Conveyors

Active devices such as current conveyors play an essential role on the performance of simulated inductances. The effects of second-generation current conveyor (CCII) non-idealities on the proposed and on the previously published inductances are investigated, in which lossless inductances are realized. CCIIs like all active devices have terminal current limitations that can not be exceeded. Thus, the values of the applied input current sources for the proposed and previously published inductances depending on the passive elements values and applied signal frequency impose restrictions on the input current of the inductor. Erkan Yuce was born in 1969 in Nigde, Turkey. He received the B.Sc. degree from Middle East Technical University and M.Sc. degree from Pamukkale University in 1994 and 1998 respectively, all in Electrical and Electronics Engineering. He is currently Research Assistant and a Ph.D. student at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, synthetic inductors, voltage-mode current-mode circuits. He is the author or co-author of about 4 papers published in scientific journals or conference proceedings Oguzhan Cicekogluwas born in 1963 in Istanbul, Turkey. He received the B.Sc. and M.Sc. degrees from Bogazici University and the Ph.D. degree from Istanbul Technical University all in Electrical and Electronics Engineering in 1985, 1988 and 1996 respectively. He served as lecturer at the School of Advanced Vocational Studies Electronics Prog. of Bogazici University where he held various administrative positions between 1993 and 1999, and as part time lecturer at various institutions. He was with Biomedical Engineering Institute between 1999 and 2001. He is currently Associate Professor at the Electrical and Electronics Engineering Department of Bogazici University. His current research interests include analog circuits, active filters, analog signal processing applications and current-mode circuits. He is the author or co-author of about 150 papers published in scientific journals or conference proceedings. Oguzhan Cicekoglu is a member of the IEEE.     

Fault Detection in Switched Current Circuits Using Built-in Transient Current Sensors

Switched current (SI) circuits use analogue memory cells as building blocks. In these cells, like in most analogue circuits, there are hard-to-detect faults with conventional test methods. A test approach based on a built-in dynamic current sensor (BIDCS), whose detection method weights the highest frequency components of the dynamic supply current of the circuit under test, makes possible the detection of these faults, taking into account the changes in the slope of the dynamic supply current induced by the fault. A study of the influence of these faults in neighbouring cells helps to minimize the number of BICS needed in SI circuits as is shown in two algorithmic analogue-to-digital converters. Yolanda Lechuga received a degree in Industrial Engineering from the University of Cantabria (Spain) in April 2000. Since then, she has been collaborating with the Microelectronics Engineering Group at the University of Cantabria, in the Electronics Technology, Systems and Automation Engineering Department. Since October 2000 she has been a post-graduate student, to be appointed as lecturer at this university, where she is working in her Ph.D. She is interested in supply current test methods, fault simulation, BIST and design for test of mixed signal integrated circuits. Román Mozuelos received a degree in Physics with electronics from the University of Cantabria, Spain. From 1991 to 1995 he was working on the development of quartz crystal oscillators. Currently, he is a Ph.D. student and an assistant teacher at the University of Cantabria in the Department of Electronics Technology. His interests include mixed-signal design and test, fault simulation, and supply current monitoring. Miguel A. Allende received his graduate degree in 1985 and Ph.D. degree in 1994, both from the University of Cantabria, Santander, Spain. In 1996, he became an Assistant Professor of Electronics Technology at the same Institution, where he is a member of the Microelectronics Engineering Group at the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. His research interests include design of VLSI circuits for industrial applications, test and DfT in digital VLSI communication circuits, and power supply current test of mixed, analogue and digital circuits. Mar Martínez received her graduate degree and Ph.D. from the University of Cantabria (Spain) in 1986 and 1990. She has been Assistant Professor of Electronic Technology at the University of Cantabria (Spain) since 1991. At present, she is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. She has participated in several EU and Spanish National Research Projects. Her main research interest is mixed, analogue and digital circuit testing, using techniques based on supply current monitoring. She is also interested in test and design for test in digital VLSI circuits. Salvador Bracho obtained his graduate degree and Ph.D. from the University of Seville (Spain) in 1967 and 1970. He was appointed Professor of Electronic Technology at the University of Cantabria (Spain) in 1973, where, at present, he is a member of the Electronics Technology, Systems and Automation Engineering Department in the Industrial and Telecommunication Engineering School. He has participated, as leader of the Microelectronics Engineering Group at the University of Cantabria, in more than twenty EU and Spanish National Research Projects. His primary research interest is in the area of test and design for test, such as full scan, partial scan or self-test techniques in digital VLSI communication circuits. He is also interested in mixed-signal, analogue and digital test, using methods based on power supply current monitoring. Another research interest is the design of analogue and digital VLSI circuits for industrial applications. Prof. Bracho is a member of the Institute of Electrical and Electronic Engineers.     

Systematic Synthesis of Active-RC Circuit Building-Blocks

In this paper, we show how some basic building blocks for active-RC circuit design, such as amplifiers, impedance converters and simulated inductance circuits, may be synthesised in a systematic way by expansion of their port admittance matrices. The circuit topology emerges from the synthesis procedure, allowing all possible implementations to be identified and explored. Nullors representing ideal op-amps and transistors are represented within the nodal admittance matrix of a synthesised circuit by linked infinity parameters. In nodal admittance matrices describing ideal circuits synthesised, the replacement of linked infinity parameters by finite parameters provides a seamless transition to non-ideal analysis and practical circuit design.Now with the Singaporean Armed Services.David Haigh was born in Middlesex, England, in 1946. He obtained the B.Sc. degree in Electrical Engineering from Bristol University in 1968 and in 1976 he received the Ph.D. degree from the University of London. From 1968 until 1972 he worked under Dr. Wolja Saraga first at the GEC Hirst Research Centre and then, from 1972, at Imperial College London where he worked on microelectronic high precision filters. In 1987 he joined the staff of the Electronic and Electrical Engineering Department of University College London, where he studied analogue integrated circuit design with particularly interest in high frequency circuits. In 2003 he re-joined the Department of Electrical and Electronic Engineering at Imperial College London, where his interests broadened to include general approaches for analogue circuit synthesis. He is editor-in-chief (Europe) of the Analog Integrated Circuits and Signal Processing Journal.Fang Qun Tan graduated with a B.Eng. degree from Imperial College London in 2002. He then studied for the M.Sc. in Analogue and Digital integrated Circuit Design at Imperial College and graduated with distinction in 2003. His M.Sc. project was on the subject of systematic synthesis methods for analogue circuits. At present Fang Qun is with the Singapore Armed Services.Christos Papavassiliou was born in Athens, Greece, in 1960. He received the B.Sc. degree in physics from the Massachusetts Institute of Technology and the Ph.D. degree in Applied Physics from Yale University. He has worked on monolithic microwave integrated circuit (MMIC) design and measurements at FORTH in Crete, Greece, and has been involved in several European and regional projects on GaAs MMIC technology. In 1996 he joined Imperial College London, where he is currently a Senior Lecturer. He currently works on SiGe technology development as well as instrumentation and substrate noise coupling in mixed mode integrated circuit design. He has 30 publications.     

FGMOS Current Mirror: Behaviour and Bandwidth Enhancement

This paper presents a high performance, resistively compensated low voltage current mirror using floating gate MOSFETs (FGMOS). The compensation technique desensitizes the output current and input compliance voltage with respect to the process generated variations in the threshold voltages of the mirroring transistors. Theoretical and simulation results exhibit an appreciable increase in bandwidth of the current mirror for this compensation technique. The operation of these circuits has been verified using PSpice simulations for 0.5 μ m CMOS technology at a supply voltage of ±0.75 V. A part of this paper has appeared in IEEE APCCAS 2002 and NSM 2003. S. Sharma was born on 6th July 1967 at village Bhagta, district Udhampur, J and K (India). He received MSc Physics (Electronics) degree from University of Jammu in 1991 and was awarded University Gold Medal. After qualifying NET (CSIR), he joined as Lecturer in 1995 in the department of Physics and Electronics of the same University. He is presently a Senior Lecturer and pursuing for Ph.D. degree in the area of Analog Integrated Circuits. He has eight papers published in National/International Conferences/Journals. He is a life member of IETE (India). S.S. Rajput was born on July 1, 1957, at village Bashir Pur, District Bijnor UP India. He received his B. E. in Electronics and Communication Engineering and M. E. in Solid State Electronics Engineering from University of Roorkee, Roorkee, India (Now IIT, Roorkee) in 1978 and 1981 respectively and was awarded University gold medal in 1981. He earned his Ph.D. degree from Indian Institute of Technology, Delhi in 2002 and his topic of research was “Low voltage current mode analog circuit structures and their applications”. He joined National Physical Laboratory, New Delhi, India as Scientist B in 1983, where he is presently serving as Scientist EII. He has worked for the design, development, testing and fabrication of an instrument meant for space exploration under the ISRO-NPL joint program for development of scientific instruments for the Indian Satellite SROSS-C and SROSS-C2 missions. His research interests include low voltage analog VLSI, instrument design for space applications, Digital Signal Processing, Fault tolerant design, and fault detection. He has chaired the many sessions in Indian as well as International conferences. He is Fellow member of IETE (India). He has been awarded best paper award for IETE Journal of Education for the year 2002. He has delivered many invited talks on Low Voltage Analog VLSI. Few tutorials have been presented in International Conferences on his Research Work. He has more than 30 publications in national and international journals. L.K. Mangotra was born on 14th April 1944 at Jammu, India. He received M.Sc. (Physics) from University of Kashmir in 1968 and Ph.D. (High Energy Physics) from University of Jammu in 1974. He worked as Assistant Director in Forensic Laboratory of J and K Govt. from 1974–78. He joined Physics Department, University of Jammu as Lecturer in 1978 and became Professor in 1988. He has 131 publications in International Journals and 41 papers in proceedings of International/National Conferences. He has number of visits to foreign Universities in connection with research and has been awarded various Fellowships. He is a member of various Professional/Academic/Administrative bodies. Presently, Prof. Mangotra is an Advisor to University of Jammu for Modernization of University Infrastructure and Principal Investigator for Jammu University and Coordinator of All India Universities in the International Collaborative research project “ALICE” in High Energy Physics sponsored by Department of Atomic Energy and Department of Science and Technology, Govt. of India. S.S. Jamuar was born on 27th November 1949. He received his BSc. Engineering Degree in Electronics and Communication from Bihar Institute of Technology, Sindri in 1967, M. Tech and Ph.D. in Electrical Engineering from Indian Institute of Technology, Kanpur, India in 1970 and 1977 respectively. He worked as Research Assistant, Senior Research Fellow and Senior Research Assistant from 1969 to 1975 at IIT Kanpur. During 1975–76, he was with Hindustan Aeronautics Ltd., Lucknow. Subsequently he joined the Lasers and Spectroscopy Group in the Physics Department at IIT Kanpur, where he was involved in the design of various types of Laser Systems. He joined department of Electrical Engineering of IIT Delhi in 1977, where he became Professor in 1991. He is presently Professor in the department of Electrical and Electronic Engineering Department, Faculty of Engineering, University Putra Malaysia, Malaysia. His area of research interest includes Electronic Circuit Design, Instrumentation and Communication systems. He is recipient of Meghnad Saha Memorial Award 1976 from IETE, Distinguished Alumni Award from BIT Sindri in 1999. Dr. Jamuar is senior member of IEEE and Fellow member of IETE (India). He is presently the Chair for CASS Chapter of IEEE Malaysia Section.     

Mean Waiting Time Analysis in Finite Storage Queues for Wireless Cellular Networks

In this paper priority is assigned to the handover calls over new call attempts and blocked handover calls are placed in a finite storage queue. Total handover forced termination probability is evaluated and a suitable function for the mean service time at each position in the queue is theoretically estimated. Quality of service is obtained by introducing a threshold in the maximum waiting time of a handover call in the queue. In case the handover call mean service time at each queue position is found to be greater than this threshold, this call will be blocked. Simulation results show that this scheme provides satisfactory results for both types of calls. Spiros Louvros was born in Corfu Island, Hellas in 1971. He received his Bachelor in Physics from the University of Crete, Hellas and his Master of Science in telecommunications from the University of Cranfield, U.K. with a graduate scholarship from the Alexandros Onassis Institution. In 2004 he received his PhD from the University of Patras, Hellas, in mobile communications. He has worked for Siemens as a microwave engineer, for Vodafon-Hellas as a switching engineer and for Cosmote S.A. as section manager in the Operations, Maintenance & Optimization Department. His current occupation is in the Telecommunication Systems & Networks Department, Technical University of Messologi, Hellas, as an Assistant Professor. He holds several papers in international journals and conferences and he has participated in several research projects regarding mobile communications. His area of interest is in mobile networks, telecommunication traffic engineering, wireless ATM and optical communications and is documented by over 30 papers in international literature and conference proceedings. He is member of FITCE and Hellenic Physics Union. Gerasimos Pylarinos – Stamatelatos was born in Kefalonia, Greece in 1966. He receieved the B.E. in Electrical and Computer Systems Engineering from Monash University, Melbourne, Australia in 1992 and the B.E. in Electrical and Computer Systems Engineering from the University of Patras, Greece in 1994. He received the M.Sc. in Data Communications Systems from Brunel University, United Kingdom. He is currently pursuing the PhD degree at the University of Patras Greece. He has worked at Philips Radio Communication Systems, Melbourne, Australia developing hardware for mobile radio communication systems for 2 years. He subsequently worked as project manager in the Research and Development department at Intracom Radio Communication Systems, Greece for 7 years. He is now manager of the Biomedical Engineering department of Kefalonia Hospital, Greece. His research interests lie in the areas of 3G and 4G wireless communications. S. Kotsopoulos was born in Argos-Argolidos (Greece) in the year 1952. He received his B.Sc. in Physics in the year 1975 from the University of Thessaloniki, and in the year 1984 got his Diploma in Electrical and Computer Engineering from the University of Patras. He did his postgraduate studies in the University of Bradford in United Kingdom. And he is an M.Phil and Ph.D. holder since 1978 and 1985 correspondingly. Currently he is member of the academic staff of the Department of Electrical and Computer Engineering of the University of Patras and holds the position of Associate Professor. Since 2004, is the Director of the Wireless Telecommunications Laboratory and develops his professional life teaching and doing research in the scientific area of Telecommunications, with interest in mobile communications, interference, satellite communications, telematics applications, communication services and antennae design. Moreover he is the (co)author of the book titled “mobile telephony”. The research activity is documented by more than 160 publications in scientific journals and proceedings of International Conferences. Associate Professor Kotsopoulos has been the leader of several international and many national research projects. Finally, he is member of the Greek Physicists Society and member of the Technical Chamber of Greece.     

Handover Optimization in Wireless Microcellular ATM Networks

Microcellular solutions in wireless ATM networks increase the network traffic control as a result of frequent handover requests. The blocking probability or the forced termination probability presents a quality of service criterion for evaluation of certain handover techniques. This paper presents a handover protocol that can avoid cell loss and guarantee cell sequence, and a two layer wireless call admission control is studied, using Markov state diagrams, in order to optimize the performance of wireless ATM networks. Spiros Louvros was born in Corfu island, Hellas in 1971. He received his Bachelor in Physics from the University of Crete, Hellas and his Master in telecommunications from the University of Cranfield, U.K. with a scholarship for graduate studies from the Alexandros Onassis Institution. In 2004 he received his PhD from the University of Patras, Hellas, in mobile communications. He has worked for Siemens as a microwave engineer and for Vodafon-Hellas as a switching engineer. His current occupation is section manager in the Maintenance Department in Cosmote S.A. He has participated in several research projects regarding mobile communications. His area of interest is in mobile networks, telecommunication traffic engineering, wireless ATM and optical communications and is documented by over 30 papers in international literature and conference proceedings. He is member of FITCE and Hellenic Physics Union and he holds a position of external researcher in the Wireless telecommunications Lab of the Electrical Engineering department, University of Patras. Dimitrios Karaboulas was born in Patras-Hellas. He received his diploma in Electrical & Computer Engineering from the University of Patras, Hellas in 1994. He has been working, since 1994, as an external consultant-specialist in several telecommunication companies in Hellas and he currently holds a company firm for ISO certification, supervision and technical solutions. He is currently a PhD candidate in the Wireless Laboratory of Electrical & Computer Engineering Department, University of Patras, Hellas and his research interests are in the area of Wireless ATM networking, mobile communications and telecommunication network planning. He has participated in several research projects regarding mobile communications and enterprise telecommunication solutions and is documented by over 50 papers in conference proceedings. He is also an active member of the Technical Chamber of Greece. S. Kotsopoulos was born in Argos-Argolidos (Greece) in the year 1952. He received his B.Sc. in Physics in the year 1975 from the University of Thessaloniki, and in the year 1984 got his Diploma in Electrical and Computer Engineering from the University of Patras. He did his postgraduate studies in the University of Bradford in United Kingdom. And he is an M.Phil and Ph.D. holder since 1978 and 1985 correspondingly. Currently he is member of the academic staff of the Department of Electrical and Computer Engineering of the University of Patras and holds the position of Associate Professor. Since 2004, is the Director of the Wireless Telecommunications Laboratory and develops his professional life teaching and doing research in the scientific area of Telecommunications, with interest in mobile communications, interference, satellite communications, telematics applications, communication services and antennae design. Moreover he is the (co)author of the book titled “mobile telephony”. The research activity is documented by more than 160 publications in scientific journals and proceedings of International Conferences. Associate Professor Kotsopoulos has been the leader of several international and many national research projects. Finally, he is member of the Greek Physicists Society and member of the Technical Chamber of Greece.     

New high-Q discrete-time LC bandpass filter design with center frequency broadband tuning

Discrete-time switched-capacitor filters have been in wide-spread used for a few years, for the realization of stable, accurate and high quality filters. This paper describes the design of a new 8-path pseudo switched-capacitor LC bandpass filter and its command circuit made up by a ring voltage controlled oscillator (VCO) with ‘XOR’ gates. The proposed architecture presents the possibility of tuning over a frequency broadband allowing to sweep different channels with a high quality factor. This circuit is intended to replace the surface acoustic wave (SAW) filters in broadband wireless applications. Experimental results carried out on a prototype show quality factors up to 200, and a tunable center frequency range of 300 MHz [250–550 MHz]. Ahmed El Oualkadi received the PhD. degree in electronics from the University of Poitiers, France, in 2004. Since 2001, he has been with the LAII-ESIP laboratory, Electronics & Electrostatics Research Unit, University of Poitiers, France. In 2004, he was an assistant lecturer of Electronics Engineering at the University Institute of Technology, Angoulême, France. During this period he worked on various projects which concern the nonlinear analysis & design of switched-capacitor filters for radio-communication systems. Currently, he is a senior research engineer at the Université Catholique de Louvain, Microelectronics Laboratory, Louvain-la-Neuve, Belgium. His main interest of research is the design of low power high temperature circuits and systems for low cost wireless communications especially for ZigBee applications. Jean-Marie Paillot received a Ph.D in Electronics form the University of Limoges, in 1990. His thesis on the design of non-linear analog circuits and the study of the noise spectral of integrated oscillators was prepared at the Institute of Research for Optical Communications and Microwaves, Limoges. After graduation, he joined the Electronics Laboratory of PHILIPS Microwave, at Limeil, as R&D engineer in charge of the design of analogical and numerical microwave monolithic integrated circuits. Since October 1992, J.M. Paillot is at the University Institute of Technology, Angoulême, where he currently is Professor of Electronics Engineering. In charge of several contracts with industry, and author of papers published in scientific journals, J.M. Paillot is at present interested in phase noise reduction techniques for microwave oscillators, as well as in the research and development of switched capacitor filters in RF domain. Rachid Allam received the Dipl. Eng. Degree from the Université des Sciences et Technologies dran, Algeria, in 1980. He joined the Centre Hyperfréquences et Semiconducteurs, University of Lille 1,Villeneuve d’Ascq, France, in 1980. He received the Docteur-Ingénieur degree in 1984 from the University of Lille 1. In 1988, he joined the Institut d’Electronique et de Microélectronique du Nord and received the Habilitation à Diriger les Recherches en Sciences Physiques degree, in 1996. Currently, he is Assistant Professor at the University of Poitiers (IUT Angoulême), France. In 1997, he joined the Equipe Electronique et Electrostatique at the Laboratoire d’Automatique et d’Informatique Industrielle (LAII - UPRESS - EA 1219). Research work concerns microwaves devices and circuits, FET nonlinear modeling, microwaves mixers, non linear CAD, millimeter wave MMIC’s and non linear noise analysis.     

Optimizing the QoS of Ultra High and High Speed Moving Terminals in Satellite-Aided Cellular Networks

This paper presents a new channel assignment technique based on a three-layer cellular architecture which optimizes the QoS of Ultra High-Speed (UHSMT) and High-Speed Moving Terminals (HSMT) in a congested urban area. The lower layer of the proposed architecture is based on a microcellular solution, for absorbing the traffic loads of Low Speed Moving Terminals (LSMT). The second layer is based on a macro-cell umbrella solution, for absorbing the traffic load of the HSMT. The higher layer is based on satellite cell and absorbs the traffic load of UHSMT. The results show that assigning the optimum number of channels in every layer, the QoS of UHSMT and HSMT are optimized, having a small bad effect on the QoS of LSMT. Konstantinos Ioannou was born in Patras, Greece, in 1975. He received the Diploma and the PhD in Electrical and Computer Engineering in 1998 and 2004, respectively, from the Polytechnic School of the University of Patras. His dissertation, elaborated at the Wireless Telecommunications Laboratory of the Department of Electrical and Computer Engineers, dealt with Channel Assignment Techniques, Handover Procedures, Traffic Modeling and Call Admission Policies in 2G, 3G Mobile Systems and Security Mobile Systems. During his Postgraduate Studies, he participated in many European and National Research Projects. Since the October of 1999, he is working as an Assistant Professor (under contract) at the Technological Educational Institute of Messolongi – Departments of Applied Informatics in Management & Economy Electronics and Informatics. During the last 2 years, he belongs also to the Technical Consultants Team of the Ministry of Public Order, regarding the C4I Olympic Security System, involved, among others, with TETRA and AVL subsystems. His scientific interests include Mobile and Satellite Communications, Wired and Wireless Networks, Handover and Channel Assignment Techniques and Communication Services. A lot of publications in scientific journals and conference proceedings – 27 and 40, respectively – document his research activity. Konstantinos Ioannou is a member of the Technical Chamber of Greece (TEE). Ioannis Panoutsopoulos was born in Patras, Greece, in 1974. He received the Diploma and the PhD in Electrical and Computer Engineering in 1997 and 2003, respectively, from the Polytechnic School of the University of Patras. His dissertation, elaborated at the Wireless Telecommunications Laboratory of the Department of Electrical and Computer Engineers, dealt with Handover Procedures, Traffic modeling and Call Admission Policies in 2G and 3G Mobile Systems. During his Postgraduate Studies, he participated in many European and National Research Projects. Since the October of 2003, he is working as an Assistant Professor (under contract) at the Technological Educational Institute of Athens - Departments of Electronics and Informatics – teaching Antenna Theory, Electromagnetic Waves Propagation – Transmission Lines and Mobile Telecommunications Systems. During the last 2 years, he belongs also to the Technical Consultants Team of the Ministry of Public Order, regarding the C4I Olympic Security System, involved, among others, with TETRA and AVL subsystems. His scientific interests include Mobile and Satellite Communications, Wired and Wireless Networks, Handover and Channel Assignment Techniques and Communication Services. A lot of publications in scientific journals and conference proceedings – 12 and 18, respectively – document his research activity. Ioannis Panoutsopoulos is a member of the Technical Chamber of Greece (TEE). S. Kotsopoulos was born in Argos-Argolidos (Greece) in the year 1952. He received his B.Sc. in Physics in the year 1975 from the University of Thessaloniki, and in the year 1984 got his Diploma in Electrical and Computer Engineering from the University of Patras. He is an M.Phil and Ph.D. holder since 1978 and 1985 correspondingly. He did his postgraduate studies in the University of Bradford in United Kingdom. Currently he is member of the academic staff of the Department of Electrical and Computer Engineering of the University of Patras and holds the position of Professor. He develops his professional life teaching and doing research at the Laboratory of Wireless Telecommunications (Univ. Of Patras), with interest in mobile communications, interference, satellite communications, telematics, communication services and antennae design. Moreover he is the (co)author of the book titled “mobile telephony”. The research activity is documented by more than 160 publications in scientific journals and proceedings of conferences. Ast. Professor Kotsopoulos has been the leader of several international and many national research projects. Finally, he is member of the Greek Physicists Society and member of the Technical Chamber of Greece.     

A Radio Resource Allocation Scheme for Fixed Broadband Wireless Access Systems with Avoidance of Major Interferers

An improved radio resource allocation scheme with avoidance of major interferers is proposed and analyzed for the downlink of Fixed Broadband Wireless Access (FBWA) systems with full frequency reuse. The scheme is based on Enhanced Staggered Resource Allocation (ESRA) and permits the enhancement of the throughput per sector. Simulation results show a maximum downlink throughput per sector in excess of 44% and an increase of 10% with respect to ESRA is achieved, with Base Station (BS) selection procedure, while meeting a 15 dB signal-to-interference ratio (SIR). Nicholas Vaiopoulos was bornin Lamia in 1977. He received his Physics degree and his M.Sc.degree in electronics and radio-communications from the University of Athens, Greecein 2000and 2003, respectively. Currently, he is working towards his Ph.D. degree on the resource allocation techniques with reference to wireless systems at the Department of informatics and Telecommunications at the same University. His research interests include broadband communications systems, scheduling algorithms and power control techniques for wireless systems. Alexander Vavoulaswas born in Athens in 1976. He received his B.Sc. degree in physics and the M.Sc. degree in electronics and radio-communications in 2000 and 2002 respectively,both from the University of Athens, Greece. Currently he is working toward the Ph.D. degree on the radio resource allocation techniques with the same University. His research interest is focused on broadband wireless access and interference management. He is a student nmember of the IEEE. Dimitris Varoutas holds BSc. degree in Physics, M.Sc. in electronics and radio-communi cations and Ph.D. in telecommunications systems and technoeconomics, all from the University of Athens. He is a lecturer in the Department of Informatics and Telecommunications of University of Athens and an adjunct assistant professor in the Department of Telecommunications of the newly founded University of Peloponnese. He has participating in numerous European R&D projects in the RACE I &II, ACTS, Telematics, RISI and IST framework in the areas of telecommunications and Technoeconomics. He is an adviser in several organisations including OTE and EETT (Greek NRA for telecommunications) in the fields of telecommunications, broadband and mobile services, licensing, spectrum management, pricing and legislation. His research interests are optical, microwave communications and technoeconomic evaluation of network architectures and services. He has more than 30 publications in refereed journal and conferences in the area of telecommunications, optoelectronics and technoeconomics. He is a member of IEEE and serves as reviewer in several journals and conferences. Thomas Sphicopoulos received the Physics degree from Athens University in 1976, the D.E.A. degree and Doctorate in Electronics both from the University of Paris VI in 1977 and 1980 respectively, the Doctorat Es Science from the Ecole Polytechnique Federale de Lausanne in 1986. From 1976 to 1977 he worked in Thomson CSF Central Research Laboratories on Microwave Oscillators. From 1977 to 1980 he was an Associate Researcher in Thomson CSF Aeronautics Infrastructure Division. In 1980 he joined the Electromagnetism Laboratory of the Ecole Polytechnique Federal de Lausanne where he carried out research on Applied Electromagnetism. Since 1987 he is with the Athens University engaged in research on Broadband Communications Systems. In 1990 he was elected as an Assistant Professor of Communications in the Department of Informatics & Telecommunications, in 1993 as Associate Professor and since 1998 he is a Professor in the same Department. His main scientific interests are Microwave and Optical Communication Systems and Networks and Techno-economics. He has lead about 40 National and European R&D projects. He has more than 100 publications in scientific journals and conference proceedings. From 1999 he is advisor in several organisations including EETT (Greek NRA for telecommunications) in the fields of market liberalisation, spectrum management techniques and technology convergence.     

G729 Voice Decoder Design

Embedded digital signal processing (DSP) systems are usually associated with real time constraints and/or high data rates such that fully software implementations are often not satisfactory. In that case, mixed hardware/software implementations are to be investigated. This paper presents the design of a HW/SW G.729 voice decoder dedicated to embedded systems. The decoder has been built around, on the one hand a reconfigurable digital circuit (FPGA) to achieve the so called IP hardware part—the autocorrelation computation—using a linear systolic array, and on the other hand a digital signal processor (DSP) for the remainder of the algorithm. Apart such an implementation is typically driven by the use of reusable component (IP) it is of great interest for new G729-based applications such as Voice over IP (VoIP) for example. It results in an overall reduction of the execution time per frame. Another interesting point is the design of a parameterizable autocorrelation block which can be useful for a wide range of applications such as GSM 13 Kbit/s, APC 9.6 Kbit/s and G723 6.3 Kbit/s and 5.3 Kbit/s. In the G729 context and using a V50 Virtex FPGA, the execution time of this function is 10 times faster than a TMS320C6201 DSP implementation. Fatma Sayadi is Ph.D. student at Faculty of Sciences, Monastir, Tunisia in collaboration with the LESTER Laboratory, University de Bretagne Sud, Lorient, France. She is a member of Laboratory of Electronics and Micro-Electronics. His researches interest, the implementation of Digital Signal, high level design using VHDL language, Hardware/Software Co-design. Emmanuel Casseau received his Ph.D Degree in Electrical Engineering in 1994. He is currently an Associate Professor in the Electronic Department at the University de Bretagne Sud, Lorient, France. He is also in charge of the IP project of the Lester Lab., University de Bretagne Sud. His research interests include system design, high-level synthesis, virtual components and SoCs. Mohamed Atri born in 1971, received his Ph.D. Degree in Micro-electronics from the Science Faculty of Monastir in 2001. He is currently a member of the Laboratory of Electronics & Micro-electronics. His research includes Circuit and System Design, Network Communication, IPs and SoCs. Mehrez Marzougui received the B.Sc. degree from University of Science and Technology (electronic option), Monastir, Tunisia, and the M.Sc. degree in electronic from the same university in 1996 and 1998 respectively. Since 1998, he has been a Ph.D. candidate in Electronic and Micro-electronic laboratory at the University of Sciences and Technology, Monastir, Tunisia. His research interests include hardware/software co-verification and high-level synthesis. Rached Tourki was born in 1948. He received the B.S. degree in Physics (Electronics option) from Tunis University, in 1970; the M.S. and the Doctorat de 3eme cycle in Electronics from Institut d'Electronique d'Orsay, Paris-south University in 1971 and 1973 respectively. From 1973 to 1974 he served as microelectronics engineer in Thomson-CSF. He received the Doctorat d'etat in Physics from Nice University in 1979. Since this date he has been professor in Microelectronics and Microprocessors with the physics department, Faculte des Sciences de Monastir. Eric Martin born in 1961, is a Full Professor at the University of South Brittany in Lorient, France. His interest includes the implementation of Digital Signal and Image Processing and high-level design methods for dedicated circuits.     

New Four-Quadrant CMOS Current-Mode and Voltage-Mode Multipliers

In this paper, a four-quadrant current-mode multiplier based on a new squarer cell is proposed. The multiplier has a simple core, wide input current range with low power consumption, and it can easily be converted to a voltage-mode by using a balanced output transconductor (BOTA) [1]. The proposed four-quadrant current-mode and voltage-mode multipliers were confirmed by using PSPICE simulation and found to have good linearity with wide input dynamic range. For the proposed current-mode multiplier, the static power consumption is 0.671 mW, the maximum power consumption is 0.72 mW, the input current range is ± 60 μ A, the bandwidth is 31 MHz, the input referred noise current is 46 pA/√Hz, and the maximum linearity error is 3.9%. For the proposed voltage-mode multiplier, the static power consumption is 1.6 mW, the maximum power consumption is 1.85 mW, the input voltage range is ± 1V from ± 1.5V supply, the bandwidth is 25.34 MHz, the input referred noise voltage is 0.85 μV/√Hz, and the maximum linearity error is 4.1%. Mohammed A. Hashiesh was born in Elkharga, New Valley, Egypt, in 1979. He received the B.Sc. degree with honors from the Electrical Engineering Department, Cairo University, Fayoum-Campus, Egypt in 2001, and he received the M.Sc. degree in 2004 from the Electronics and Communication Engineering Department, Cairo University, Egypt. He is currently a Teacher Assistant at the Electrical Engineering Department, Cairo University, Fayoum-Campus. His research interests include analog CMOS integrated circuit design and signal processing, and digitally programmable CMOS analog building blocks. Soliman A. Mahmoud was born in Cairo, Egypt, in 1971. He received the B.Sc. degree with honors, the M.Sc. degree and the Ph.D. degree from the Electronics and Communications Department, Cairo University—Egypt in 1994, 1996 and 1999 respectively. He is currently an Assistant Professor at the Electrical Engineering Department, Cairo University, Fayoum-Campus. He has published more than 50 papers. His research and teaching interests are in circuit theory, fully integrated analog filters, high frequency transconductance amplifiers, low voltage analog CMOS circuit design, current-mode analog signal processing and mixed analog/digital programmable analog blocks. Ahmed M. Soliman was born in Cairo Egypt, on November 22, 1943. He received the B.Sc. degree with honors from Cairo University, Cairo, Egypt, in 1964, the M.S. and Ph.D. degrees from the University of Pittsburgh, Pittsburgh, PA., U.S.A., in 1967 and 1970, respectively, all in Electrical Engineering. He is currently Professor Electronics and Communications Engineering Department, Cairo University, Egypt. From September 1997–September 2003, Dr Soliman served as Professor and Chairman Electronics and Communications Engineering Department, Cairo University, Egypt. From 1985–1987, Dr. Soliman served as Professor and Chairman of the Electrical Engineering Department, United Arab Emirates University, and from 1987–1991 he was the Associate Dean of Engineering at the same University. He has held visiting academic appointments at San Francisco State University, Florida Atlantic University and the American University in Cairo. He was a visiting scholar at Bochum University, Germany (Summer 1985) and with the Technical University of Wien, Austria (Summer 1987). In 1977, Dr. Soliman was decorated with the First Class Science Medal, from the President of Egypt, for his services to the field of Engineering and Engineering Education. Dr Soliman is a member of the Editorial Board of Analog Integrated Circuits and Signal Processing. Presently Dr. Soliman is Associate Editor of the IEEE Transactions on Circuits and Systems I (Analog Circuits and Filters).     

Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors

The continuous increase of the computational power of programmable processors has established them as an attractive design alternative, for implementation of the most computationally intensive applications, like video compression. To enforce this trend, designers implementing applications on programmable platforms have to be provided with reliable and in-depth data and instruction analysis that will allow for the early selection of the most appropriate application for a given set of specifications. To address this need, we introduce a new methodology for early and accurate estimation of the number of instructions required for the execution of an application, together with the number of data memory transfers on a programmable processor. The high-level estimation is achieved by a series of mathematical formulas; these describe not only the arithmetic operations of an application, but also its control and addressing operations, if it is executed on a programmable core. The comparative study, which is done using three popular processors (ARM, MIPS, and Pentium), shows the high efficiency and accuracy of the methodology proposed, in terms of the number of executed (micro-)instructions (i.e. performance) and the number of data memory transfers (i.e. memory power consumption). Using the proposed methodology we estimated an average deviation of 23% in our estimated figures compared with the measurements taken from the real execution on the CPUs. This work was supported by the project PENED ’99 ED501 funded by GSRT of the Greek Ministry of Development, and the project PRENED ’99 KE 874 funded by the Research Committee of the Democritus University of Thrace. This work was partially sponsored by a scholarship from the Public Benefit Foundation of Alexander S. Onassis (Minas Dasygenis). Nikolaos Kroupis was born in Trikala in 1976. He receiver the engineering degree and Ms.C. degree in Department of Electrical and Computer Engineering from Democritous University of Thrace, Greece, in 2000 and 2002, respectively. Since 2002 he has been a Ph.D. student at the Laboratory of Electrical and Electronic Materials Technology. His research interests are in software/hardware co-design of embedded system for signal processing applications. Nikos D. Zervas received a Diploma in Electrical & Computer Engineering from University of Patras, Greece in 1997. He received the Ph.D. degree in the Department of Electrical and Computer Engineering of the same University in 2004. His research interests are in the area of high-level, power optimization techniques and methodologies for multimedia and telecommunication applications. He has received an award from IEEE Computer Society in the context of Low-Power Design Contest of 2000 IEEE Computer Elements Mesa Workshop. Mr. Zervas is a member of the IEEE, ACM and of the Technical Chamber of Greece. Minas Dasygenis was born in Thessaloniki in 1976. He received his Diploma in Electrical and Computer Engineering in 1999, from the Democritus University of Thrace, Greece, and for his diploma Thesis he was honored by The Technical Chamber of Greece and Ericsson Hellas. In 2005, he received his PhD Degree from the Democritus University of Thrace. His research interests include low-power VLSI design of arithmetic circuits, residue number system, embedded architectures, DSPs, hardware/ software codesign and IT security. He has published more than 20 papers in international journals and conferences and he has been a principal researcher in three European research projects. Konstantinos Tatas received his degree in Electrical and Computer Engineering from the Democritus University of Thrace, Greece in 1999. He received his Ph.D. in the VLSI Design and Testing Center in the same University by June 2005. He has been employed as an RTL designer in INTRACOM SA, Greece between 2000 and 2003. His research interests include low-power VLSI design of DSP and multimedia systems, computer arithmetic, IP core design and design for reuse. Antonios Argyriou received the degree in Electrical and Computer engineering from the Democritous University of Thrace, Greece, in 2001, and the M.S. and Ph.D. degrees in Electrical and Computer engineering from the Georgia Institute of Technology, Atlanta, in 2003 and 2005, respectively. His primary research interests include wireless networks, mobile computing and multimedia communications. He is a member of the IEEE and ACM. Dimitrios Soudris received his Diploma in Electrical Engineering from the University of Patras, Greece, in 1987. He received the Ph.D. Degree in Electrical Engineering, from the University of Patras in 1992. He is currently working as Ass. Professor in Dept. of Electrical and Computer Engineering, Democritus University of Thrace, Greece. His research interests include low power design, parallel architectures, embedded systems design, and VLSI signal processing. He has published more than 140 papers in international journals and conferences. He was leader and principal investigator in numerous research projects funded from the Greek Government and Industry as well as the European Commission (ESPRIT II-III-IV and 5th and 6th IST). He has served as General Chair and Program Chair for the International Workshop on Power and Timing Modelling, Optimisation, and Simulation (PATMOS). He received an award from INTEL and IBM for the project results of LPGD #25256 (ESPRIT IV). He is a member of the IEEE, the VLSI Systems and Applications Technical Committee of IEEE CAS and the ACM. Antonios Thanailakis was born in Greece on August 5, 1940. He received B.Sc. degrees in physics and electrical engineering from the University of Thessaloniki, Greece, 1964 and 1968, respectively, and the Msc. and Ph.D. Degrees in electrical engineering and electronics from UMIST, Manchester, U.K. in 1968 and 1971, respectively. He has been a Professor of Microelectronics in Dept. of Electrical and Computer Eng., Democritus Univ. of Thrace, Xanthi, Greece, since 1977. He has been active in electronic device and VLSI system design research since 1968. His current research activities include microelectronic devices and VLSI systems design. He has published a great number of scientific and technical papers, as well as five textbooks. He was leader for carrying out research and development projects funded by Greece, EU, or other organizations on various topics of Microlectronics and VLSI Systems Design (e.g. NATO, ESPRIT, ACTS, STRIDE).     

Design of low noise charge amplifier in sub-micron technology for fast shaping time

A discussion of the noise optimisation of the fast charge sensitive amplifier (CSA) for imaging systems using highly segmented semiconductor detectors is presented. In such systems a limited power dissipation per single channel is available while a good noise performance and a fast signal processing time are required. This paper describes the CSA noise optimisation for several CMOS technology generations with the minimum transistor gate length ranging from 0.13μm to 0.8μm and for a detector capacitance in the range from 0.5 pF to 12 pF. In a well-designed CSA, followed by a fast shaper stage, an equivalent noise charge (ENC) is dominated by the thermal noise of an input MOS transistor. In the applications considered the input transistor usually works in a moderate inversion region where no simple formula for the noise performance exists. Our analyses are made using a simplified EKV model and are compared with HSPICE simulations using BSIM3v3 models. We show several novel aspects of the noise optimisation of the CSA regarding the optimum transistor width and the sensitivity of the ENC to this width. Paweł Gryboś was born in Bielsko-Bielsko, Poland, in 1967. He received M.Sc. degree in electronics in 1991, Ph.D. degree in physics in 1995 and habilitation Ph.D. degree in electronics in 2004 from the AGH University of Science and Technology in Cracow, Poland. His current research interests are in the areas of designing and testing of low noise, multichannel ASICs for physics and neurobiology applications. Marek Idzik graduated in Electronic Engineering (1990) at University of Science and Technology of Cracow and in Theoretical Physics (1991) at Jagiellonian University of Cracow, Poland. Received his Ph.D. in Experimental Physics (1995) at University of Science and Technology of Cracow. Since 1995 Assistant Professor at University of Science and Technology of Cracow. Research activity: design of VLSI electronics, physics of semiconductor detectors, heavy ion physics. Teaching activity in international schools: ICFA (1997) Leon, Mexico, ICFA (2004) Rio de Janeiro, Brasil. More than 50 scientific publications on international journals. Andrzej Skoczeń was born in Cracow, Poland, on February 25, 1962. He is an assistant professor in Nuclear Electronics Department at the Faculty of Physics and Applied Computer Science at the AGH University of Science and Technology in Cracow. He received his Ph.D. in physics in the field of semiconductor devices in May 1993. He is involved with problems concerning project and design of integrated circuits for physics experiments at DESY (Hamburg), GSI (Darmstadt) and CERN (Geneva). He deals with radiation sensors applications, CAD modeling, characterization, and VLSI mixed signal design. At his home institution he works also as a lecturer in the field of introduction to physics and electronics.     

Design and Evaluation of a QoS-aware Framework for HIPERLAN/2 Networks

Recent advances on wireless technology are enabling the design and deployment of multiservice wireless networks. In order to be able to meet the QoS requirements of the various applications, it is essential to deploy QoS provisioning mechanisms. In this paper, we present a QoS framework to support various types of services in a wireless networking environment. Under this QoS framework, we propose various resource request mechanisms. We carry out a comparative study of the proposed schemes. Our simulation results show the effectiveness of the mechanisms when supporting different services, such as video, voice, best-effort and background traffic. Francisco M. Delicado This author received his M.Sc. degree in Physics (Electronics and Computer Science) from the University Complutense of Madrid, Madrid, Spain in 1995. He is currently a Ph.D. degree student in the Department of Computer Engineering at the University of Castilla-La Mancha. His research interests include high-performance networks, specially wireless LAN, QoS over WLAN, video compression, video transmission and error-resilient protocol architectures. Pedro Cuenca This author received his M.Sc. degree in Physics (Electronics and Computer Science, award extraordinary) from the University of Valencia in 1994. He got his Ph.D. degree in Computer Engineering in 1999 from the Polytechnic University of Valencia, Spain. In 1995 he joined the Department de Computer Engineering at the University of Castilla-La Mancha. He is currently an Associate Professor of Communications and Computer Networks. He has also been a visiting researcher at The Nottingham Trent University, Nottingham (England) and at the Multimedia Communications Research Laboratory, University of Ottawa (Canada). His research topics are centered in the area of high-performance networks, wireless LAN, video compression, QoS video transmission and error-resilient protocol architectures. He has served in the organization of International Conferences as Session Chair. He has been reviewer for several Journals and for several International Conferences. He is a member of the IFIP 6.8 Working Group and a member of the IEEE. Luis Orozco-Barbosa This author received the B.Sc. degree in electrical and computer engineering from Universidad Autonoma Metropolitana, Mexico, in 1979, the Diplome d'Etudes Approfondies from ENSIMAG, France, in 1984 and the Doctorat de l'Universite from Universite Pierre et Marie Curie, France, in 1987, both in computer science. From 1991 to 2002, he was a Faculty Member of Computer Engineering at the School of Information Technology and Engineering (SITE), University of Ottawa, Canada. In 2002, he joined the Department of Computer Engineering at Universidad de Castilla La Mancha (SPAIN) where he is currently Director of the Albacete Research Institute of Informatics. He has published over 180 papers in international Journals and Conferences on computer networks and performance evaluation. His current research interests include Internet protocols, video communications, wireless networks, traffic modeling and performance evaluation. He is a member of the IEEE. Antonio Garrido This author received the degree in physics (electronics and computer science) and the Ph.D. degrees from the University of Granada, Spain, in 1986 and University of Valencia, Spain, in 1991, respectively. In 1986, he joined the Department of Computer Engineering at the University of Castilla-La Mancha, where he is currently a Full Professor of Computer Architecture and Technology and Dean of the EscuelaPolitecnica Superior de Albacete (School of Computer Engineering). His research interests include high-performance networks, telemedicine, video compression, and video transmission. He has published over 40 papers in international journals conferences on performance evaluation of parallel computer and communications systems and compression and transmission in high-speed networks. He has led several research projects in telemedicine, computer networks and advanced computer system architectures.     

Cascode Monolithic DC-DC Converter for Reliable Operation at High Input Voltages

A CMOS OTA-C low-pass notch filter for EEG application is described. The pass-band covers four bands of brain wave and provides more than 65 dB attenuation for the 50 Hz power line interference. The OTA works in the weak inversion region and a low transconductance of 3 nA/V is achieved. The low transconductance enables using small capacitors in the OTA-C filter so that the filter is suitable for the multi-channel EEG integrated circuits. The measured results show the good performance of the filter for filtering the noise in acquired EEG signals. Xinbo Qian received the B.Sc. degree from Beijing Institute of Technology, P.R. China, in 1991 and M.Sc. degree from Institute of Physics, Chinese Academy of Sciences, in 1996. From 1996 to 1999, she was a research engineer in the Institute of Acoustics, Chinese Academy of Sciences, worked on the sonar signal receiving and processing systems. Since 1999, she has been pursuing the Ph.D. degree in Electrical and Computer Engineering department, National University of Singapore, with research direction on on-chip readout circuits for microbolometer focal plane arrays. Now she is employed by Department of Mechanical Engineering and Division of Bioengineering, National University of Singapore as a research fellow. Her research interest is low-noise integrated circuits design and bio-medical sensor electronics, including electroencephalography IC, magnetocardiography IC, low-noise amplifier, filter and data converters etc. Yong Ping Xu graduated from Nanjing University, P.R. China in 1977. He received his Ph.D. from University of New South Wales (UNSW) Australia, in 1994. From 1978 to 1987, he was with Qingdao Semiconductor Research Institute, P.R. China, initially as an IC design engineer, and later the deputy R&D manager and the Director. From 1989 to 1992, he was working on silicon diode based infrared detectors towards his Ph.D. at School of Electrical Engineering, UNSW Australia. From 1993 to 1995, he worked on an industry collaboration project with GEC Marconi, Sydney, Australia, at the same university, involved in design of sigma-delta ADCs. He was a lecturer at University of South Australia, Adelaide, Australia from 1996 to 1998. He has been with the Department of Electrical and Computer Engineering, National University of Singapore since June 1998 and is now an Associate Professor. His general research interests are in the areas of mixed-signal and RF integrated circuits, and integrated MEMS and sensing systems. His current focuses are high-speed wideband ADC, UWB front-end circuits and low-power low-voltage integrated circuits for biomedical applications. He is a Senior Member of IEEE. Xiaoping Li received his Ph.D. degree from Department of Mechanical and Manufacturing Engineering, University of New South Wales, Australia in 1991, and joined the National University of Singapore in 1992, where he is currently an Associate Professor with the Department of Mechanical Engineering and Division of Bioengineering. He was a visiting professor of Tokyo Institute of Technology, Japan in 2000, and visiting professor of Georgia Institute of Technology, USA in 2001. He is a member of American Society of Mechanical Engineers (ASME), a senior member of Society of Manufacturing Engineering (SME) and a senior member of North American Manufacturing Research Institute/SME, and is currently the Chairman of SME Singapore Chapter. His current research interests include neurosensors and nanomachining. He is a guest editor of International Journal of Computer Applications in Technology, USA. He is a regular reviewer of the ASME Journal of Manufacturing Engineering, USA, Transactions of NAMRI/SME, USA, Journal of materials processing technology, UK, International Journal of Machine Tools and Manufacture, UK, and IMechE Journal of Engineering Manufacture, UK.     

Layout preferences concerning matching in a fully differential ΔΣ modulator design

A fully differential architecture has numerous advantages in a switched-capacitor delta-sigma modulator such as immunization to clock-induced noise, supply rejection, simple sign conversion of integrator gain and doubled output dynamic range. Efficient use of the fully differential architecture nevertheless requires a completely symmetrical layout and routing, which may contradict with the requirements of component matching. Some design choices have to be made at this point, depending on what requirements can be compromised. This paper discusses the importance of certain layout features which may serve as a guide in making these design choices. Hakan Binici was born in Istanbul, Turkey, in 1969. He received his B.Sc. and M.Sc. degrees respectively from Istanbul Technical University and the Bogazici University in Istanbul in 1989 and 1995. Since 1997 he has been working as a research scientist at the Electronics Laboratory of the University of Oulu in Finland. He is currently continuing his research towards a Ph.D. His research interests focus on low-voltage, low-power analog VLSI systems and ΔΣ modulators. Juha Kostamovaara received the degrees of Dipl. Eng, Licentiate of Tech. and Doctor of Tech. in electrical engineering in 1980, 1982 and 1987, respectively, all from the University of Oulu, Finland. He was Acting Associate Professor of Electronics in the Department of Electrical Engineering at the University of Oulu in 1987–1993, and was nominated Associate Professor from the beginning of 1993. During 1994 he worked as an Alexander von Humboldt Scholar at the Technical University of Darmstadt, Germany. In 1995 he was invited to become full Professor of Electronics at the University of Oulu, where he is currently also head of the Electronics Laboratory. Prof. Kostamovaara's main interest is in the development of high-speed electronic circuits and systems and their applications in electronic and optoelectronic measurements and radio mobile telecommunications. An erratum to this article can be found at     

Voltage-Mode Universal Biquadratic Filters with One Input and Five Outputs

Four new voltage-mode universal biquadratic filters each with one input terminal and five output terminals are presented. Each of the first two proposed circuits uses four plus-type second-generation current conveyors, two grounded capacitors and five resistors. The third proposed circuit employs two plus-type second-generation current conveyors, one differential voltage current conveyor, two grounded capacitors and five resistors. The fourth proposed circuit employs two multi-output second-generation current conveyors, two grounded capacitors and five resistors. Each of the proposed circuits can realize all the standard filter functions; highpass, bandpass, lowpass, notch and allpass, simultaneously, without changing the passive elements. The proposed circuits enjoy the features of orthogonal controllable of resonance angular frequencies and quality factors, using only grounded capacitors as well as low active and passive sensitivities. Jiun-Wei Horng was born in Tainan, Taiwan, Republic of China, in 1971. He received the B.S. degree in Electronic Engineering from Chung Yuan Christian University, Chung-Li, in 1993, and the Ph.D. degree from National Taiwan University, Taipei, in 1997. From 1997 to 1999, he served as a Second-Lieutenant in China Army Force. From 1999 to 2000, he joined CHROMA ATE INC. where he worked in the area of video pattern generator technologies. From 2000 to 2005, he joined the Department of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan as an Assistant Professor. Since 2005, he is an Associate Professor. His teaching and research interests are in the areas of Circuits and Systems, Analog and Digital Electronics, Active Filter Design and Current-Mode Signal Processing. Chun-Li Hou was born in Taipei, Taiwan, Republic of China, in 1951. He received the B.S. degree, M.S. degree, and Ph.D. degree in Electrical Engineering from National Taiwan University, Taipei, in 1974, 1976, and 1991, respectively. From 1977 to 1979, he taught as a lecture in Tamkang College. From 1981 to 1991, he taught as a lecture in the department of Electronic Engineering, Chung-Yuan Christian University, Chung, Taiwan. From 1992 until now, he taught there as an Associate Professor. His teaching and research interests are in the areas of Current-Mode Analog Circuit Analysis and Design, Active Network Synthesis Circuit theory and Applications. Chun-Ming Chang obtained his bachelor and master degrees, both in the field of electrical engineering, from National Cheng Kung University, Tainan, Taiwan, R.O. China, and his Ph.D. degree in the field of electronics and computer science from the University of Southampton, U.K. He had been an associate professor in Chung Yuan Christian University in Taiwan from 1985 to 1991, and has been a full professor in the same University since 1991. His research interest is divided by two relative fields, network synthesis before 1991 and analog circuit design after 1991. He had been a chairman of the electrical engineering department in Chung Yuan Christian University from 1995 to 1999. Recently, he was recommended for inclusion in The Contemporary Who's Who of Professionals 2004 Edition, and nominated by the Governing Board of Editors of the American Biographical Institute for the prestigious title MAN OF THE YEAR-2005, and became an Advisor of the ABI's distinguished RESEARCH BOARD OF ADVISORS due to the invention of Analytical Synthesis Method and OTA-Only-Without-C Circuits in the field of analog circuit design. Wen-Yaw Chung was born in Hsin-Chu, Taiwan, R.O.C., 1957. He received the B.S.E.E. and M.S. degrees from Chung Yuan Christian University, Chung Li, Taiwan, in 1979 and 1981 respectively, and the Ph.D. degree in Electrical and Computer Engineering from Mississippi State University, USA, in 1989. Subsequently, he joined the Advanced Microelectronics Division, Institute for Technology Development in Mississippi, where he was involved in the design of a bipolar optical data receiver. In 1990 he worked as a design manager for the Communication Product Division, United Microelectronics Corporation, Hsin-Chu, where he was involved in the design of analog CMOS data communication integrated circuits. Since 1991 he has been an Associate Professor in the Department of Electronic Engineering at Chung Yuan Christian University. His research interests include mixed-signal VLSI design, biomedical IC applications, sensor and actuator interfacing for deep submicron VLSI electronics.