具有高可调增益范围的CMOS宽带中频调制器

利用TSMC 0 .2 5 μmCMOS混合工艺 ,针对超外差结构的无线宽带收发器 ,实现了一个能够工作在 5 0～6 0 0MHz的中频调制器 ,并对该调制器进行了仿真和测试。由于该调制器在输出端采用了一个具有高可调增益范围而且鲁棒性能好的可变增益放大器 (VGA) ,从而使得该调制器具有超过 70dB的增益可调范围。测试结果表明 ,该调制器能够工作在 5 0～ 6 0 0MHz的频率上 ,输出功率为 - 81～ - 10dBm ,最小增益的输出噪声为 - 130dBm/ Hz,最大增益的输出P1dB点为 - 4 .3dBm ,在 3V的电源电压下 ,电流功耗为 32mA。     

Bandwidth-reconfigurable single-passband microwave photonic filter based on stimulated Brillouin scattering

A bandwidth-reconfigurable filter is necessary to meet the need of growing communication capacity and signal coverage frequency range. The stimulated Brillouin scattering (SBS) gain spectrum as a filter passband is used to extract desired microwave signals. Due to the fact that the passband is formed by mapping the Brillouin gain spectrum, bandwidth reconfigurability can be implemented by changing Brillouin gain linewidth. In this paper, a scheme using a 5-lines optical comb acting as a Brillouin pump is experimentally demonstrated. The spectrum of the 5-lines optical comb is extended by a binary phase shift keying (BPSK) pulse modulated signal. Experiments have shown that the 3-dB and 20-dB bandwidths of the filter are 196 MHz and 257 MHz, respectively, and its 20-dB shape factor is 1.31. The passband ripple is ~3.5 dBm with stop-band rejection of 20 dBm under 15 dBm optical pump power.     

A highly linear baseband G_m-C filter for WLAN application

A low voltage,highly linear transconductance-C（G_m-C） low-pass filter for wireless local area network （WLAN） transceiver application is proposed.This transmitter（Tx） filter adopts a 9.8 MHz 3rd-order Chebyshev low pass prototype and achieves 35 dB stop-band attenuation at 30 MHz frequency.By utilizing pseudo-differential linear-region MOS transconductors,the filter IIP₃ is measured to be as high as 9.5 dBm.Fabricated in a 0.35μm standard CMOS technology,the proposed filter chip occupies a 0.41×0.17 mm² die area and consumes 3.36 mA from a 3.3-V power supply.     

一种高线性低功耗基带Gm-C滤波器

介绍了一种应用于无线局域网(WLAN)收发机系统的跨导-电容(Gm-C)低通滤波器,该电路可工作于低电压,并且具有高线性度.该射频发射器中的滤波器采用截止频率为9.9 MHz的3阶切比雪夫低通滤波器,在30 MHz频率处的阻带衰减达到30.5 dB.由于采用跨导线性环技术,滤波器工作于1.2V电源电压时,IIP3可达13.5 dBm.电路采用0.13 μm CMOS工艺实现,滤波器芯片尺寸为0.52 mm×0.17 mm,消耗电流3.76 mA.     

2.5 V 35 dBm IIP3 75 MHz sixth-order active RC filter

A differential sixth-order Butterworth Sallen-Key lowpass filter in 0.25 mum SiGe BiCMOS, using a 2.5 V supply, is presented. The filter has a 75 MHz cutoff frequency and an attenuation of more than 20 dB at a stopband frequency of 148 MHz. The third-order intercept point (IIP3) is 35 dBm, providing excellent linearity.     

宽带接收机应用的超宽倍频程电调滤波器设计*

电调谐预选滤波器是宽带接收机的关键部件,直接影响到整机性能的好坏。设计了一种采用梳状滤波结构的电调滤波器,工作频段为200~600MHz,整个调谐范围内,1d B带宽约为12%,插入损耗小于3d B,输入二阶截点值大于60d Bm,输入三阶截点值大于20d Bm,输入输出端口驻波比小于1.8,测试和仿真结果吻合良好。该滤波器结构简单、体积小、工艺上易实现,还具有超宽倍频程的调谐范围及低插损、高截点值等优良电性能。     

A CMOS channel-select filter for a direct-conversion wirelessreceiver

A highly selective and linear switched-capacitor channel-select filter is fabricated in 1-μm CMOS for a direct-conversion wireless receiver operating in the 902-928 MHz ISM band. The filter selects a 230-kHz wide channel and attenuates by at least 50 dB from 320 kHz to 57 MHz. The input IP3 is +30 dBm, the input-referred noise in the passband is 70 nV/√Hz, and the circuit takes 4.6 mA from a 3.3 V supply. Direct subsampling of the 915 MHz RF input signal by the filter front-end is also demonstrated with only a small degradation in linearity. The input noise voltage is halved in a redesign while keeping the current drain unchanged     

A High Dynamic Range Programmable CMOS Front-End Filter with a Tuning Range from 1850 to 2400 MHz

This paper presents a highly programmable front-end filter and amplifier intended to replace SAW filters and low noise amplifiers (LNA) in multi-mode direct conversion radio receivers. The filter has a 42 MHz bandwidth, is tunable from 1850 to 2400 MHz, achieves a 5.8 dB NF, –25 dBm in-band 1-dB input compression point (ICP) and 0 dBm out-of-band ICP while drawing 26 mA from a 2.5 V supply.Kâre T. Christensen received the M.Sc. and Ph.D. degrees in electrical engineering from the Technical University of Denmark in 1997 and 2002, respectively.In 1995-96 he was a visiting scholar working on switched current memory cells at the Spanish National Microelectronics Centre in Seville. In 1997 he worked on an asynchronous embedded MIPS16/MIPS32 microprocessor core for LSI Logic. In 1999-2000 he was a visiting researcher at Stanford University. During his stay he worked on fully integrated RF front-end filters in CMOS.From 1998 to 2002 he worked for Nokia Mobile Phones conducting research in the design of RF ICs for multi-band GSM terminals. He currently works for the Danish hearing aid manufacturer Oticon A/S designing micro-power RF circuits and systems in CMOS.He has lectured on several occasions at the Technical University of Denmark and other universities. He has authored or co-authored nine papers and holds three U.S. patents.Thomas H. Lee received the S.B., S.M. and Sc.D. degrees in electrical engineering, all from the Massachusetts Institute of Technology in 1983, 1985, and 1990, respectively.He joined Analog Devices in 1990 where he was primarily engaged in the design of high-speed clock recovery devices. In 1992, he joined Rambus Inc. in Mountain View, CA where he developed high-speed analog circuitry for 500 megabyte/s CMOS DRAMs.He has also contributed to the development of PLLs in the StrongARM, Alpha and AMD K6/K7/K8 microprocessors. Since 1994, he has been a Professor of Electrical Engineering at Stanford University where his research focus has been on gigahertz-speed wireline and wireless integrated circuits built in conventional silicon technologies, particularly CMOS.He has twice received the Best Paper award at the International Solid-State Circuits Conference, co-authored a Best Student Paper at ISSCC, was awarded the Best Paper prize at CICC, and is a Packard Foundation Fellowship recipient.He is an IEEE Distinguished Lecturer of both the Solid-State Circuits and Microwave Societies. He holds 35 U.S. patents and authored The Design of CMOS Radio-Frequency Integrated Circuits (now in its second edition), and Planar Microwave Engineering, both with Cambridge University Press. He is a co-author of four additional books on RF circuit design, and also cofounded Matrix Semiconductor.Erik Bruun received the M.Sc. and Ph.D. degrees in electrical engineering in 1974 and 1980, respectively, from the Technical University of Denmark. In 1980 he received the B.Com. degree from the Copenhagen Business School. In 2000 he also received the dr. techn. degree from the Technical University of Denmark.From January 1974 to September 1974 he was with Christian Rovsing A/S, working on the development of space electronics and test equipment for space electronics. From 1974 to 1980 he was with the Laboratory for Semiconductor Technology at the Technical University of Denmark, working in the fields of MNOS memory devices, IL devices, bipolar analog circuits, and custom integrated circuits. From 1980 to 1984 he was with Christian Rovsing A/S. From 1984 to 1989 he was the managing director of Danmos Microsystems ApS. Since 1989 he has been a Professor of analog electronics at the Technical University of Denmark where he has served as head of the Sector of Information Technology, Electronics, and Mathematics from 1995 to 2001. Since 2001 he has been head of ÿrstedïDTU.His current research interests are in the areas of RF integrated circuit design and integrated circuits for mobile phones.     

A 4th-order reconfigurable analog baseband filter for software-defined radio applications

This paper presents a 4th-order reconfigurable analog baseband filter for software-defined radios.The design exploits an active-RC low pass filter（LPF） structure with digital assistant,which is flexible for tunability of filter characteristics,such as cut-off frequency,selectivity,type,noise,gain and power.A novel reconfigurable operational amplifier is proposed to realize the optimization of noise and scalability of power dissipation.The chip was fabricated in an SMIC 0.13μm CMOS process.The main filter and frequency calibration circuit occupy 1.8×0.8 mm² and 0.48×0.25 mm² areas,respectively.The measurement results indicate that the filter provides Butterworth and Chebyshev responses with a wide frequency tuning range from 280 kHz to 15 MHz and a gain range from 0 to 18 dB.An IIP3 of 29 dBm is achieved under a 1.2 V power supply.The input inferred noise density varies from 41 to 133 nV/（Hz）^1/2 according to a given standard,and the power consumptions are 5.46 mW for low band（from 280 kHz to 3 MHz） and 8.74 mW for high band（from 3 to 15 MHz） mode.     

An electronically tunable microstrip bandpass filter using thin-film Barium-Strontium-Titanate (BST) varactors

A tunable third-order combline bandpass filter using thin-film barium-strontium-titanate varactors and fabricated on a sapphire substrate is reported. Application of 0-200-V bias varied the center frequency of the filter from 2.44 to 2.88 GHz (16% tuning) while achieving a 1-dB bandwidth of 400 MHz. The insertion loss varied from 5.1 dB at zero bias to 3.3 dB at full bias, while the return loss exceeded 13 dB over the range. The third-order intercept of the filter was found to be 41 dBm.     

High dynamic range 60 MHz powerline front-end IC

Presented for the first time, is a novel broadband powerline front-end realised in 0.25 mum SiGe BiCMOS with superior performance. The frequency range of the transmitter (TX) and the direct conversion receiver (RX) exceeds 60 MHz with a very wide dynamic range up to 99.5 dB for the lowest channel bandwidth. The integrated IF filter is tunable from 1 up to 8 MHz. The measured input-referred noise of the TX with low third intermodulation distortion (IMD3) is -140 and 144.5 dBm/Hz for the RX.     

An image-rejecting mixer and vector filter with 55-dB imagerejection over process, temperature, and transistor mismatch

This paper describes an image-rejecting mixer and vector filter for use in radio systems with channel bandwidths in the range of 1 MHz. The circuit replaces the SAW filter and second downconverter commonly used in this style of radio. Because the output of the circuit is at an IF of 5 MHz, traditional demodulation methods including limiting and FM discrimination can still be used. The circuit is based on a quadrature mixer that guarantees good performance despite device mismatches and process variation. The circuit consumes 29 mA at 3.3 V,and achieves better than 55-dB image rejection despite device mismatches and process variation and is implemented in a single-poly triple metal 0.5 μm CMOS process with linear capacitor implants. The circuit is designed for input signals from 125 to 250 MHz. Input referred voltage noise is 900 μVrms. The in-band IP3 is 18 dBm. By changing an external reference frequency, the passband width of the filter can be varied from 3 to 0.5 MHz     

A high sensitivity and wide dynamic range zero-IF RF receiver for cognitive radio application

This paper presents an RF receiver of zero-Intermediate Frequency (IF) architecture for Cognitive Radio (CR) communication systems. Zero-IF architecture reduce the image reject filter and IF filter, so it is excellent in low cost, compact volume, and low power dissipation. The receiver employs three digital attenuator and a high gain, high linearity low noise amplifier to achieve wide dynamic range of 70 dB and high receiving sensitivity of −81 dBm. A fully balanced I/Q demodulator and a differential Local Oscillator (LO) chips are used to minimize the negative effects caused by second-order distortion and LO leakage. In order to select an 8 MHz-channel from 14 continuous ones located in UHF band (694–806 MHz) accurately, approach of channel selectivity circuits is proposed. The RF receiver has been designed, fabricated, and test. The measured result shows that the noise figure is 3.4 dB, and the error vector magnitude is 7.5% when the input power is −81 dBm.     

基于新颖调谐谐振器的低相噪VCO设计

介绍了一种采用新颖谐振器的低相位噪声窄带压控振荡器(VCO)的设计方法。该谐振器采用源与负载横向交叉耦合结构,形成一个传输零点,提高了谐振器的Q值。该谐振器通过弱耦合与变容二极管连接,从而实现电压控制滤波器通带中心频率调谐。利用该谐振器设计了一个窄带VCO,并在先进设计系统(ADS)软件里仿真验证。该VCO中心频率6.15 GHz,在调谐电压从0到15 V的范围内调谐带宽60 MHz,相位噪声在整个调谐范围内优于-132 dBc/Hz@1MHz,输出功率为8.4 dBm,功率平坦度±0.1 dBm。     

WCDMA接收系统中邻通道干扰研究

本文对3G的WCDMA中的ACS参数进行分析,解释33 dB的理由。并对实际电路的RF接收的ACS指标进行测试,设置测试的中心频率是2 110 MHz、2 140 MHz和2 170 MHz 3个高中低频率点,测得在偏离中心频率点 /-5 MHz的调制干扰信号值为-48 dBm到-42 dBm之间(BER=0.001时),可得幅度裕量在3.9 dB到9.2 dB之间,满足3GPP中的干扰信号-52 dBm电平要求。     

A low power Gm-C filter with on-chip automatic tuning for a WLAN transceiver

A sixth-order Butterworth Gm-C low-pass filter(LPF)with a continuous tuning architecture has been implemented for a wireless LAN(WLAN)transceiver in 0.35 μm CMOS technology.An interior node scaling technique has been applied directly to the LPF to improve the dynamic range and the structure of the LPF has been optimized to reduce both the die size and the current consumption.Measurement results show that the filter has 77.5 dB dynamic range,16.3 ns group delay variation,better than 3% cutoff frequency accuracy,and 0 dBm passband IIP3.The whole LPF with the tuning circuit dissipates only 1.42 mA(5 MHz cutoff frequency)or 2.81 mA(10 MHz cutoff frequency)from 2.85 V supply voltage,and only occupies 0.175 mm2 die size.     

雷达中频放大器的线性对数双特性设计

雷达数字中频接收机需要一个线性中频预放大电路和一个监测用的对数中频放大器。采用射频变压器形成输入匹配网络,采用高性能低噪声宽带差分放大器AD8350作为线性放大器件,采用双调谐回路作为选频网络,采用魔T电路构成功率分配网络,采用高动态范围宽带对数放大器AD8309作为对数放大器件,设计了一个兼具线性和对数特性的中频放大器。实验表明,该放大器中频输入输出阻抗50Ω,中心频率30 MHz,带宽4 MHz。线性通道增益为18 dB,输出动态范围达98 dB(1 dB压缩点-90 dBm和+8 dBm)。对数通道中,在输入功率为-68 dBm～-8 dBm时,对数放大器输出电压范围对应为0.19 V～2.06 V。     

Investigation of intermodulation in acoustic-surface-wave filter

Experimental measurements of the intermodulation of two signals in an acoustic-surface-wave filter are reported. Different cases are presented giving the inband and outband intermodulations for various input power levels from 0 to ?15 dBm at intermediate frequencies near 36 MHz.     

A Wide Locking Range Differential Colpitts Injection Locked Frequency Divider

This letter proposes a new wideband Colpitts injection locked frequency divider (ILFD) and describes the operation principle of the ILFD. The circuit consists of a differential CMOS LC-tank oscillator and a direct injection topology. The divide-by-two ILFD can provide wide locking range, and the measurement results show that at the supply voltage of 2.4 V, the tuning range of the free running ILFD is from 4.46 to 5.6 GHz, about 1.14 GHz, and the locking range of the ILFD is from 8.03 to 11.63 GHz, about 3.6 GHz, at the injection signal power of 0 dBm. The ILFD dissipates 19.92 mW at a supply voltage of 2.4 V and was fabricated in 1P6M 0.18 mum CMOS process. At the tuning voltage of 1.2 V, the measured phase noise of the free running ILFD is -110.8 dBc/Hz at 1 MHz offset frequency from 4.94 GHz and the phase noise of the locked ILFD is -135.4 dBc/Hz, while the input signal power is -4 dBm.     

A 1-V +31 dBm IIP3, Reconfigurable, Continuously Tunable, Power-Adjustable Active-RC LPF

This paper proposes a biquad design methodology and presents a baseband low-pass filter for wireless and wireline applications with reconfigurable frequency response (Chebyshev/Inverse Chebyshev), selectable order (1st/3rd/5th), continuously tunable cutoff frequency (1-20 MHz), and adjustable power consumption (3-7.5 mW). A discrete capacitor array coarsely tunes the low-pass filter, and a novel continuous impedance multiplier (CIM) then finely tunes the filter. Resistive/capacitive networks select between the Chebyshev and inverse Chebyshev approximation types. Also, a new stability metric for biquads, minimum acceptable phase margin (MAPM), is presented and discussed in the context of filter compensation and passband ripple considerations. Experimental results yield an IIP3 of 31.3 dBm, a THD of -40 dB at 447 mV_{pk, diff} input signal amplitude, and a DR of 71.4 dB. The filter's tunable range covers frequencies from 1 MHz to 20 MHz. In Inverse Chebyshev mode, the filter achieves a passband group delay variation less than plusmn2.5%. The design is fabricated in 0.13 mum CMOS, occupies 1.53 mm² , and operates from a 1-V supply.