8nm基区宽度负阻双异质结晶体管的设计与研制

本文利用分子束外延(MBE)技术能精确控制外延层厚度的特点,与选择性腐蚀技术相结合,实现了纳米级超薄基区宽度.利用集电极电压VCE调制中性基区宽度可以改变基极电阻,从而产生微分负电阻(NDR),根据这一物理机制,设计并研制成功性能优良的8 nm基区n-InGaP/P+-GaAs/n-InGaP负阻双异质结晶体管(NDRDHBT).该器件显示出基极电压VBE调制的"∧"型负阻集电极电流IC-集电极电压VCE特性,电流峰谷比(PVCR)趋于无穷大;表征基极电压调制电流能力的峰值电流跨导ΔIP/ΔVBE高达11.2 ms;击穿电压达到12 V,可用于高频振荡调制和高速数字电路.     

自对准栅型谐振隧穿晶体管试制

针对谐振隧穿二极管(RTD)在通用电路应用中的局限性,提出并设计了自对准栅型谐振隧穿晶体管结构,进行了材料的分子束外延,采用传统湿法腐蚀、金属剥离、台面隔离和空气桥互连工艺,初步研制出具有较明显栅控能力的谐振隧穿晶体管(RTT)单管,其峰值电流密度高达80.8 kA/cm2,峰谷电流比为3.6,负阻阻值在20Ω左右.研究还发现,器件的峰值电流随栅压增大而减小,谷值电流随栅压增大而增大,而且出现零点分离.这些现象与栅的纵向位置控制不当有关,可以通过减小栅间发射极宽度,缩短栅与势垒层距离,和减小发射层掺杂浓度得到改善.     

AlGaInP/GaAs异质结双极晶体管直流特性研究

制备了大尺寸AlGaInP／GaAs SHBT和DHBT，对其直流特性进行了测试，并分析了AlGaInP／GaA。单异质结晶体管(SHBT)和双异质结晶体管(DHBT)的直流特性差异，深入研究了影响AlGaInP／GaAsHBT开启电压(Voffset)的各个因素。结果表明：AlGaInP／GaAsHBT开启电压与外加基极电流密切相关，采用宽发射区可大大降低器件的开启电压。     

肖特基栅型共振隧穿三极管器件模型的研究

基于共振隧穿二极管(RTD)的电流-电压方程,结合对肖特基栅型共振隧穿三极管(SGRTT)物理机制的分析和计算,推导出了SGRTT器件的器件模型。根据实际器件的材料结构、版图参数等指标计算得到的SGRTT器件模型,能很好地与实际器件的特性相吻合。利用PSPICE软件,该模型可准确快捷地实现电路功能验证和仿真,此项研究的结果为共振隧穿器件的电路集成和研制奠定了基础。     

退火温度对ZnO/Si异质结光电转换特性的影响

采用直流反应溅射法在P-Si(100)衬底上制备了ZnO薄膜,XRD测量表明ZnO为沿c轴高度取向的多晶薄膜,1-V特性曲线表明,ZnO/Si异质结具有明显的整流特性.研究了退火温度对异质结光电转换特性的影响,结果显示,合适的退火温度能显著增大异质结的开路电压和短路电流,进而增大异质结的光电转换效率,经400℃退火后异质结获得最佳的转换效率.当退火温度达到或超过500℃时,异质结的反向电流迅速增加,光生电压和光生电流大幅度减小.通过对ZnO薄膜结构和电学性质的测量和分析,推测异质结的光电转换特性改变主要受ZnO薄膜的电学性质影响.     

TIG焊接时熔池外激振荡与熔透的关系

用脉冲电流冲击熔池,使熔池产生有规律的振荡,造成孤长和电弧电压有规律的变化,检测电弧电压变化量及其变化规律,发现熔池振荡频率与熔池尺寸有一定的对应的关系。本文介绍了能产生冲击电流的晶体管电源及熔池振荡信号检测系统。研究了电弧参数如弧长、脉冲电流幅值,脉冲电流持续时间等对产生熔池振荡的影响。研究了熔池振荡特性与熔池尺寸的关系,发现随着熔池上面和背面宽度的增加,熔池振荡频率下降,找出了不同板厚熔池尺寸与其振荡频率的关系,把熔池振荡特微做为熔透控制信号,是一条可行的途径。     

关于互感器校验仪误差测量方法探讨

针对整体检定装置特点,介绍了两类互感器校验仪误差测量方法。从结构上看,一类是常规互感器校验仪,具有工作回路电流(或电压)和差值电流(或差值电压)输入端子,可依据规程线路测量其误差。另外一类具有标准电流(或电压)互感器与被检电流(或电压)互感器二次回路输入端子,不具有差值电流(或差值电压)输入端子,通过变换常规线路,采用电流并联叠加和电压串联叠加方式,解决了此类互感器校验仪误差测量问题,并从理论上分析了方法的可行性。     

阳极电压对多孔阳极氧化铝薄膜光学常数的影响

根据多孔阳极氧化铝(AAO)薄膜200～2500nm波段透射谱,计算研究了AAO薄膜的重要制备工艺参数阳极电压对其光学常数的影响.结果表明随阳极电压的升高,AAO薄膜的折射率和厚度增大,消光系数减小.这主要源于AAO薄膜中孔密度随阳极电压的升高而迅速下降,但AAO薄膜厚度的迅速增加,减弱了阳极电压对其光学常数的调制作用.     

不同无功控制方式下光伏并网的影响及应对策略

为解决由于光照强度等扰动因素产生的有功出力波动、并网点电压越限、保护动作投切频繁等问题,该文对光伏系统并网时的无功和电压管理策略进行研究。对比目前光伏电站中普遍运用的定功率因数与定电压两种无功控制方式,并利用Matlab对并网光伏发电系统进行建模,研究光照强度扰动下不同无功控制方式对功率特性的影响规律,证明定电压控制方式在电压支撑能力与系统稳定性方面优于恒功率因数控制方式。最后通过青海地区的光伏并网实例进行相关验证并提出应对策略,通过安装SVG等动态无功补偿装置可以提高系统动态调节能力。该研究可为解决大规模光伏并网带来的实际问题提供一定理论和实证参考。     

不锈钢地线夹

一、简述背景及存在的问题 目前现有的快速焊接地线夹有两种,最普遍的焊接自带地线夹(见图1)和经过简易改造的地线夹(见图2),这两种地线夹均存在以下问题: 1.采用焊机自带地线夹进行接地焊接时,一般将焊机自带地线夹夹在管道的非焊接端面,在焊接过程中会形成一个回路,地线夹距离焊枪越远,形成的回路越长,焊机的流出电流损耗越大、焊接电压越低,不利于焊接电弧的稳定性,还会造成不必要的焊机功率损耗,增加焊接过程耗电量.同时因焊接电流衰竭、焊接电压降低,焊接引弧难度增大(特别是直流焊机),直接影响焊接效率及焊接质量,给焊接带来一定的难度.     

A Novel High-Speed Multiplexing IC Based on Resonant Tunneling Diodes

A new multiplexing IC based on the resonant tunneling diode (RTD) is proposed. The unique negative differential resistance characteristics arising from quantum effects of the RTD enable us to develop a new functional low-power digital circuit. The proposed multiplexing IC consists of two current-mode-logic monostable-bistable transition logic elements (CML-MOBILEs) based on the RTD and a low-power selector circuit block. The proposed circuit has been fabricated by using an InP RTD/ heterojunction bipolar transistor monolithic microwave integrated circuit technology. The multiplexing operation of the fabricated quantum effect IC has been confirmed up to 45 Gb/s for the first time as a monolithic technology based on the quantum effect devices. The dc power consumption is only 23 mW, which is found to be one-fourth of the current state-of-the-art conventional transistor-based multiplexing IC.     

MBE-grown vertical power-MOSFETs with 100-nm channel length

In this work we present a new approach for solving the tradeoff between breakdown capability and on state resistance for Power-MOS devices. Therefore we use a vertical transistor on an epitaxial layer. This concept allows the adjustment of the breakdown voltage due to the thickness of the epi-layer separately from the on-state resistance, which is defined by the vertical transistor. The transistor was fabricated by means of MBE, which allows very small channel length and doping control on atomistic scale. Devices with breakdown voltages between 12 V and 40 V were produced. It is also shown that the usage of local channel doping instead of homogenous doping in the switching transistor reduces the on state resistance of the device significantly.     

Analysis and design of negative resistance oscillators using surface transverse wave-based single port resonators

This practically oriented paper presents the fundamentals for analysis, optimization, and design of negative resistance oscillators (NRO) stabilized with surface transverse wave (STW)-based single-port resonators (SPR). Data on a variety of high-Q, low-loss SPR devices in the 900- to 2000-MHz range, suitable for NRO applications, are presented, and a simple method for SPR parameter extraction through Pi-circuit measurements is outlined. Negative resistance analysis, based on S-parameter data of the active device, is performed on a tuned-base, grounded collector transistor NRO, known for its good stability and tuning at microwave frequencies. By adding a SPR in the emitter network, the static transducer capacitance is absorbed by the circuit and is used to generate negative resistance only over the narrow bandwidth of the acoustic device, eliminating the risk of spurious oscillations. The analysis allows exact prediction of the oscillation frequency, tuning range, loaded Q, and excess gain. Simulation and experimental data on a 915-MHz fixed-frequency NRO and a wide tuning range, voltage-controlled STW oscillator, built and tested experimentally, are presented. Practical design aspects including the choice of transistor, negative feedback circuits, load coupling, and operation at the highest phase slope for minimum phase noise are discussed.     

Effect of Thin Film Thicknesses and Materials on the Response of RTDs and Microthermocouples

Fabrication and thermal characterization of a resistance temperature detector (RTD) heater and microthermocouples (MTs) on silicon substrates have been reported in this paper. The influence of film thickness and nickel-gold (Au) electroplating on RTD on its steady-state temperature with respect to its steady-state electrical power input and resistance is studied. Further, the thermal effects of multiple thermocouples in a thermopile as well as the effects of Au layers in the contact pads of the thermopiles on their open-circuit Seebeck voltage are studied. Therein lies the novelty of this paper. The in situ operating relationships for the RTD heater and the MT are provided     

GaN-based FETs using Cat-CVD SiN passivation for millimeter-wave applications

We have found that SiN passivation by catalytic chemical vapor deposition (Cat-CVD) can significantly increase an electron density of an AlGaN/GaN heterostructure field-effect transistor (HFET). This effect enables thin-barrier HFET structures to have a high-density two-dimensional electron gas and leads to suppression of short-channel effects. We fabricated 30-nm-gate Al_0.4Ga_0.6N(8 nm)/GaN HFETs using Cat-CVD SiN. The maximum drain current density and extrinsic transconductance were 1.49 A/mm and 402 mS/mm, respectively. Current-gain cutoff frequency and maximum oscillation frequency of the HFETs were 181 and 186 GHz, respectively. These high-frequency device characteristics are sufficiently high enough for millimeter-wave applications.     

Realization of multiple valued logic and memory by hybrid SETMOS architecture

A novel complimentary metal-oxide-semiconductor (CMOS) single-electron transistor (SET) hybrid architecture, named SETMOS, is proposed, which offers Coulomb blockade oscillations and quasi-periodic negative differential resistance effects at much higher current level than the traditional SETs. The Coulomb blockade oscillation characteristics are exploited to realize the multiple valued (MV) literal gate and the periodic negative differential resistance behavior is utilized to implement capacitor-less multiple valued static random access memory (MV SRAM) cell. The SETMOS literal gate is then used to build up other MV logic building blocks, e.g., transmission gate, binary to MV logic encoder, and MV to binary logic decoder. Analytical SET model simulations are employed to verify the functionalities of the proposed MV logic and memory cells for quaternary logic systems. SETMOS MV architectures are found to be much faster and less temperature-sensitive than previously reported hybrid CMOS-SET based MV circuits.     

改进的AlGaN/GaN HEMT小信号参数提取算法

制作了截止频率ft和最高震荡频率fmax分别为46.2和107.8 GHz的AlGaN/GaN高电子迁移率晶体管,并针对该器件建立了包含微分电阻Rfd和Rfs在内的18元件小信号等效电路模型;在传统的冷场条件提取器件寄生参数的基础上,通过对不同栅压偏置下冷场Z参数进行线性插值运算,可消除沟道分布电阻和栅极泄漏电流对寄生电阻的影响;再利用热场S参数对寄生参数部分进行去嵌,可提取得到本征参数。分析表明,此模型和算法提高了模型拟合精度,S参数的仿真结果与测试数据在200MHz到40GHz的频率范围内均符合很好,误差不到2%。     

A Novel Vector Hydrophone Based on the Piezoresistive Effect of Resonant Tunneling Diode

This letter reports a novel vector hydrophone based on the piezoresistive effect of resonant tunneling diode (RTD). An external pressure introduces stress in the layers of RTD and induces its current-voltage (I-V) curves change. This effect has been applied to designing new sensor. By control-hole technology, the sensor is processed integrated with GaAs/In_xGa_1-xAs/AlAs double barrier structures posited on its strain-sensitive region. The fabricated sensor is packaged for watertight solution, and underwater measurements are conducted in RTD's negative differential resistance (NDR) region. Directivity curve of the sensor follows ";8"; cosine functional form, which shows its vector sound signal detection ability, and its sensitivity reaches -184.6 dB (0 dB = 1 V/muPa) at 1 KHz.     

任意形状基础滑移振动复合集总参数模型

根据基础振动弹性半空间理论的最新发展成果推导出一个计算明置基础滑移振动的复合集总参数模型。采用该模型对复杂形状的明置块体基础在水平谐和扰力作用下的动力响应进行计算,并将振幅计算结果与采用弹性半空间理论所得到的滑移振动刚度和阻尼系数公式(由大量试验、数值计算所证实)的振幅计算结果进行比较,结果表明:两者结果非常吻合,基础沿x和y方向滑移时,振幅误差分别为9.2%和0.8%。利用该模型可以容易地计算在水平扰力作用下任意频率、任意泊松比和任意形状(不包括环型)的均质半空间上块体基础的动力响应。